Packaging piece

Abstract

Some embodiments of the present application provide a package comprising: a redistribution structure comprising a conductive layer and a dielectric layer disposed on the conductive layer; and an under bump metal disposed on the dielectric layer, the under bump metal penetrating the dielectric layer via the conductive via, where the dielectric layer includes a recess recessed downward from an upper surface of the dielectric layer facing the under bump metal, and where the recess surrounds the conductive via. According to the invention, the groove surrounding the conductive through hole is arranged, so that the bonding strength of the packaging piece is improved.

Description

Technical Field

[0001] An embodiment of the present application relates to a package. Background Art

[0002] In the process of making the under bump metallurgy (UBM) structure, see Figure 1A and Figure 1B , Figure 1A A cross-sectional view of a prior art package 10 is shown, and Figure 1B Shows Figure 1A Specifically, as Figure 1A As shown, in the package 10, due to the poor adhesion between the metal such as copper (Cu) and the dielectric material 11 (wherein the pad 11A is disposed), the plating layer 12B such as copper (Cu) of the seed layer 12 will not be directly formed on the dielectric material 11, but the adhesion layer 12A such as titanium (Ti) of the seed layer 12 will be formed on the dielectric material 11, and then the plating layer 12B of the seed layer 12 will be formed on the adhesion layer 12A, and then the under bump metal structure 13 such as copper metal will be formed, and then the barrier layer 14, the bonding layer 15 such as metal and the solder ball 16 will be formed in sequence on the under bump metal structure 13. It should be noted that after the structure of the under bump metal structure 13 is completed, the adhesion layer 12A and the plating layer 12B of the seed layer 12 outside the lateral range of the under bump metal structure 13 need to be removed, such as by an etching process. Due to the etching process, an undercut C is formed at the bottom of the seed layer 12 below the UBM structure 13 (eg, Figure 1B As shown in FIG. 1 , the ratio of the micro-bump size will be magnified, thereby affecting the strength of the package 10 and causing the guide pillar of the metal structure 13 under the bump to fall off or fall off in the subsequent process (as shown in FIG. 1 ). Figure 1A ).

[0003] Therefore, in the current manufacture of the package 10 for plated pads and under-bump metal structures 13, in most cases PVD (physical vapor deposition) is used to form a titanium layer to form an adhesion layer 12A, PVD is used to form a copper layer to form a plating layer 12B, and copper is plated on the non-metallic surface of the dielectric material 11 to form an under-bump metal structure 13 as a base layer.

[0004] However, in the case where the fine pitch between the under-bump metal structure 13 at the interface between the non-metal surface of the dielectric material 11 and the material of the bonding layer 12A of the titanium layer formed by PVD is less than 5 μm, defects (such as the problem of missing solder balls 16) are increasingly apparent. As can be seen from the above, the root cause of the failure of the problem of missing solder balls 16 is the weak adhesion interface between the bonding layer 12A such as Ti and the non-metal surface of the dielectric material 11 after edge etching or over-etching damage. Therefore, a package is urgently needed to improve the weak adhesion of the interface. Utility Model Content

[0005] The package provided by the present application increases the contact area between the adhesive layer and the dielectric layer in the longitudinal direction, and increases the bonding strength of the package by arranging a groove around the metal under the bump.

[0006] Some embodiments of the present application provide a package, comprising: a redistribution structure, the redistribution structure comprising a conductive layer and a dielectric layer disposed on the conductive layer; and an under-bump metal (UBM) disposed on the dielectric layer, the under-bump metal penetrating the dielectric layer via a conductive via, wherein the dielectric layer comprises a groove recessed downward from an upper surface of the dielectric layer facing the under-bump metal, and wherein the groove surrounds the conductive via.

[0007] In some embodiments, an outermost edge of the groove is substantially aligned with an outermost edge of the UBM.

[0008] In some embodiments, the package further includes: a seed layer disposed between the dielectric layer and the under bump metal and between the conductive layer and the under bump metal, wherein the seed layer includes an adhesion layer and a plating layer disposed on the adhesion layer.

[0009] In some embodiments, the groove includes the adhesive layer, a first side of the adhesive layer contacts the dielectric layer, and a second side of the adhesive layer opposite to the first side contacts the first portion of the start-up layer, wherein the first portion of the start-up layer extends toward the groove to between the adhesive layers.

[0010] In some embodiments, the depth of the groove is greater than the thickness of the adhesive layer.

[0011] In some embodiments, within the range enclosed by the groove, the depth of the adhesive layer is greater than the depth of the first portion of the plating layer.

[0012] In some embodiments, within a range enclosed by the groove, an angle between opposite side walls of the first portion of the plating layer is smaller than an angle between opposite side walls of the adhesive layer.

[0013] In some embodiments, a first side of the first portion of the plated layer contacts the adhesive layer, and a second side of the first portion of the plated layer opposite to the first side is exposed.

[0014] In some embodiments, a portion of the adhesive layer disposed at an outermost edge of the groove has a concave top surface.

[0015] In some embodiments, the concave top surface is lower than the upper surface of the dielectric layer.

[0016] In some embodiments, the first portion of the plated layer extends below the concave top surface.

[0017] In some embodiments, the concave top surface has an arc shape.

[0018] In some embodiments, the concave top surface is spaced apart from a second portion of the plated layer directly above the concave top surface, wherein the second portion of the plated layer is angled with the first portion of the plated layer.

[0019] In some embodiments, a ratio of the depth to the width of the groove is in the range of 0.5 to 5.

[0020] In some embodiments, the groove has a triangular profile, an arc-shaped profile, or an irregular profile.

[0021] In some embodiments, a plurality of the grooves are arranged side by side in a direction away from the conductive through hole.

[0022] In some embodiments, in a top view, the groove is a continuously extending ring.

[0023] Other embodiments of the present application provide a package, comprising: a redistribution structure, the redistribution structure comprising a conductive layer and a dielectric layer disposed on the conductive layer, wherein the dielectric layer has a groove extending from an upper surface of the dielectric layer toward a lower surface of the dielectric layer, wherein the upper surface is opposite to the lower surface; and an under bump metal (UBM) disposed on the upper surface of the dielectric layer, and the under bump metal (UBM) penetrates the dielectric layer through a conductive via, wherein a bottom of the groove is higher than a bottom of the conductive via and extends around the conductive via.

[0024] In some embodiments, an outermost edge of the groove is substantially aligned with an outermost edge of the UBM.

[0025] In some embodiments, the package further includes: a seed layer disposed between the dielectric layer and the under-bump metal and between the conductive layer and the under-bump metal, wherein the seed layer includes an adhesion layer and a plating layer disposed on the adhesion layer, and wherein the adhesion layer is included in the groove, a first side of the adhesion layer contacts the dielectric layer, and a second side of the adhesion layer opposite to the first side contacts a first portion of the plating layer, wherein the first portion of the plating layer extends toward the groove to between the adhesion layers.

[0026] The present application improves the bonding strength of the corresponding package by providing a groove extending around the conductive through hole. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] When read in conjunction with the accompanying drawings, various aspects of the present invention can be best understood from the following detailed description. It should be noted that, in accordance with standard practice in the industry, the various components are not drawn to scale. In fact, for the sake of clarity of discussion, the size of the various components can be arbitrarily increased or reduced.

[0028] Figure 1A and Figure 1B A prior art package is shown.

[0029] Figure 2 , FIG. 2A to FIG. 2F , FIG. 3A to FIG. 3B A package according to some embodiments of the present application is shown.

[0030] Figure 4A and Figure 4B A carrier according to some embodiments of the present application is shown.

[0031] Figures 5 to 13 , Fig.14A and Fig. 14B as well as Figure 15 to Figure 16 The process flow of a package according to some embodiments of the present application is shown. DETAILED DESCRIPTION

[0032] The following disclosure provides many different embodiments or examples for realizing different features of the present invention. Specific examples of components and arrangements are described below to simplify the present invention. Of course, these are merely examples and are not intended to limit the present invention. In addition, when "approximately", "about", "substantially", "substantially", etc. are used to describe a numerical value or a numerical range, unless otherwise specified, the term is intended to cover a numerical value within ±10% of the described numerical value. For example, the term "about 5nm" covers a size range from 4.5nm to 5.5nm.

[0033] The present application solves the problem of undercutting of the bumps, causing the bumps to collapse or fall off during the process of removing the bonding layer of the seed layer by expanding the contact area between the bonding layer of the seed layer and the dielectric material. Specifically, expanding the contact area between the bonding layer of the seed layer and the dielectric material expands the contact area between the bonding layer and the dielectric material in the longitudinal direction.

[0034] Some embodiments of the present application provide a package 100, see Figure 2 The package 100 includes: a redistribution structure 101, the redistribution structure 101 includes a conductive layer 101A and a dielectric layer 101B disposed on the conductive layer 101A; and an under bump metal (UBM) 103 disposed on the dielectric layer 101B, the under bump metal 103 penetrating the dielectric layer 101B through a conductive via 103B. Figure 2 As can be seen in FIG. 1 , the UBM 103 includes a conductive via 103B and a trace 103A extending on the dielectric layer 101B. In some embodiments, the dielectric layer 101B includes a recess R recessed downward from an upper surface 101Bs of the dielectric layer 101B facing the UBM 103, and wherein, see Figure 2B , Figure 2B Shown along Figure 2A A partial top view of the conductive via 103B and the groove R along the line LL', from Figure 2B As can be seen from FIG. 1 , the groove R surrounds the conductive via 103B, and Figure 2B It can be seen from the top view that in some embodiments, the groove R is a continuously extending ring.

[0035] Next, see Figure 2A and Figure 2B , Figure 2B Shows Figure 2 An enlarged view of region B is shown in FIG. Figure 2B As shown, the outermost edge Rs of the groove R is substantially aligned with the outermost edge 103s of the under bump metal 103. In some embodiments, the package 100 further includes: a seed layer 102 disposed between the dielectric layer 101B and the under bump metal 103 and between the conductive layer 101A and the under bump metal 103, Figure 2A As can be seen from the figure, the seed layer 102 includes an adhesive layer 102A and a plating layer 102B disposed on the adhesive layer 102A. Figure 2BIt can be clearly seen in the figure that the groove R includes an adhesive layer 102A, a first side 102As1 of the adhesive layer 102A contacts the dielectric layer 101B, and a second side 102As2 of the adhesive layer 102A opposite to the first side 102As1 contacts the first portion 102B1 of the plated layer 102B, wherein the first portion 102B1 of the plated layer 102B extends toward the groove R to between the adhesive layers 102A. In some embodiments, a first side 102B1S1 of the first portion 102B1 of the plated layer 102B contacts the adhesive layer 102A, and a second side 102B1S2 of the first portion 102B1 of the plated layer 102B opposite to the first side 102B1S1 is exposed. Further, a depth Rh of the groove R is greater than a thickness 102At of the adhesive layer 102A. Figure 2B As shown, within the range enclosed by the groove R, the depth of the adhesive layer 102A (i.e., the depth Rh of the groove R) is greater than the depth 102Bh of the first portion 102B1 of the plated layer 102B. In some embodiments, within the range enclosed by the groove R, the angle α between the opposite side walls of the first portion 102B1 of the plated layer 102B is smaller than the angle β between the opposite side walls of the adhesive layer 102A, that is, within the groove R, the first portion 102B1 of the plated layer 102B is sharper than the adhesive layer 102A.

[0036] See also Figure 2B , the portion of the adhesive layer 102A disposed at the outermost edge Rs of the groove R has a concave top surface 102Art. Figure 2B As shown, the concave top surface 102Art is lower than the upper surface 101Bs of the dielectric layer 101B. In some embodiments, the first portion 102B1 of the coating layer 102B extends below the concave top surface 102Art. Specifically, the concave top surface 102Art has an arc shape. In addition, in some embodiments, the concave top surface 102Art is spaced apart from the second portion 102B2 of the coating layer 102B directly above the concave top surface 102Art, wherein the second portion 102B2 of the coating layer 102B is at an angle to the first portion 102B1 of the coating layer 102B. In further embodiments, the ratio of the depth Rh to the width Rw of the groove R is in the range of 0.5 to 5. See Figure 2B , Figure 2C and Figure 2D , Figure 2C and Figure 2D Some deformations of the groove R are shown. It can be seen that the groove R can have the following Figure 2B The triangular outline shown, Figure 2C The irregular outline shown or Figure 2D The arc-shaped profile shown. Figure 2B The triangular outline shown may have geometric unity, Figure 2CThe irregular profile shown can have more bonding contact, and Figure 2D The arc-shaped profile shown can be easily manufactured with a higher yield. Figure 2E In the direction L away from the conductive through hole 103B, a plurality of grooves R are arranged side by side, wherein each groove R is aligned with the reference Figure 2B The groove R is similar to the one described above, except that Figure 2E Among the multiple grooves R shown, only the outermost groove R (i.e., the groove R farthest from the conductive through hole 103B) has a concave top surface 102Art, so it will not be described in detail here. FIG. 2B to FIG. 2D The package 100 with a single groove R shown in the figure can have a lower cost. Figure 2E The package 100 shown with multiple recesses R may have more adhesive contacts for higher yield.

[0037] also, Figure 2F Shows the FIG. 2B to FIG. 2D The circuit shown has a groove R and Figure 2E The increase rate of the bonding layer area of ​​the loop with multiple grooves R (ie, called the full area) is compared (the blue, orange, gray and yellow lines from bottom to top represent the FIG. 2B to FIG. 2E ), wherein the abscissa shows the size of the under bump metal 103 in the lateral direction H, and the ordinate represents the rate of increase of the area of ​​the adhesive layer 102A. Figure 2F It can be seen that when the corresponding package 100 has a loop of one or more grooves R, the increase rate of the area of ​​the bonding layer 102A is between a few percentage points and 350%, and the increase rate of the area of ​​the bonding layer 102A of the loop of multiple grooves R is greater than 100 times that of the loop of one groove R.

[0038] In some embodiments, the package 100 further includes a barrier layer 104, a bonding layer 105 located on the barrier layer 104, and a solder ball 106 disposed on the bonding layer 105. In addition, the package 100 further includes a carrier 107, a surface of the carrier 107 is provided with a conductive layer 101A, and the conductive layer 101A is exposed from the corresponding carrier 107, and in some embodiments, the carrier 107 can be any suitable carrier such as a silicon carrier, and can have a structure such as Figure 4B As shown in the circular or Figure 4A Any suitable shape such as square as shown. Figure 4A The square carrier shown can make the corresponding package 100 lower in cost and have a higher yield, while Figure 4B The circular carrier shown may make the corresponding package 100 easier to manufacture and have a higher yield.

[0039] Some other embodiments of the present application further provide a package 100, see Figure 2 The package 100 includes: a redistribution structure 101, which includes a conductive layer 101A and a dielectric layer 101B disposed on the conductive layer 101A, wherein the dielectric layer 101B has a groove R extending from an upper surface 101Bs of the dielectric layer 101B toward a lower surface 101Bd of the dielectric layer, wherein the upper surface 101Bs is opposite to the lower surface 101Bd; and an under bump metal 103, which is disposed on the upper surface 101Bs of the dielectric layer 101B, and the under bump metal 103 penetrates the dielectric layer 101B through a conductive via 103B, wherein the bottom of the groove R is higher than the bottom of the conductive via 103B and extends around the conductive via 103B.

[0040] In some embodiments, an outermost edge Rs of the recess R is substantially aligned with an outermost edge 103 s of the UBM 103 .

[0041] In some embodiments, the package 100 includes a seed layer 102, which is disposed between the dielectric layer 101B and the under-bump metal 103 and between the conductive layer 101A and the under-bump metal 103, wherein the seed layer 102 includes an adhesion layer 102A and a plating layer 102B disposed on the adhesion layer 102A, and wherein the groove R includes the adhesion layer 102A, a first side 102As1 of the adhesion layer 102A contacts the dielectric layer 101B, and a second side 102As2 of the adhesion layer 102A opposite to the first side 102As1 contacts the first portion 102B1 of the plating layer 102B, wherein the first portion 102B1 of the plating layer 102B extends toward the groove R to between the adhesion layers 102A.

[0042] In the above embodiments, the under-bump metal 103, the conductive layer 101A, and the bonding layer 105 may include metals such as Cu, Au, Ag, Al, Pd, Pt, and Ni alloys, and may be manufactured using PVD, electroplating, chemical plating, printing, or potting metals. In addition, in some embodiments, the bonding layer 102A of the seed layer 102 includes but is not limited to Ti, and the plating layer 102B of the seed layer 102 includes but is not limited to Cu. The dielectric layer 101B may include but is not limited to PI (polyimide), epoxy resin, ABF (Ajinomoto enhanced film), PP (polypropylene), or acrylic material, and may be formed using organic photosensitive or / and non-photosensitive liquids or / and dry film methods. The barrier layer 104 may include but is not limited to Ti, tungsten, tantalum, and the like.

[0043] Next, see Figure 3A and Figure 3B , Figure 3AFIG. 1 shows a package 1000 in which a plurality of under bump metals 103 and corresponding other structures are arranged on a dielectric layer 101B. Figure 3A In the package 1000 shown in FIG. 1 , each corresponding individual package corresponding to each corresponding under bump metal 103 is the same as the reference Figure 2 The package 100 described above is the same and will not be described again here. Figure 2 The package 100 and Figure 3A In the package 1000 shown, the solder ball 106 is indirectly disposed on the conductive layer 101A and the seed layer 102, and below the solder ball 106 is disposed on a column structure formed by the under-bump metal 103, the barrier layer 104 and the bonding layer 105, etc., which can make the corresponding package 100 / 1000 have higher reliability. Figure 3B The package 1001 is shown in which the solder balls 106 are directly disposed on the conductive layer 101A and the seed layer 102 . Directly disposing the solder balls 106 can reduce the corresponding cost and enable faster manufacturing.

[0044] The package 100 provided in the present application provides good performance for its edges such as (outermost edge Rs), and the groove R at the edge of the metal under bump 103 and the concave top surface 102Art can solve the problem of missing corresponding solder balls 106. In addition, the use of the groove R at the edge of the metal under bump 103 and the concave top surface 102Art can make the spacing P between adjacent metal under bumps 103 less than 5μm, that is, the size / spacing (size or spacing) between adjacent metal under bumps 103 is less than 1μm~3μm / 1μm~3μm. Further, the manufacturing of the overall WL (wafer level) (or PNL (panel level)) packaging of the package 100 / 1000 provided in the present application can be used for low-cost solutions.

[0045] Furthermore, the groove R at the edge of the under bump metal 103 of the package 100 / 1000 provided in the present application is beneficial to improving the performance of the corresponding package:

[0046] In the longitudinal direction D, the adhesive layer 102A is inserted into the groove R to increase the bonding area (the inserted area>the top area of ​​the groove R) for enhancing the bonding;

[0047] In the lateral direction H, the stress of the corresponding package 100 / 1000 can be overcome, that is, the stress is broken to the bottom of the center of the metal under bump 103 along the cross section between the dielectric layer 101B and the bonding layer 102A, that is, the fracture stress concentration effect at the interface between the bonding layer 102A (metal, such as Ti) and the dielectric layer 101B (non-metal) is available, and the maximum stress occurs at the corner of the plating layer 102B (at the position directly above the concave top surface 102Art), that is, the metal body is strengthened to overcome the interface between the metal and the non-metal.

[0048] In the above-mentioned package 100 / 1000, in some embodiments, the pitch P between the grooves R is in the range of 2μm to 20μm (preferably <5μm), the size of the solder ball 106 is in the range of 1μm to 10μm, and the spacing between adjacent solder balls 106 is in the range of 1μm to 10μm. The diameter or width Rw of the groove R is in the range of several nm to several hundred nm. The depth Rh of the groove R is in the range of several nm to several hundred nm, and the angle of the groove R (i.e., angle α) is in the range of 5°C to 85°C. The diameter of the concave top surface 102Art is in the range of tens of nm to several hundred nm, and the depth of the concave top surface 102Art in the longitudinal direction D is in the range of tens of nm to several hundred nm. The thickness of the dielectric layer 101B in the longitudinal direction D is in the range of 2μm to 20μm. The thickness of the plating layer 102B of the seed layer 102 in the longitudinal direction D is in the range of several hundreds nm to several μm, and the thickness of the adhesive layer 102A of the seed layer 102 in the longitudinal direction D is in the range of several hundreds nm to several μm.

[0049] Refer to the following Figures 5 to 16 To introduce Figure 3A The process flow for forming the package 1000 is shown.

[0050] See also Figure 5 , providing a carrier 107 having a conductive layer 101A formed on the surface thereof, the carrier 107 may be a silicon carrier or any other suitable carrier. In some embodiments, the conductive layer 101A is made of Cu. Figure 6 A dielectric layer 101B is formed on the surface of the carrier 107 on which the conductive layer 101A is formed, such as by using a polyimide material and a printing process, to form a redistribution structure 101. After the dielectric layer 101B is formed, exposure P1 is performed to form an opening 101BO in the dielectric layer 101B to expose the conductive layer 101A.

[0051] Next, see Figure 7 , etching is performed around the corresponding opening 101BO by a laser etching process G, thereby forming a groove R around the opening 101BO, as shown in FIG. Figure 8 After the groove R is formed, Fig. 9 As shown, an adhesion layer 102A' such as Ti is formed on the dielectric layer 101B by a physical vapor deposition (PVD) process, and a plating layer 102B' is formed on the adhesion layer 102A', thereby forming a seed layer 102'.

[0052] After forming the seed layer 102', as Fig.10As shown, a photoresist 1003 is formed on the seed layer 102', and the photoresist 1003 is exposed to form an opening 1003O exposing the opening 101BO. Fig.11 As shown. Fig.11 As shown in FIG. 1 , the under bump metal 103 such as copper is plated in the opening 1003O by the plating process P2. Fig.12 and Fig.13 As shown, in the opening 1003O, a barrier layer 104, a bonding layer 105 and a solder ball 106 are successively plated on the under bump metal 103, and then the photoresist 1003 is removed by a process such as stripping or etching.

[0053] See also Fig.14A and Fig. 14B , Fig. 14B Shows Fig.14A A magnified view of region C, and from Fig. 14B It can be clearly seen that the adhesive layer 102A' and the plating layer 102B' extend into the groove R. Fig.14A As shown, after removing the photoresist 1003, the portion of the plating layer 102B' not covered by the under bump metal 103 is removed by an etching process 1004. The etching process 1004 can be dry etching or wet etching, and an etchant such as oxygen or an etchant containing fluorine or chlorine can be used to form Fig.15 The starting layer 102B and the corresponding seed layer 102" are shown.

[0054] After forming the plating layer 102B, Fig.15 The etching process 1005 shown removes the portion of the adhesion layer 102A' not covered by the under bump metal 103. The etching process 1004 can be dry etching or wet etching, and an etchant such as oxygen or an etchant containing fluorine or chlorine can be used to form a Figure 6 An adhesion layer 102A and a corresponding seed layer 102 are shown.

[0055] After forming the corresponding seed layer 102, Fig.15 The structure shown in the figure is subjected to a reflow process P3 commonly used in the art, so that the solder ball 106 is reflowed into a spherical shape, thereby obtaining Figure 3A The enlarged view of the corresponding area B of the package 1000 is shown in FIG. Figure 2B As shown, the description is not repeated here.

[0056] In the above process flow, first, a redistribution structure 101 is fabricated. Then, a conductive via 103B and a groove R are fabricated on the surface of the top dielectric layer 101B of the PNL (or WL) platform. The conductive via 103B and the groove R are designed for interconnecting the internal pads of the redistribution structure 101 and enhancing the bonding strength of the adhesive layer 102A formed later on the dielectric layer 101B.

[0057] Next, on the surfaces of the conductive via 103B and the groove R, the adhesive layer 102A and the plating layer 102B of the seed layer 102 are manufactured by a PVD manufacturing method.

[0058] Afterwards, the under bump metallization 103, the barrier layer 104 and the solder ball 106 are manufactured from the starting plating layer 102B through photolithography and plating processes.

[0059] Finally, the plating layer 102B and the adhesive layer 102A outside the under-bump metal 103 are chemically etched. After etching, a curved surface structure is formed (i.e., the portion of the adhesive layer 102A at the outermost edge Rs of the groove R has a concave top surface 102Art) to avoid stress concentration effects. Then, reflow heating is performed to form solder balls 106 with fine pitches.

[0060] In summary, the package 100 / 1000 provided by the present application increases the contact area between the adhesive layer 102A and the dielectric layer 101B in the longitudinal direction D. In terms of structure, the contact surface between the conductive via 103B and the dielectric layer 101B is the adhesive layer 102A. After the outward side is etched and removed, the surface of the conductive via 103B on the other side that is not outward still has the adhesive layer 102A in contact with the dielectric layer 101B, so the impact on the structure is small. In addition, the present application can resist the direction in which the solder ball 106 and the under-bump metal 103 are subjected to stress by means of the distribution of the adhesive layer 102A in the longitudinal direction D and the corresponding distribution direction, thereby resisting the force in the lateral direction H (such as the cleaning process), thereby avoiding problems such as inverted pillars, breakage or falling off. Furthermore, by providing a continuous groove R structure outside the range of the under-bump metal 103, the contact area can be further expanded.

[0061] The features of several embodiments are summarized above so that those skilled in the art can better understand aspects of the present invention. Those skilled in the art should understand that they can easily use the present invention as a basis to design or modify other processes and structures for implementing the same purpose and / or achieving the same advantages as the embodiments described herein. Those skilled in the art should also appreciate that such equivalent constructions do not deviate from the spirit and scope of the present invention, and that they can make various changes, substitutions, and modifications herein without departing from the spirit and scope of the present invention.

Claims

1. A package, characterized in that: include: A redistribution structure, the redistribution structure comprising a conductive layer and a dielectric layer disposed on the conductive layer; as well as An under bump metal (UBM) is disposed on the dielectric layer, and the under bump metal penetrates the dielectric layer through a conductive via. The dielectric layer includes a groove recessed downward from an upper surface of the dielectric layer facing the under bump metal, and the groove surrounds the conductive via.

2. The package according to claim 1, characterized in that An outermost edge of the groove is substantially aligned with an outermost edge of the UBM.

3. The package according to claim 1, characterized in that Also includes: A seed layer is disposed between the dielectric layer and the under bump metal and between the conductive layer and the under bump metal, wherein the seed layer includes an adhesive layer and a plating layer disposed on the adhesive layer.

4. The package according to claim 3, characterized in that The groove includes the adhesive layer, a first side of the adhesive layer contacts the dielectric layer, and a second side of the adhesive layer opposite to the first side contacts the first portion of the plating layer, wherein the first portion of the plating layer extends toward the groove to between the adhesive layers.

5. The package according to claim 4, characterized in that The depth of the groove is greater than the thickness of the adhesive layer.

6. The package according to claim 4, characterized in that In the range enclosed by the groove, the depth of the adhesive layer is greater than the depth of the first part of the plating layer.

7. The package according to claim 4, characterized in that In a range enclosed by the groove, an angle between opposite side walls of the first portion of the plating layer is smaller than an angle between opposite side walls of the adhesive layer.

8. The package according to claim 4, characterized in that A first side of the first portion of the plating layer contacts the adhesive layer, and a second side of the first portion of the plating layer opposite to the first side is exposed.

9. The package according to claim 4, characterized in that: A portion of the adhesive layer disposed at an outermost edge of the groove has a concave top surface.

10. The package according to claim 9, characterized in that The concave top surface is spaced apart from a second portion of the plated layer directly above the concave top surface, wherein the second portion of the plated layer is angled with the first portion of the plated layer.

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