Simulation node circuit board and simulation data acquisition node
By designing analog node circuit boards, including sensor interfaces, analog signal conditioning, AD conversion and Ethernet interface modules, the problem that analog signal acquisition and processing in the prior art is difficult to meet high-precision control and high-performance indicators, and efficient acquisition and processing of analog signals of heavy-load freight locomotives is achieved.
Patent Information
- Application Number
- CN202420193856.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-25
- Publication Date
- 2025-03-04
- Estimated Expiration
- 2034-01-25
AI Technical Summary
The existing signal acquisition implementation method of heavy-load freight locomotives is difficult to meet the requirements of high-precision control and high-performance indicators, especially in the acquisition and processing of analog signals.
An analog node circuit board is designed, including a sensor interface module, an analog signal conditioning module, an AD conversion module and an Ethernet interface module. These modules realize high-precision acquisition and processing of analog signals, and upload digital signals through Ethernet.
It realizes high-precision acquisition and processing of simulated signals of heavy-load freight locomotives, meeting the requirements of high-performance indicators, including high sampling resolution, multi-channel support and high-precision control.
Smart Images
Figure CN222561935U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of heavy-load freight locomotives, in particular to a simulation node circuit board and a simulation data acquisition node. Background Art
[0002] With the continuous advancement of industrial technology, the automation and networking of the control process is an inevitable development trend. At the same time, the amount of data transmission is increasing, and the real-time requirements for data transmission are becoming more and more stringent. At the same time, as the transportation volume of heavy-duty railways increases year by year and the departure intervals gradually shorten. With the increase in the service life of locomotives, the aging and fatigue conditions of the main components of the locomotives increase, which is bound to form a trend of increasing subsequent failure rates year by year. As the operation time of heavy-duty locomotives increases, the internal alternating thermal stress, mechanical stress, electrical stress, etc. of the numerous electromechanical components in each subsystem of the heavy-duty locomotive continuously impact the microstructure inside the components, resulting in the gradual deterioration of their performance, parameter changes, and even fatigue damage leading to final failure, which seriously threatens the operation and transportation safety of the locomotives.
[0003] Due to the complex operation of heavy-load freight locomotives and the huge amount of information generated, the real-time and accuracy of data are required to be high. In the operation management of heavy-load locomotives, it is also necessary to obtain the status data of important components and important subsystems of the locomotive in real time to achieve rapid fault diagnosis, realize dynamic real-time evaluation of the operating health, and extend the service life of the locomotive.
[0004] The existing signal acquisition implementation method for heavy-duty freight locomotives is mainly based on the signal processing function of the single-chip microcomputer. The number of analog signals that can be collected and processed simultaneously is small, and there is a lack of high-precision control of signal acquisition. It is difficult to meet the requirements of on-board data acquisition in terms of transmission rate, sampling resolution, number of sampling channels, accuracy, sampling frequency and other performance indicators. Utility Model Content
[0005] In order to solve the technical problems that the existing data acquisition methods are difficult to realize simultaneous acquisition and processing of analog signals and lack high-precision control of analog signal acquisition, the utility model proposes an analog node circuit board and an analog data acquisition node.
[0006] According to a first aspect of the present embodiment, an analog node circuit board is provided, comprising:
[0007] A base plate and a core control board, wherein the base plate and the core control board are connected via a connector; the base plate includes a sensor interface module, an analog signal conditioning module, an AD conversion module and an Ethernet interface module;
[0008] The sensor interface module is used to receive analog signals from heavy-load freight locomotives;
[0009] The analog signal conditioning module is used to pre-process the analog signal;
[0010] The AD conversion module samples the preprocessed analog signal and converts the analog-to-digital signal into a corresponding digital signal;
[0011] The core control board is used to send a sampling clock to the AD conversion module to control the sampling of the AD conversion module, and receive and cache the digital signal after analog-to-digital conversion by the AD conversion module;
[0012] The Ethernet interface module is used to upload the digital signal buffered by the core control board to an external device via Ethernet.
[0013] In some implementations, the core control board includes an FPGA module and an ARM module:
[0014] The FPGA template is used to receive the control instructions and setting parameters sent by the ARM module, send a sampling clock to the AD conversion module to control the sampling of the AD conversion module, and receive the digital signal after the analog-to-digital conversion of the AD conversion module;
[0015] The ARM module is used to send control instructions and set parameters to the FPGA module, and is also used to cache digital signals received by the FPGA module.
[0016] In some implementations, the sensor interface module includes a three-channel common-mode inductor to suppress electromagnetic wave interference.
[0017] In some implementations, the analog signal conditioning module includes at least one of a current detection circuit, a second-order low-pass filter circuit, a voltage bias circuit, and a clamp protection circuit.
[0018] In some implementations, the baseboard further includes an analog signal isolation module, and the analog signal isolation module is used to isolate multiple analog signals connected to the sensor interface module.
[0019] In some implementations, the analog signal isolation module includes at least one of a photoelectric coupling amplifier, a magnetic isolation chip, an isolation transformer, a frequency-to-voltage conversion circuit, and a voltage-to-frequency conversion circuit to achieve isolation of multiple analog signals.
[0020] In some implementations, the AD conversion module includes at least one multi-channel analog-to-digital conversion chip.
[0021] In some implementations, the multi-channel analog-to-digital conversion chip uses an AD7606 chip.
[0022] In some implementations, the Ethernet interface module includes:
[0023] A network port transformer, connected to the Ethernet interface;
[0024] The Ethernet physical layer chip is connected to the network port transformer and is used for communicating with the Ethernet MAC layer.
[0025] The second aspect of the present embodiment is disclosed, providing an analog data acquisition node, including a shell and the analog node circuit board as described above, the shell including a base, an upper cover, and a power supply socket and a network interface socket arranged on the base; the analog node circuit board is fixed on the base; the power supply socket and the network interface socket are respectively connected to corresponding interfaces on the analog node circuit board.
[0026] Compared with the prior art, one embodiment of the present disclosure has at least the following beneficial effects:
[0027] The analog node circuit board provided by the utility model, the sensor interface module is connected to the sensor on the locomotive, the sensor interface module is responsible for powering the sensor, and the analog signal output by the sensor is connected to the sensor interface module; the analog signal is first converted from a current type to a voltage type by an analog signal conditioning module, and adjusted to a size that can be connected to an AD conversion module, that is, the analog signal is processed into an input signal suitable for the AD conversion module; then through the input end of the AD conversion module, the core control board sends a sampling clock to the AD conversion module to control the AD conversion module to sample the analog signal and convert it into a corresponding digital signal; then the AD conversion module transmits the converted digital signal to the core control board for caching and further processing, and finally the Ethernet interface module uploads the digital signal to the host computer through the Ethernet interface. This realizes the simultaneous acquisition and processing of the locomotive analog signal, as well as the high-precision control of the analog signal acquisition. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0029] Figure 1 is a block diagram of an analog node circuit board provided by an embodiment of the present disclosure;
[0030] Figure 2 is a schematic diagram of a 3-channel common-mode inductor circuit provided by an embodiment of the present disclosure;
[0031] Figure 3is a circuit diagram of an analog signal conditioning module provided by an embodiment of the present disclosure;
[0032] Figure 4 It is a schematic diagram of the ARM and FPGA data communication interface provided by the embodiment of the present disclosure;
[0033] Figure 5 It is a schematic diagram of the interface between the FPGA module and the AD7606 chip provided in the embodiment of the present disclosure;
[0034] Figure 6 It is a sampling conversion timing diagram of the AD7606 chip provided in an embodiment of the present disclosure;
[0035] Figure 7 Schematic diagram of the implementation principle of the photoelectric coupling amplifier provided in the embodiment of the present disclosure;
[0036] Figure 8 is a flowchart for realizing the function of the analog node circuit board provided by the embodiment of the present disclosure;
[0037] Fig. 9 It is a schematic diagram of the shell of the simulation data acquisition node provided in the embodiment of the present disclosure. DETAILED DESCRIPTION
[0038] The technical scheme in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is only a part of the embodiment of the utility model, rather than all the embodiments. The components of the embodiment of the utility model generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiment of the utility model provided in the drawings is not intended to limit the scope of the utility model claimed for protection, but merely represents the selected embodiment of the utility model. Based on the embodiment of the utility model, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the utility model.
[0039] Embodiment 1
[0040] This embodiment provides an analog node circuit board, such as Figure 1 As shown, it includes a base plate and a core control board. The base plate and the core control board are connected via a connector. The base plate includes a sensor interface module, an analog signal conditioning module, an AD conversion module, an Ethernet interface module and a power supply module.
[0041] The sensor interface module is used to receive analog signals from heavy-load freight locomotives. In this embodiment, the sensor interface module includes a three-channel common-mode inductor to suppress electromagnetic wave interference. The three-channel common-mode inductor is as follows: Figure 2 shown.
[0042] The analog signal conditioning module is used to pre-process the analog signal. The sensors installed on site are mainly voltage sensors and current sensors, which contain abundant harmonic components and noise. Before the collected analog signal is processed, it must be pre-processed by the analog signal conditioning module. Specifically, the analog signal conditioning module includes at least one of a current detection circuit, a second-order low-pass filter, a voltage bias circuit, and a clamping protection circuit. For example, the analog signal conditioning module includes a current detection circuit, a second-order low-pass filter circuit, a voltage bias circuit, and a clamping protection circuit, which can realize the functions of current detection, low-pass filtering, voltage bias, and clamping protection. Figure 3 The circuit schematic diagram of the analog signal conditioning module shown in the figure, specifically, because the characteristic frequency of locomotive faults is distributed in the low-frequency area, the second-order low-pass filter circuit adopts a Butterworth second-order low-pass filter for filtering. The current output from the Hall current sensor passes through a resistor to convert the current signal into a voltage signal. The operational amplifier U1A forms a current detection circuit, and the operational amplifier U2A forms a second-order low-pass filter circuit to filter out high-frequency signal noise. Finally, through the U3A voltage bias circuit, the collected voltage signal is biased to the voltage range allowed by the DSP module, where the resistor R5 is a power protection resistor, and the diodes D1 and D2 play a clamping protection role.
[0043] The AD conversion module samples the pre-processed analog signal and performs analog-to-digital conversion into a corresponding digital signal. The AD conversion module includes at least one multi-channel analog-to-digital conversion chip. In this embodiment, the multi-channel analog-to-digital conversion chip uses a high-speed, low-power 16-bit, 8-channel synchronous sampling AD7606 chip. The main features of the AD7606 chip include: 1) It is powered by a single 5V power supply and can process ±10V and ±5V true bipolar input signals; 2) It has on-chip filtering and high input impedance, and does not require a driving operational amplifier and an external bipolar power supply; 3) All channels can be sampled at a throughput rate of up to 200kSPS, and at the same time have a 40dB anti-aliasing suppression characteristic.
[0044] The core control board is used to send a sampling clock to the AD conversion module to control the sampling of the AD conversion module, and to receive and cache the digital signal after the analog-to-digital conversion of the AD conversion module. In this embodiment, the core control board includes an FPGA module, an ARM module, a DSP module, and peripheral circuits, a power module circuit and other parts. The FPGA template is used to receive the control instructions and setting parameters sent by the ARM module, send a sampling clock to the AD conversion module to control the sampling of the AD conversion module, and receive the digital signal after the analog-to-digital conversion of the AD conversion module; the ARM module is used to send control instructions and setting parameters to the FPGA module, and is also used to cache the digital signal received by the FPGA module. Specifically, the FPGA and the ARM need to carry out two-way data communication, which mainly includes the ARM module sending control instructions and setting parameters to the FPGA module, and the ARM module receiving the digital signal in the data cache of the FPGA module. The data communication between the ARM module and the FPGA module has interface forms such as SPI, I2C, UART, USB and parallel port communication. The interface schematic diagram is shown in FIG. Figure 4 As shown. Since the processing speed of the FPGA control core is at the ns level and that of the ARM microprocessor is at the ms level, the speeds of the two are not matched. In order to achieve synchronization within the node, it is necessary to cache the digital signal after the A / D conversion controlled by the FPGA module. Therefore, this application uses the internal RAM resources of the FPGA module to build a 64K*16 dual-port RAM to achieve data buffering. Among them, the two ports (port A and port B) of the dual-port RAM can be read and written controlled. Port A is used by the FPGA to cache the pre-processed data after the eight-way A / D conversion on the one hand, and to read the control instructions and setting parameters sent by the ARM microprocessor to the FPGA on the other hand. Port B is used to store the control instructions and setting parameters sent by the ARM microprocessor to the FPGA on the one hand, and to read the sampled data cached by the FPGA on the other hand. Specifically, taking the FPGA module controlling an AD7606 chip for analog signal acquisition as an example, the implementation process of analog signal acquisition is explained. The schematic diagram of the interface between the FPGA module and the AD7606 chip is shown in the figure. Figure 5 As shown, the sampling conversion timing diagram of the AD7606 chip is as follows Figure 6 As shown, the sample-and-hold circuit inside the AD7606 chip samples and holds the input signal and transmits it to the analog-to-digital converter (ADC) for processing. The analog-to-digital converter performs sampling and conversion under the drive of RD, and the corresponding output signal appears on the output pin.
[0045] The Ethernet interface module is used to upload the digital signal cached by the core control board to an external device via Ethernet. The Ethernet interface module includes a network port transformer and an Ethernet physical layer chip. The network port transformer is connected to the Ethernet interface; the Ethernet physical layer chip is connected to the network port transformer for communicating with the Ethernet MAC layer. Specifically, the Ethernet interface adopts an RJ45 interface and needs to expand a physical layer chip. In this embodiment, it is connected to the Ethernet physical layer chip LAN8720A through the network port transformer H1102NL. LAN8720A is a low-power 10 / 100M Ethernet PHY layer chip. Its I / 0 pin voltage complies with the EEE802.3-2005 standard and supports communication with the Ethernet MAC layer through its RMⅡ interface. It has a built-in 10BASE-T / 100BASE-TX full-duplex transmission module that supports 10Mbps and 100Mbps. LAN8720A can use auto-negotiation to find the best connection mode (speed and duplex mode) with the destination host, and supports HPAutO-MDIX automatic flip function, which can change the connection to direct connection or cross-connection without changing the network cable. In addition, LAN8720A can also use a low-cost 25M crystal oscillator to generate the reference clock signal of the RMⅡ interface to reduce costs.
[0046] The function realization process of the analog node circuit board is as follows: the sensor on the locomotive is connected to the sensor interface module, the sensor interface module is responsible for powering the sensor, and the analog signal output by the sensor is connected to the sensor interface module; the analog signal is first converted from current type to voltage type by the analog signal conditioning module, and adjusted to a size that can be connected to the AD conversion module, that is, the analog signal is processed into an input signal suitable for the AD conversion module; then through the input end of the AD conversion module, the core control board sends a sampling clock to the AD conversion module to control the AD conversion module to sample the analog signal and convert it into a corresponding digital signal; then the AD conversion module transmits the converted digital signal to the core control board for caching and further processing, and finally the Ethernet interface module uploads the digital signal to an external device, such as a host computer, through the Ethernet interface. This realizes the simultaneous acquisition and processing of the locomotive analog signal, as well as high-precision control of the analog signal acquisition.
[0047] In one embodiment, the base plate further includes an analog signal isolation module, and the analog signal isolation module is used to isolate the multiple analog signals connected to the sensor interface module. The analog signal isolation module includes at least one of a photoelectric coupling amplifier, a magnetic isolation chip, an isolation transformer, a frequency-to-voltage conversion circuit, and a voltage-to-frequency conversion circuit to achieve isolation of multiple analog signals. In this embodiment, a photoelectric coupling amplifier is taken as an example, and a HCNR201 high-linearity analog photoelectric coupler is specifically used to achieve isolation of multiple analog signals. The implementation principle of the photoelectric coupling amplifier is as follows: Figure 7 As shown, it includes a light emitting diode LED, a feedback photodiode PD1 and an output photodiode PD2. When the light emitting diode LED passes a current I F When the servo light flux is generated, it shines on the feedback photodiode PD1 and the output photodiode PD2 respectively, generating equal photocurrents respectively, thereby eliminating the nonlinearity and drift characteristics of the light-emitting diode LED while isolating the input and output, and realizing high-linearity signal isolation.
[0048] like Figure 8 As shown, the function realization process of the analog node circuit board is as follows: the sensor on the locomotive is connected to the sensor interface module, the sensor interface module is responsible for powering the sensor, and the analog signal output by the sensor is connected to the sensor interface module; the multiple analog signals connected to the sensor interface module are isolated from each other through the analog signal isolation module; the analog signal is pre-processed by the analog signal conditioning module, converted from current type to voltage type, and adjusted to a size that can be connected to the AD conversion module; then the analog signal is sampled and converted into a corresponding digital signal through the AD conversion module, during which the core control board sends a sampling clock to the AD conversion module to control the sampling of the AD conversion module; then the AD conversion module transmits the converted digital signal to the core control board for caching and further processing, and finally the Ethernet interface module uploads the digital signal to the host computer through the Ethernet interface. This realizes the simultaneous acquisition and processing of the locomotive analog signal, as well as the high-precision control of the analog signal acquisition.
[0049] Embodiment 2
[0050] This embodiment provides an analog data acquisition node, including a housing and the analog node circuit board as described in the first embodiment. The housing is designed to meet the IPX6 dust and water resistance level, which can prevent iron filings in the locomotive from entering the data acquisition node. Specifically, Fig. 9As shown, the housing includes a base 1, an upper cover 2, and a power supply air socket 3 and a network interface air socket 4 arranged on the base; the analog node circuit board is fixed on the base, and includes a bottom plate 5 and a core control board 6. The bottom plate 5 and the core control board 6 are connected through connectors. The power supply air socket 3 and the network interface air socket 4 are respectively connected to corresponding interfaces on the analog node circuit board.
[0051] It should be noted that, in this article, the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. The terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a..." does not exclude the presence of other identical elements in the process, method, article or device including the element.
[0052] The above descriptions are only some preferred embodiments of the present disclosure and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the utility model involved in the embodiments of the present disclosure is not limited to the technical solutions formed by the specific combination of the above-mentioned technical features, but should also cover other technical solutions formed by any combination of the above-mentioned technical features or their equivalent features without departing from the above-mentioned utility model concept. For example, the above-mentioned features are replaced with the technical features with similar functions disclosed in the embodiments of the present disclosure (but not limited to) to form a technical solution.
Claims
1. An analog node circuit board, characterized in that: include: A base plate and a core control board, wherein the base plate and the core control board are connected via a connector; the base plate includes a sensor interface module, an analog signal conditioning module, an AD conversion module and an Ethernet interface module; The sensor interface module is used to receive analog signals from heavy-load freight locomotives; The analog signal conditioning module is used to pre-process the analog signal; The AD conversion module samples the preprocessed analog signal and converts the analog-to-digital signal into a corresponding digital signal; The core control board is used to send a sampling clock to the AD conversion module to control the sampling of the AD conversion module, and receive and cache the digital signal after analog-to-digital conversion by the AD conversion module; The Ethernet interface module is used to upload the digital signal buffered by the core control board to an external device via Ethernet.
2. The analog node circuit board according to claim 1, characterized in that: The core control board includes an FPGA module and an ARM module: The FPGA template is used to receive the control instructions and setting parameters sent by the ARM module, send a sampling clock to the AD conversion module to control the sampling of the AD conversion module, and receive the digital signal after the analog-to-digital conversion of the AD conversion module; The ARM module is used to send control instructions and set parameters to the FPGA module, and is also used to cache digital signals received by the FPGA module.
3. The analog node circuit board according to claim 1, characterized in that: The sensor interface module includes a three-channel common-mode inductor to suppress electromagnetic wave interference.
4. The analog node circuit board according to claim 1, characterized in that: The analog signal conditioning module includes at least one of a current detection circuit, a second-order low-pass filter circuit, a voltage bias circuit, and a clamp protection circuit.
5. The analog node circuit board according to claim 1, characterized in that: The base plate further comprises an analog signal isolation module, and the analog signal isolation module is used to isolate multiple analog signals connected to the sensor interface module.
6. The analog node circuit board according to claim 5, characterized in that: The analog signal isolation module includes at least one of a photoelectric coupling amplifier, a magnetic isolation chip, an isolation transformer, a frequency-to-voltage conversion circuit, and a voltage-to-frequency conversion circuit to achieve isolation of multiple analog signals.
7. The analog node circuit board according to claim 1, characterized in that: The AD conversion module includes at least one multi-channel analog-to-digital conversion chip.
8. The analog node circuit board according to claim 7, characterized in that: The multi-channel analog-to-digital conversion chip adopts the AD7606 chip.
9. The analog node circuit board according to claim 1, characterized in that: The Ethernet interface module comprises: A network port transformer, connected to the Ethernet interface; The Ethernet physical layer chip is connected to the network port transformer and is used for communicating with the Ethernet MAC layer.
10. A simulation data acquisition node, characterized in that: It comprises a shell and an analog node circuit board as described in any one of claims 1 to 9, wherein the shell comprises a base, an upper cover, and a power supply socket and a network interface socket arranged on the base; the analog node circuit board is fixed on the base; the power supply socket and the network interface socket are respectively connected to corresponding interfaces on the analog node circuit board.