Dielectric loss standard device

Abstract

The utility model discloses a dielectric loss standard device, which belongs to the technical field of dielectric loss measuring equipment and comprises a loss value adjusting module which is connected with an analog capacitance value adjusting module and a real object load capacitance module. Through the above mode, the loss value adjusting module is used for adjusting the loss value, the capacitance value adjusting module simulates capacitance values of different sizes according to the size of required current, and the physical load capacitance module is mainly used for verifying the loading capacity of the dielectric loss factor tester, has a filtering effect, and improves the signal-to-noise ratio of a simulation capacitor. Calibration of high-capacity capacitance and loss is achieved, and capacitance values of different sizes are simulated according to the size of the set needed current.

Description

Technical Field

[0001] The utility model relates to the technical field of dielectric loss measuring equipment, in particular to a dielectric loss standard device. Background Art

[0002] The high-voltage dielectric loss factor tester is an important test device for judging the insulation status of capacitive equipment in the power system. The degradation of insulation performance, such as insulation moisture, insulation oil contamination, and insulation aging, will directly lead to an increase in the dielectric loss factor. Therefore, the high-voltage dielectric loss tester is widely used in preventive tests of power systems. However, there are difficulties in calibrating the high-voltage dielectric loss factor itself. In practice, measurement agencies often use a single 100pf high-voltage standard capacitor and a resistor to form a standard loss meter for calibration. This can only calibrate a single capacitance value and the corresponding loss, and cannot calibrate other capacitance values ​​and loss values ​​according to the verification procedures. In practice, it is difficult to calibrate large-capacity capacitance and loss because it is difficult to make large-capacity standard capacitors.

[0003] For example, Chinese patent CN207232364U discloses a dielectric loss factor standard device, including a standard device body and a remote control. The remote control can be used to switch different gears of the standard device body to avoid the calibration personnel frequently entering the high-voltage test fence to switch the gears of the standard device body.

[0004] However, the technology has the following problems: it cannot calibrate large-capacitance capacitance and loss, and it cannot set the required current size, thereby failing to simulate capacitance values ​​of different sizes.

[0005] Based on this, the utility model designs a dielectric loss standard to solve the above problems. Utility Model Content

[0006] In view of the above-mentioned shortcomings of the prior art, the utility model provides a dielectric loss standard.

[0007] In order to achieve the above objectives, the present invention is implemented through the following technical solutions:

[0008] A dielectric loss standard comprises a loss value adjustment module, wherein the loss value adjustment module is connected to a simulation capacitance value adjustment module and a physical load capacitance module.

[0009] Furthermore, the loss value adjustment module includes C0, U, RX and R1, the top of C0 is electrically connected to U, the bottom of C0 is electrically connected to one end of RX, the other end of RX is electrically connected to one end of the sampling resistor R1, the other end of the sampling resistor R1 is grounded, U is connected to the physical load capacitance module, and R1 is connected to the analog capacitance value adjustment module.

[0010] Furthermore, C0 is a high-voltage standard capacitor, U is a high-voltage terminal, RX is a digitally adjustable resistor, and R1 is a sampling resistor.

[0011] Furthermore, the analog capacitance value adjustment module includes I, A1, A2, A3, A4, RS, R2 and R3; the same-direction input terminal of A1 is electrically connected to the upper end of R1, the reverse input terminal of A1 is electrically connected to the lower end of R1, the reverse input terminal of A1 is grounded, the output terminal of A1 is electrically connected to the left end of R2, the right end of R2 is electrically connected to the same-direction input terminal of A2, the left end of R3 is electrically connected to the output terminal of A4, the right end of R3 is electrically connected to the reverse input terminal of A2, the output terminal of A2 is electrically connected to the same-direction input terminal of A3, the reverse input terminal of A3 is electrically connected to the output terminal of A3, the reverse input terminal of A3 is electrically connected to the same-direction input terminal of A4 at the same time, the reverse input terminal of A3 is connected to the upper end of RS, the lower end of RS is connected to the reverse input terminal of A4 and I, and A2, A3, and A4 are connected in series in sequence to form a voltage-current conversion circuit with deep negative feedback.

[0012] Furthermore, the RS includes relays S9-S16 and resistors RS1-RS8, the reverse input end of A3 is electrically connected to the upper ends of relays S9-S16, the lower ends of relays S9-S16 are electrically connected to the upper ends of resistors RS1-RS8 respectively, and the lower ends of resistors RS1-RS8 are all connected to the reverse input end of A4.

[0013] Furthermore, A1 is a first differential amplifier, A2 is a high-speed operational amplifier, A3 is a power amplifier, A4 is a second differential amplifier, and I is an output current.

[0014] Furthermore, the physical load capacitors include high-voltage relays S1-S8 and 8 physical high-voltage load capacitors.

[0015] Furthermore, the eight high-voltage load capacitors are 100pf, 500pf, 1nf, 5nf, 10nf, 50nf, 100nf, and 500nf, respectively, and the eight high-voltage load capacitors are all grounded.

[0016] Furthermore, the upper ends of S1, S2, S3, S4, S5, S6, S7 and S8 are all electrically connected to U, the lower end of S1 is electrically connected to a load capacitor of 100pf, the lower end of S2 is electrically connected to a load capacitor of 500pf, the lower end of S3 is electrically connected to a load capacitor of 1nf, the lower end of S4 is electrically connected to a load capacitor of 5nf, the lower end of S5 is electrically connected to a load capacitor of 10nf, the lower end of S6 is electrically connected to a load capacitor of 50nf, the lower end of S7 is electrically connected to a load capacitor of 100nf, and the lower end of S8 is electrically connected to a load capacitor of 500nf.

[0017] The utility model has the following technical effects:

[0018] 1. When the utility model is in use, the loss value can be changed by adjusting the resistor RX.

[0019] 2. When the utility model is in use, the size of the current required is set to simulate capacitance values ​​of different sizes.

[0020] 3. When the utility model is in use, the capacitance measured by the dielectric loss tester can be changed by changing the size of I. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 The utility model is a circuit connection diagram of a dielectric loss standard.

[0023] The numbers in the figure represent:

[0024] 1. Loss value adjustment module; 2. Simulated capacitance value adjustment module; 3. Physical load capacitance module. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solution and advantages of the embodiment of the utility model clearer, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is a part of the embodiment of the utility model, not all of the embodiments. Based on the embodiment of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0026] The utility model is further described below in conjunction with embodiments.

[0027] Example 1

[0028] Please refer to the instruction manual Figure 1 A dielectric loss standard includes a loss value adjustment module 1, wherein the loss value adjustment module 1 is connected to a simulation capacitance value adjustment module 2 and a physical load capacitance module 3.

[0029] The loss value adjustment module 1 is used to adjust the loss value, the capacitance value adjustment module 2 simulates capacitance values ​​of different sizes according to the required current size, and the physical load capacitance module 3 is mainly used to verify the load capacity of the dielectric loss factor tester. At the same time, it has a filtering effect to improve the signal-to-noise ratio of the simulated capacitance.

[0030] Example 2

[0031] like Figure 1 As shown, as a preferred embodiment of the utility model, the loss value adjustment module 1 includes C0, U, RX and R1, the top of C0 is electrically connected to U, the bottom of C0 is electrically connected to one end of RX, the other end of RX is electrically connected to one end of the sampling resistor R1, the other end of the sampling resistor R1 is grounded, U is connected to the physical load capacitance module 3, and R1 is connected to the analog capacitance value adjustment module 2.

[0032] The C0 is a high-voltage standard capacitor, U is a high-voltage terminal, RX is a digitally controlled adjustable resistor, and R1 is a sampling resistor.

[0033] The analog capacitance value adjustment module 2 includes A1, A2, A3, A4, RS, R2 and R3; the same-direction input terminal of A1 is electrically connected to the upper end of R1, the reverse input terminal of A1 is electrically connected to the lower end of R1, the reverse input terminal of A1 is grounded, the output terminal of A1 is electrically connected to the left end of R2, the right end of R2 is electrically connected to the same-direction input terminal of A2, the left end of R3 is electrically connected to the output terminal of A4, the right end of R3 is electrically connected to the reverse input terminal of A2, the output terminal of A2 is electrically connected to the same-direction input terminal of A3, the reverse input terminal of A3 is electrically connected to the output terminal of A3, the reverse input terminal of A3 is electrically connected to the same-direction input terminal of A4 at the same time, the reverse input terminal of A3 is connected to the upper end of RS, the lower end of RS is connected to the reverse input terminal and I of A4, and A2, A3, and A4 are connected in series in sequence to form a voltage-current conversion circuit with deep negative feedback.

[0034] The RS includes relays S9-S16 and resistors RS1-RS8, the reverse input end of A3 is electrically connected to the upper ends of relays S9-S16, the lower ends of relays S9-S16 are electrically connected to the upper ends of resistors RS1-RS8 respectively, and the lower ends of resistors RS1-RS8 are all connected to the reverse input end of A4.

[0035] A1 is a first differential amplifier, A2 is a high-speed operational amplifier, A3 is a power amplifier, A4 is a second differential amplifier, and I is an output current.

[0036] Since R1 is the sampling resistor of the current I1 flowing through the standard capacitor C0, ,

[0037] It is used to convert the current I1 flowing through the high-voltage standard capacitor C0 into a voltage signal V2 through R1, with an amplification factor of K;

[0038]

[0039] The working principle of the voltage-to-current conversion circuit with deep negative feedback is as follows: Since R2=R3, according to the virtual short of the operational amplifier A2:

[0040] The output voltage V3 of operational amplifier A4 is:

[0041] in Represents one of RS1-RS8, and controls relays S9-S16 according to the amplification factor to select one of RS1-RS8 to conduct the resistor;

[0042] because

[0043] so

[0044]

[0045] Where M is the current magnification, K is the magnification, , since K and R1 are both fixed values, the current amplification factor can be changed by controlling the size of Rs;

[0046] because , the simulated current I retains the phase angle information of the original current I1, thus achieving the loss value under different capacitances.

[0047] This utility model uses a series model to simulate the standard loss value. According to the series model of resistors, the loss value of this model is

[0048]

[0049] Therefore, the loss value can be changed by adjusting the resistor RX.

[0050] According to Ohm's law of impedance,

[0051]

[0052]

[0053] Since the current measuring end of the dielectric loss tester is connected in series between the current output end I and the ground, the capacitance measured by the dielectric loss tester can be changed by simply changing the size of I.

[0054] When one of RS1-RS8 is turned on by controlling relays S9-S16, the When the size of M is changed, the size of M can be changed. , and the capacitance measured by the dielectric loss tester is

[0055] Therefore, to simulate a larger capacitance value, the size of the corresponding capacitance C0 can be simulated by simply changing the current amplification factor M.

[0056] Example 3

[0057] like Figure 1 As shown, as a preferred embodiment of the present utility model, the physical load capacitor 3 includes high-voltage relays S1-S8 and 8 physical high-voltage load capacitors.

[0058] The eight high-voltage load capacitors are 100pf, 500pf, 1nf, 5nf, 10nf, 50nf, 100nf, and 500nf, respectively, and all of the eight high-voltage load capacitors are grounded.

[0059] The upper ends of S1, S2, S3, S4, S5, S6, S7 and S8 are all electrically connected to U, the lower end of S1 is electrically connected to a load capacitor of 100pf, the lower end of S2 is electrically connected to a load capacitor of 500pf, the lower end of S3 is electrically connected to a load capacitor of 1nf, the lower end of S4 is electrically connected to a load capacitor of 5nf, the lower end of S5 is electrically connected to a load capacitor of 10nf, the lower end of S6 is electrically connected to a load capacitor of 50nf, the lower end of S7 is electrically connected to a load capacitor of 100nf, and the lower end of S8 is electrically connected to a load capacitor of 500nf.

[0060] When 100pf is to be simulated, S1 is controlled to be turned on and the other 7 relays are disconnected; when 500pf is to be simulated, S2 is controlled to be turned on and the other 7 relays are disconnected; when 1nf is to be simulated, S3 is controlled to be turned on and the other 7 relays are disconnected; when 5nf is to be simulated, S4 is controlled to be turned on and the other 7 relays are disconnected; when 10nf is to be simulated, S5 is controlled to be turned on and the other 7 relays are disconnected; when 50nf is to be simulated, S6 is controlled to be turned on and the other 7 relays are disconnected; when 100nf is to be simulated, S7 is controlled to be turned on and the other 7 relays are disconnected; when 500nf is to be simulated, S8 is controlled to be turned on and the other 7 relays are disconnected; the load capacity of the dielectric loss factor tester is verified, and at the same time there is a filtering effect, which improves the signal-to-noise ratio of the simulated capacitance.

[0061] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements will not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A dielectric loss standard, comprising a loss value adjustment module (1), characterized in that: The loss value adjustment module (1) is connected to a simulation capacitance value adjustment module (2) and a physical load capacitance module (3).

2. The dielectric loss standard according to claim 1, characterized in that: The loss value adjustment module (1) comprises C0, U, RX and R1, the top end of C0 is electrically connected to U, the bottom end of C0 is electrically connected to one end of RX, the other end of RX is electrically connected to one end of a sampling resistor R1, the other end of the sampling resistor R1 is grounded, U is connected to a physical load capacitance module (3), and R1 is connected to an analog capacitance value adjustment module (2).

3. The dielectric loss standard according to claim 2, characterized in that: The C0 is a high-voltage standard capacitor, U is a high-voltage terminal, RX is a digitally controlled adjustable resistor, and R1 is a sampling resistor.

4. The dielectric loss standard according to claim 3, characterized in that: The analog capacitance value adjustment module (2) comprises I, A1, A2, A3, A4, RS, R2 and R3; the same-direction input end of A1 is electrically connected to the upper end of R1, the reverse input end of A1 is electrically connected to the lower end of R1, the reverse input end of A1 is grounded, the output end of A1 is electrically connected to the left end of R2, the right end of R2 is electrically connected to the same-direction input end of A2, the left end of R3 is electrically connected to the output end of A4, the right end of R3 is electrically connected to the reverse input end of A2, the output end of A2 is electrically connected to the same-direction input end of A3, the reverse input end of A3 is electrically connected to the output end of A3, the reverse input end of A3 is electrically connected to the same-direction input end of A4 at the same time, the reverse input end of A3 is connected to the upper end of RS, the lower end of RS is connected to the reverse input end of A4 and I, and A2, A3 and A4 are connected in series in sequence to form a deep negative feedback voltage-current conversion circuit.

5. The dielectric loss standard according to claim 4, characterized in that: The RS includes relays S9-S16 and resistors RS1-RS8, the reverse input end of A3 is electrically connected to the upper ends of relays S9-S16, the lower ends of relays S9-S16 are electrically connected to the upper ends of resistors RS1-RS8 respectively, and the lower ends of resistors RS1-RS8 are all connected to the reverse input end of A4.

6. The dielectric loss standard according to claim 5, characterized in that: A1 is a first differential amplifier, A2 is a high-speed operational amplifier, A3 is a power amplifier, A4 is a second differential amplifier, and I is an output current.

7. The dielectric loss standard according to claim 6, characterized in that: The physical load capacitor module (3) comprises high-voltage relays S1-S8 and 8 physical high-voltage load capacitors.

8. The dielectric loss standard according to claim 7, characterized in that: The eight high-voltage load capacitors are 100pf, 500pf, 1nf, 5nf, 10nf, 50nf, 100nf, and 500nf, respectively, and all of the eight high-voltage load capacitors are grounded.

9. The dielectric loss standard according to claim 8, characterized in that: The upper ends of S1, S2, S3, S4, S5, S6, S7 and S8 are all electrically connected to U, the lower end of S1 is electrically connected to a load capacitor of 100pf, the lower end of S2 is electrically connected to a load capacitor of 500pf, the lower end of S3 is electrically connected to a load capacitor of 1nf, the lower end of S4 is electrically connected to a load capacitor of 5nf, the lower end of S5 is electrically connected to a load capacitor of 10nf, the lower end of S6 is electrically connected to a load capacitor of 50nf, the lower end of S7 is electrically connected to a load capacitor of 100nf, and the lower end of S8 is electrically connected to a load capacitor of 500nf.

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