Pixel array and pixel circuit of image sensor

Abstract

The utility model describes a pixel circuit and a pixel array of an image sensor, and the pixel circuit comprises a first photosensitive unit which is configured to receive an optical signal in a first exposure duration so as to generate a first image signal; a first floating diffusion node connected to the first photosensitive unit; the first transfer transistor is connected between the first photosensitive unit and the first floating diffusion node; the gain control circuit is connected with the first floating diffusion node so as to collect a second image signal generated under a second exposure time length and collect a third image signal generated under a third exposure time length, and the second exposure time length is smaller than the first exposure time length and smaller than the third exposure time length; the gain control circuit at least stores the third image signal in the overflow unit and then outputs the third image signal; the reset circuit is connected between the gain control circuit and the first power supply voltage; the readout circuit is connected to the first floating diffusion node. According to the pixel circuit, the dynamic range can be enlarged, and the problem of motion artifacts is solved.

Description

Technical Field

[0001] The utility model relates to the field of image sensors, in particular to a pixel array of an image sensor and a pixel circuit of the image sensor. Background Art

[0002] With the increasing demand for image acquisition in the fields of consumption, security, medical, and automotive, higher requirements are also placed on imaging performance in different scenarios. High dynamic range imaging can obtain more details and light and dark contrast in the scene. The main HDR implementation methods currently include time domain multi-frame synthesis, line interleaving, dual conversion gain (DCG), and SubPixel technology. Time domain multi-frame synthesis and line interleaving HDR capture different frames at different times, which can easily cause motion artifacts in fast-moving vehicle scenes and pose a safety hazard. DCG HDR is limited by full well capacity and cannot obtain a large dynamic range gain. In addition, objects that use high-frequency flickering LED light sources, such as traffic lights, need to make the exposure time longer than the light-emitting period to avoid capturing the light-off state. The small photodiodes in SubPixel technology are usually set to long exposure to suppress LED flicker.

[0003] Existing high dynamic range CMOS image sensor technologies such as Figure 1 As shown, DCG+SubPixel+lofic (lateral overflow collective capacitor) technology is adopted, including a normal photodiode, a single small photodiode and an in-pixel capacitor. By switching DCG to achieve high and low gain conversion, the sensor can output three pictures of different sensitivities collected at the same time, and obtain a high HDR image after algorithm synthesis. In order to achieve LED flicker suppression, the exposure time of the small photodiode needs to cover the LED light-emitting cycle. Usually, the small photodiode adds an anti-transmission layer to reduce the amount of light entering, and combines it with lofic. When the charge exceeds the maximum full well of the small photodiode, the excess capacitance will overflow into the adjacent lofic capacitor to avoid overexposure. However, for highlight information that requires a short exposure time, it is still impossible to collect it at the same time, and a multiple exposure method needs to be adopted, which is prone to motion artifacts. Therefore, the utility model intends to design an image sensor with an ultra-high dynamic range that can simultaneously capture ultra-short exposure and long exposure pictures. Utility Model Content

[0004] In view of this, the utility model provides a pixel circuit of an image sensor, comprising: a first photosensitive unit, configured to receive a light signal within a first exposure time to generate a first image signal; a first floating diffusion node, connected to the first photosensitive unit, to receive the first image signal; a first transfer transistor, connected between the first photosensitive unit and the first floating diffusion node, to transfer the first image signal from the first photosensitive unit to the first floating diffusion node; a gain control circuit, connected to the first floating diffusion node, to collect a second image signal generated under a second exposure time and to collect a third image signal generated under a third exposure time, wherein the second exposure time is less than the first exposure time and less than the third exposure time, and the gain control circuit at least stores the third image signal in an overflow unit and then outputs it, so that the second image signal is output through a first transfer path and the third image signal is output through a second transfer path; a reset circuit, connected between the gain control circuit and a first power supply voltage, to reset at least one of the first floating diffusion node, the first photosensitive unit and the gain control circuit; a readout circuit, connected to the first floating diffusion node, configured to output an electrical signal according to a current charge signal of the first floating diffusion node.

[0005] Optionally, the gain control circuit includes: a gain control transistor connected to the first floating diffusion node to switch between different gain modes according to a gain control signal; a second floating diffusion node connected between the gain control transistor and the reset circuit and coupled to the first floating diffusion node through the gain control transistor; a first gain branch connected to the second floating diffusion node to capture the second image signal within the second exposure time and output the second image signal to the second floating diffusion node through the first transfer path; a second gain branch connected to the second floating diffusion node to capture the third image signal within the third exposure time and store it in the overflow unit, and output the third image signal to the second floating diffusion node through the second transfer path.

[0006] Optionally, the first gain branch includes: a second photosensitive unit, which collects the second image signal within the second exposure time; a second transfer transistor, which is connected between the second photosensitive unit and the first floating diffusion node, and is used to output the second image signal generated by the second photosensitive unit to the second floating diffusion node to form the first transfer path.

[0007] Optionally, the first gain branch includes a second photosensitive unit, a second transfer transistor, a first overflow capacitor and a first quantization transistor; the second photosensitive unit collects the second image signal within the second exposure time, and the second transfer transistor is connected to the second photosensitive unit to output the second image signal; one end of the first overflow capacitor is connected between the second transfer transistor and the first quantization transistor, and the other end is connected to the ground potential or the variable potential, and the first quantization transistor is also connected to the second floating diffusion node; the first overflow capacitor is used to store the second image signal within the second exposure time to constitute the overflow unit, and the first overflow capacitor is also used to output the second image signal to the second floating diffusion node through the first quantization transistor to constitute the first transfer path.

[0008] Optionally, the second gain branch includes a third photosensitive unit, a third transfer transistor, a second overflow capacitor and a second quantization transistor; the third photosensitive unit collects the third image signal within the third exposure time, and the third transfer transistor is connected to the third photosensitive unit to output the third image signal; one end of the second overflow capacitor is connected between the third transfer transistor and the second quantization transistor, and the other end is connected to the ground potential or the variable potential, and the second quantization transistor is also connected to the second floating diffusion node; the second overflow capacitor is used to store the third image signal within the third exposure time to constitute the overflow unit, and the second overflow capacitor is also used to output the third image signal to the second floating diffusion node through the second quantization transistor to constitute the second transfer path.

[0009] Optionally, the reset circuit includes a reset transistor, whose control end receives a reset control signal, a first end is connected to the first power supply voltage, and a second end is connected to the first floating diffusion node; and / or, the readout circuit includes at least a source follower transistor and a selection transistor, the control end of the source follower transistor is connected to the first floating diffusion node, the first end is connected to the second power supply voltage, the second end is connected to the first end of the selection transistor, the control end of the selection transistor receives a selection signal, and the second end is connected to a column line.

[0010] The present application also provides a pixel array of an image sensor, comprising: a first photosensitive unit, a second photosensitive unit and a third photosensitive unit, wherein the full well capacity of the first photosensitive unit is greater than the full well capacity of the second photosensitive unit and is greater than or equal to the full well capacity of the third photosensitive unit, and the exposure time of the second photosensitive unit is less than the exposure time of the first photosensitive unit and is less than the exposure time of the third photosensitive unit.

[0011] Optionally, the first photosensitive units are arranged in the pixel array along a first direction and a second direction, wherein the first direction is perpendicular to the second direction; in the first direction, the second photosensitive units and the third photosensitive units are located between adjacent first photosensitive units, and in the second direction, the second photosensitive units and the third photosensitive units are arranged alternately in sequence.

[0012] Optionally, the first photosensitive units are arranged in rows and columns in the pixel array, the second photosensitive units are located at vertices of the first photosensitive units, and the third photosensitive units are located at the center of the first photosensitive units.

[0013] Optionally, each of the first photosensitive units consists of n 2 The second photosensitive unit is located at the vertex of the first photosensitive unit, and the third photosensitive unit is located at the center of the first photosensitive unit.

[0014] Compared with the prior art, the present invention has at least the following outstanding advantages:

[0015] The present application obtains image information under short exposure and image information under long exposure through a gain control circuit, and combines the image information under normal exposure generated by the first photosensitive unit to linearly combine multiple signals of the same period, thereby obtaining a signal with a high dynamic range output; at the same time, when the collected charge signal exceeds the maximum full well capacity of the small photodiode, it is easy to cause overexposure. By setting an overflow capacitor in the gain control circuit, the excess charge signal will overflow into the adjacent overflow capacitor, thereby further improving the dynamic range while avoiding overexposure. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a structural schematic diagram of a pixel circuit of an image sensor in the prior art;

[0017] Figure 2 It is a structural schematic diagram of a pixel circuit of an image sensor provided by the present application;

[0018] Figure 3 is a structural schematic diagram of a pixel circuit of another image sensor provided by the present application;

[0019] Figure 4 is a structural schematic diagram of a pixel circuit of another image sensor provided by the present application;

[0020] Figure 5 is a structural schematic diagram of a pixel circuit of another image sensor provided by the present application;

[0021] Figure 6is a working timing diagram of the pixel circuit provided by the present application during the exposure phase;

[0022] Figure 7 is a working timing diagram of the pixel circuit provided by the present application in the quantization stage;

[0023] Figure 8 is a structural schematic diagram of a pixel array provided by the present application;

[0024] Fig. 9 is a schematic structural diagram of another pixel array provided by the present application;

[0025] Fig.10 is a structural schematic diagram of another pixel array provided by the present application;

[0026] Fig.11 is a structural schematic diagram of another pixel array provided by the present application;

[0027] Fig.12 This is a structural schematic diagram of another pixel array provided in this application. DETAILED DESCRIPTION

[0028] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0029] It should be noted that the following description sets forth specific details to facilitate a full understanding of the present invention. However, the present invention can be implemented in a variety of other ways different from those described herein, and those skilled in the art can make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0030] Please refer to Figure 2 , Figure 2 The present invention is a pixel circuit of an image sensor in an embodiment of the present invention, and the pixel circuit includes:

[0031] A first photosensitive unit PD is configured to receive a light signal within a first exposure time to generate a first image signal;

[0032] A first floating diffusion node FD is connected to the first photosensitive unit PD to receive a first image signal;

[0033] a first transfer transistor TX connected between the first photosensitive unit PD and the first floating diffusion node FD1 to transfer the first image signal from the first photosensitive unit PD to the first floating diffusion node FD1;

[0034] The gain control circuit 10 is connected to the first floating diffusion node FD1 to collect the second image signal generated under the second exposure time and the third image signal generated under the third exposure time, wherein the second exposure time is less than the first exposure time and less than the third exposure time, that is, the gain control circuit 10 can obtain image information under short exposure and image information under long exposure and output them, and the gain control circuit 10 at least stores the third image signal in the overflow unit and then outputs it, so that the second image signal is output through the first transfer path and the third image signal is output through the second transfer path;

[0035] A reset circuit 20 connected between the gain control circuit 10 and the first power supply voltage AVDD_1 to reset at least one of the first floating diffusion node FD1, the first photosensitive unit PD and the gain control circuit 10;

[0036] The readout circuit 30 is connected to the first floating diffusion node FD1 and is configured to output an electrical signal according to a current charge signal of the first floating diffusion node FD. It can be understood that the current charge signal includes one of a plurality of reset signals, a first image signal, a second image signal and a third image signal.

[0037] Based on the above pixel circuit, the present application also provides a control method for the pixel circuit, including an exposure stage and a quantization stage, wherein the exposure stage includes:

[0038] S11: performing a reset operation on the first floating diffusion node FD1, the first photosensitive unit PD and the gain control circuit 10;

[0039] S12: The first photosensitive unit PD collects a first image signal generated within a first exposure time, the gain control circuit 10 collects a second image signal generated under a second exposure time, and collects a third image signal generated under a third exposure time and stores at least the third image signal in an overflow unit, wherein the second exposure time is less than the first exposure time and less than the third exposure time.

[0040] Furthermore, the quantification phase includes:

[0041] S21: quantize and read out the first reset signal based on the first floating diffusion node FD1, then control the first transfer path to be opened and then closed, and transfer the second image signal to the first floating diffusion node FD1 through the first transfer path for quantization and read out;

[0042] S22: performing a reset operation on the first floating diffusion node FD1;

[0043] S23: Turn on the gain control circuit 10, and perform quantization reading of the second reset signal at low gain based on the first floating diffusion node FD1; turn off the gain control circuit 10, and perform quantization reading of the third reset signal at high gain and the first image signal at high gain based on the first floating diffusion node FD1; turn on the gain control circuit 10, and perform quantization reading of the first image signal at low gain based on the first floating diffusion node FD1;

[0044] S24: resetting the first floating diffusion node FD1;

[0045] S25: quantize and read out the fourth reset signal based on the first floating diffusion node FD1, and then control the second transfer path to be opened and then closed, and transfer the third image signal to the first floating diffusion node FD1 through the second transfer path for quantization and read out.

[0046] In this embodiment, the image information under short exposure and the image information under long exposure are obtained through the gain control circuit, and combined with the image information under normal exposure generated by the first photosensitive unit, multiple signals in the same period are linearly combined to obtain a signal with a high dynamic range output; at the same time, when the collected charge signal exceeds the maximum full well capacity of the small photodiode, it is easy to cause overexposure. By setting an overflow unit in the gain control circuit, the excess charge signal will overflow into the adjacent overflow unit, thereby further improving the dynamic range while avoiding overexposure.

[0047] In some embodiments, Figure 3 As shown, the gain control circuit 10 includes:

[0048] A gain control transistor DCG connected to the first floating diffusion node FD1 to switch between different gain modes according to a gain control signal;

[0049] A second floating diffusion node FD2 is connected between the gain control transistor DCG and the reset circuit 20 and is coupled to the first floating diffusion node FD1 through the gain control transistor DCG;

[0050] The first gain branch 110 is connected to the second floating diffusion node FD2 to collect the second image signal within the second exposure time, and output the second image signal to the second floating diffusion node FD2 through the first transfer path; it can be understood that since the second exposure time is less than the first exposure time and less than the third exposure time, the second image signal is the image information under the short exposure time, that is, the first gain branch 110 is used to obtain the image information under the short exposure time;

[0051] The second gain branch 120 is connected to the second floating diffusion node FD2 to collect the third image signal within the third exposure time and store it in the overflow unit, and output the third image signal to the second floating diffusion node FD2 through the second transfer path; it can be understood that since the second exposure time is less than the first exposure time and less than the third exposure time, the third image signal is the image information under the long exposure time, that is, the second gain branch 120 is used to obtain the image information under the long exposure time;

[0052] For example, Figure 4 As shown, the first gain branch 110 includes a second photosensitive unit SPD1 and a second transfer transistor TX_s1, the second photosensitive unit SPD1 collects a second image signal within a second exposure time, and the second transfer transistor TX_s1 is connected between the second photosensitive unit SPD1 and the second floating diffusion node FD2, and is used to output the second image signal generated by the second photosensitive unit SPD1 to the second floating diffusion node FD2, so as to form the first transfer path. In this embodiment, the second image signal is transferred from the second photosensitive unit SPD1 to the second transfer transistor TX_s1 and then to the second floating diffusion node FD2 as the first transfer path.

[0053] For example, Figure 5 As shown, the first gain branch includes a second photosensitive unit SPD1, a second transfer transistor TX_s1, a first overflow capacitor SPD_MIM1 and a first quantization transistor FD_s1;

[0054] The second photosensitive unit SPD1 collects the second image signal within the second exposure time, and the second transfer transistor TX_s1 is connected to the second photosensitive unit SPD1 to output the second image signal; the first end of the first overflow capacitor SPD_MIM1 is connected between the second transfer transistor TX_s1 and the first quantization transistor FD_s1, and the second end is connected to the ground potential GND or the variable potential VRM_s1, and the other end of the first quantization transistor FD_s1 is connected to the second floating diffusion node FD2; the first overflow capacitor SPD_MIM1 is used to store the second image signal within the second exposure time to form an overflow unit, and the first overflow capacitor SPD_MIM1 is also used to output the second image signal to the second floating diffusion node FD2 through the first quantization transistor FD_s1 to form a first transfer path. In this embodiment, the first overflow capacitor SPD_MIM1 constitutes a part of the overflow unit, and the second image signal is transferred from the second photosensitive unit SPD1 to the second transfer transistor TX_s1, the first overflow capacitor SPD_MIM1, and coupled to the second floating diffusion node FD2 through the first quantization transistor FD_s1 as the first transfer path, compared to Figure 4 The gain control circuit shown, Figure 5The gain control circuit in the corresponding embodiment stores the second image signal in the overflow unit and then outputs it. By setting the first overflow capacitor SPD_MIM1, when the photogenerated charge in the second photosensitive unit SPD1 reaches the full well capacity, the charge can overflow to the first overflow capacitor SPD_MIM1, thereby improving the dynamic range.

[0055] Exemplary, reference Figure 4 and Figure 5 The second gain branch 120 includes a third photosensitive unit SPD2, a third transfer transistor TX_s2, a second overflow capacitor SPD_MIM2 and a second quantization transistor FD_s2; the third photosensitive unit SPD2 collects a third image signal within a third exposure time, and the third transfer transistor TX_s2 is connected to the third photosensitive unit SPD2 to output the third image signal; the first end of the second overflow capacitor SPD_MIM2 is connected between the third transfer transistor TX_s2 and the second quantization transistor FD_s2, and the second end is connected to the ground potential or the variable potential, and the other end of the second quantization transistor FD_s2 is connected to the second floating diffusion node FD2; the second overflow capacitor SPD_MIM2 is used to store the third image signal within the third exposure time to form an overflow unit, and the second overflow capacitor SPD_MIM2 is also used to output the third image signal to the second floating diffusion node FD2 through the second quantization transistor FD_s2 to form a second transfer path. In this embodiment, the third image signal is transferred from the third photosensitive unit SPD2 to the third transfer transistor TX_s2, the second overflow capacitor SPD_MIM2 and through the second quantization transistor FD_s2 as a second transfer path. In this embodiment, by setting a second overflow capacitor, when the photogenerated charge in the third photosensitive unit SPD2 reaches the full well capacity, the charge can overflow to the second overflow capacitor SPD_MIM2, thereby improving the dynamic range.

[0056] For example, continue to refer to Figure 4 and Figure 5 The reset circuit 20 includes a reset transistor RST, whose control end receives a reset control signal, a first end is connected to the first power supply voltage AVDD_1, and a second end is coupled to the first floating diffusion node FD1; and / or, the readout circuit 30 includes at least a source follower transistor SF and a selection transistor SEL, the control end of the source follower transistor SF is connected to the first floating diffusion node FD1, the first end is connected to the second power supply voltage AVDD_2, the second end is connected to the first end of the selection transistor SEL, the control end of the selection transistor SEL receives a selection control signal, and the second end is connected to the column line Bitline.

[0057] Optionally, the first power supply voltage AVDD_1 and the second power supply voltage AVDD_2 are the same power supply voltage.

[0058] Figure 5 Please refer to the working timing of the pixel circuit shown in Figure 6 and Figure 7 ,in, Figure 6 is the working timing of the pixel circuit in the exposure stage, Figure 7 is the working timing of the pixel circuit in the quantization stage.

[0059] Specifically, in the exposure phase, the reset transistor RST in the reset circuit 20 is in a normally-on state, wherein at time t2-t4, the reset operation includes resetting the first photosensitive unit PD after turning on the first transfer transistor TX, resetting the first overflow capacitor SPD_MIM1 and the second photosensitive unit SPD1 after turning on the second transfer transistor TX_s1 and the first quantization transistor FD_s1, respectively, and resetting the second overflow capacitor SPD_MIM2 and the third photosensitive unit SPD2 after turning on the third transfer transistor TX_s2 and the second quantization transistor FD_s2. After the reset is completed, each transfer transistor and quantization transistor are turned off to continuously expose each photosensitive unit. In the exposure extreme, the power supply voltage can apply a variable potential to the lower plate VRM_s1 of the first overflow capacitor SPD_MIM1 or the lower plate VRM_s2 of the second overflow capacitor SPD_MIM2, thereby attracting at least some image charges among the photogenerated charges when the first overflow capacitor SPD_MIM1 is coupled to the second photosensitive unit SPD1 or the second overflow capacitor SPD_MIM2 is coupled to the third photosensitive unit SPD2, thereby expanding the dynamic range of the image sensor.

[0060] After the short exposure of the second photosensitive unit SPD1 is completed, the reset transistor RST is turned off to prepare for entering the quantization stage.

[0061] Specifically, in the quantization stage, the selection transistor SEL is in a normally-on state;

[0062] At time t10-t11, the gain control transistor DCG is turned on to quantize the first reset signal SPD1_Rst;

[0063] At time t11-t15, the second transfer transistor TX_s1 and the first quantization transistor FD_s1 are turned on and then turned off, so that the charge collected by the second photosensitive unit SPD1 during the second exposure time is transferred to the second floating diffusion node FD2 through the first transfer path, and coupled to the first floating diffusion node FD1 through the gain control transistor DCG, so as to quantize the second image signal SPD1_Sig;

[0064] At time t15-t17, the reset transistor RST is turned on to reset the first floating diffusion node FD1 and the second floating diffusion node FD2 for the next quantization;

[0065] At time t17-t18, the reset transistor RST is turned off, and the second reset signal PD_LCG_Rst is quantized in the low conversion gain LCG mode;

[0066] At time t18-t19, the gain control transistor DCG is turned off, and the third reset signal PD_HCG_Rst is quantized in the high conversion gain HCG mode;

[0067] At time t19-t21, the first transfer transistor TX is turned on and then turned off, so that the charge collected by the first photosensitive unit PD in the first exposure time is transferred to the first floating diffusion node FD1, so as to quantize the first image signal PD_HCG_Sig under high gain in the high conversion gain HCG mode;

[0068] At time t21-t24, the gain control transistor DCG is turned on, and the first transfer transistor TX is turned on and then turned off, so as to quantize the first image signal PD_LCG_Sig at low gain in the low conversion gain LCG mode;

[0069] At time t24-t25, the reset transistor RST is turned on again to reset the first floating diffusion node FD1 and the second floating diffusion node FD2 again for the next quantization;

[0070] At time t25-t26, the fourth reset signal SPD2_Rst is quantized;

[0071] At time t26-t29, the third transfer transistor TX_s1 and the second quantization transistor FD_s1 are turned on and then turned off, so that the charge collected by the third photosensitive unit SPD2 during the third exposure time is transferred to the second floating diffusion node FD2 through the second transfer path, and coupled to the first floating diffusion node FD1 through the gain control transistor DCG, so as to quantize the third image signal SPD2_Sig;

[0072] In the embodiment of the present application, four groups of reset signals and image signals can be obtained under a single exposure, and the signal quantization is all in CDS (correlated double sampling) mode. Among them, the charges in the second photosensitive unit SPD1 and the first overflow capacitor SPD_MIM1 under short exposure time are first quantified in the low conversion gain LCG mode, and the reset signal and the second image signal are read, and then the reset signal and the first image signal of the first photosensitive unit PD in the low conversion gain LCG and high conversion gain HCG modes are read respectively through high and low gain conversion, and finally the third photosensitive unit SPD2 under the long exposure time of flicker suppression is quantified, and the corresponding reset signal and the third image signal are read in combination with the charge in the second overflow capacitor SPD_MIM2, and the signals in the four modes are linearly combined in the subsequent image processing, so that the signal high dynamic range output can be obtained, which solves the motion artifact problem caused by the multiple exposure mode.

[0073] The present application also provides a pixel array of an image sensor, which includes a first photosensitive unit PD, a second photosensitive unit SPD1 and a third photosensitive unit SPD2, wherein the full well capacity of the first photosensitive unit PD is greater than the full well capacity of the second photosensitive unit SPD1 and is greater than or equal to the full well capacity SPD2 of the third photosensitive unit, and the exposure time of the second photosensitive unit SPD1 is less than the exposure time of the first photosensitive unit PD and is less than the exposure time of the third photosensitive unit SPD2.

[0074] In some embodiments, Figure 8-Figure 10 As shown, the first photosensitive units PD are arranged in the pixel array along a first direction X and a second direction Y, wherein the first direction X is perpendicular to the second direction Y;

[0075] In the first direction X, the second photosensitive unit SPD1 and the third photosensitive unit SPD2 are located between adjacent first photosensitive units PD. In the second direction Y, the second photosensitive unit SPD1 and the third photosensitive unit SPD2 are alternately arranged in sequence.

[0076] refer to Figure 8 In the pixel array shown, only one group of second photosensitive units SPD1 and third photosensitive units SPD2 is disposed between two adjacent first photosensitive units PD, and the group of second photosensitive units SPD1 and third photosensitive units SPD2 are alternately arranged along the second direction Y.

[0077] refer to Figure 9-10 In the pixel array shown, two groups of second photosensitive units SPD1 and third photosensitive units SPD2 are arranged between two adjacent first photosensitive units PD. Fig. 9 In the embodiment, the two second photosensitive units SPD1 and the two third photosensitive units SPD2 are respectively located on one side and the other side along the second direction Y; Fig.10In the two groups of second photosensitive units SPD1 and third photosensitive units SPD2, two second photosensitive units SPD1 are diagonally arranged, and the other two third photosensitive units SPD2 are also diagonally arranged. In the embodiment of the present application, the positions of the second photosensitive units SPD1 and the third photosensitive units SPD2 can be designed according to actual needs and are not limited here.

[0078] In other embodiments, Fig.11 As shown, the first photosensitive unit PD is arranged in rows and columns in the pixel array, the second photosensitive unit SPD1 is located at the vertex of the first photosensitive unit PD, and the third photosensitive unit SPD2 is located at the center of the first photosensitive unit PD. In the embodiment of the present application, since a corresponding microlens is arranged above each first photosensitive unit to converge light, the second photosensitive unit is arranged at the vertex of the first photosensitive unit, that is, at the edge of the microlens, which can reduce its light intake, and the third photosensitive unit is arranged at the center of the first photosensitive unit, that is, at the center of the microlens, which is conducive to converging light and increasing the light intake; at the same time, by arranging the second photosensitive unit at the vertex of the first photosensitive unit and the third photosensitive unit at the center of the first photosensitive unit, the area of ​​the pixel array occupied by the second photosensitive unit and the third photosensitive unit can be further reduced, so that the arrangement density of the first photosensitive unit is improved.

[0079] In some other embodiments, each first photosensitive unit PD is composed of n 2 The second photosensitive unit is located at the vertex of the first photosensitive unit, and the third photosensitive unit is located at the center of the first photosensitive unit. Fig.12 As shown, each first photosensitive unit PD is composed of 2×2 pixels with the same color filter, the second photosensitive unit SPD1 is located at the vertex of the first photosensitive unit PD composed of four pixels, and the third photosensitive unit SPD2 is located at the center of the first photosensitive unit PD composed of four pixels. In the embodiment of the present application, on the basis of the first photosensitive unit using a four-Bayer array, since a corresponding microlens is arranged above each first photosensitive unit to converge light, the second photosensitive unit is arranged at the vertex of the first photosensitive unit, that is, at the edge of the microlens, which can reduce its light intake, and the third photosensitive unit is arranged at the center of the first photosensitive unit, that is, at the center of the microlens, which is conducive to converging light and increasing the light intake; at the same time, by arranging the second photosensitive unit at the vertex of the first photosensitive unit and the third photosensitive unit at the center of the first photosensitive unit, the area of ​​the pixel array occupied by the second photosensitive unit and the third photosensitive unit can be further reduced, so that the arrangement density of the first photosensitive unit is improved.

[0080] The above contents are further detailed descriptions of the present invention in combination with specific preferred implementations, and the specific implementation of the present invention cannot be considered to be limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A pixel circuit of an image sensor, characterized in that: include: A first photosensitive unit, configured to receive a light signal within a first exposure time to generate a first image signal; a first floating diffusion node connected to the first photosensitive unit to receive the first image signal; a first transfer transistor connected between the first photosensitive unit and the first floating diffusion node to transfer the first image signal from the first photosensitive unit to the first floating diffusion node; a gain control circuit connected to the first floating diffusion node to collect a second image signal generated at a second exposure time and a third image signal generated at a third exposure time, wherein the second exposure time is less than the first exposure time and less than the third exposure time, and the gain control circuit at least stores the third image signal in an overflow unit and then outputs it, so that the second image signal is output through a first transfer path and the third image signal is output through a second transfer path; a reset circuit connected between the gain control circuit and a first power supply voltage to reset at least one of the first floating diffusion node, the first photosensitive unit and the gain control circuit; The readout circuit is connected to the first floating diffusion node and is configured to output an electrical signal according to a current charge signal of the first floating diffusion node.

2. The pixel circuit according to claim 1, wherein: The gain control circuit comprises: a gain control transistor connected to the first floating diffusion node to switch between different gain modes according to a gain control signal; a second floating diffusion node connected between the gain control transistor and the reset circuit and coupled to the first floating diffusion node through the gain control transistor; a first gain branch connected to the second floating diffusion node to collect the second image signal within the second exposure time and output the second image signal to the second floating diffusion node through the first transfer path; The second gain branch is connected to the second floating diffusion node to collect the third image signal within the third exposure time and store it in the overflow unit, and output the third image signal to the second floating diffusion node through the second transfer path.

3. The pixel circuit according to claim 2, characterized in that: The first gain branch comprises: A second photosensitive unit, collecting the second image signal within the second exposure time; The second transfer transistor is connected between the second photosensitive unit and the second floating diffusion node, and is used to output the second image signal generated by the second photosensitive unit to the second floating diffusion node to form the first transfer path.

4. The pixel circuit according to claim 2, characterized in that: The first gain branch includes a second photosensitive unit, a second transfer transistor, a first overflow capacitor and a first quantization transistor; The second photosensitive unit collects the second image signal within the second exposure time, and the second transfer transistor is connected to the second photosensitive unit to output the second image signal; the first end of the first overflow capacitor is connected between the second transfer transistor and the first quantization transistor, and the second end is connected to a ground potential or a variable potential; The other end of the first quantization transistor is connected to a second floating diffusion node; The first overflow capacitor is used to store the second image signal within the second exposure time to form the overflow unit, and the first overflow capacitor is also used to output the second image signal to the second floating diffusion node through the first quantization transistor to form the first transfer path.

5. The pixel circuit according to claim 2, wherein: The second gain branch includes a third photosensitive unit, a third transfer transistor, a second overflow capacitor and a second quantization transistor; The third photosensitive unit collects the third image signal within the third exposure time, and the third transfer transistor is connected to the third photosensitive unit to output the third image signal; the first end of the second overflow capacitor is connected between the third transfer transistor and the second quantization transistor, the second end is connected to the ground potential or the variable potential, and the other end of the second quantization transistor is connected to the second floating diffusion node; The second overflow capacitor is used to store the third image signal within the third exposure time to form the overflow unit, and the second overflow capacitor is also used to output the third image signal to the second floating diffusion node through the second quantization transistor to form the second transfer path.

6. The pixel circuit according to claim 1, wherein: The reset circuit comprises a reset transistor, a control terminal of which receives a reset control signal, a first terminal of which is connected to the first power supply voltage, and a second terminal of which is connected to the first floating diffusion node; and / or, The readout circuit includes at least a source follower transistor and a selection transistor, wherein the control terminal of the source follower transistor is connected to the first floating diffusion node, the first terminal is connected to the second power supply voltage, the second terminal is connected to the first terminal of the selection transistor, the control terminal of the selection transistor receives a selection signal, and the second terminal is connected to the column line.

7. A pixel array of an image sensor, characterized in that: It includes a first photosensitive unit, a second photosensitive unit and a third photosensitive unit, wherein the full well capacity of the first photosensitive unit is greater than the full well capacity of the second photosensitive unit and is greater than or equal to the full well capacity of the third photosensitive unit, and the exposure time of the second photosensitive unit is less than the exposure time of the first photosensitive unit and is less than the exposure time of the third photosensitive unit.

8. The pixel array according to claim 7, wherein: The first photosensitive units are arranged in the pixel array along a first direction and a second direction, wherein the first direction is perpendicular to the second direction; In the first direction, the second photosensitive units and the third photosensitive units are located between adjacent first photosensitive units. In the second direction, the second photosensitive units and the third photosensitive units are alternately arranged in sequence.

9. The pixel array according to claim 7, wherein: The first photosensitive units are arranged in rows and columns in the pixel array, the second photosensitive units are located on vertices of the first photosensitive units, and the third photosensitive units are located at the center of the first photosensitive units.

10. The pixel array according to claim 7, wherein: Each of the first photosensitive units consists of n 2 The second photosensitive unit is located at the vertex of the first photosensitive unit, and the third photosensitive unit is located at the center of the first photosensitive unit.

Images