Capacitor wafer level electrical parameter automatic probe test board card
By designing capacitor wafer-level automatic probe test boards, the problem of high cost of ZMU source boards and insufficient space in the test machine in the existing technology is solved, and multi-SITE testing is realized, which improves detection efficiency and reduces testing costs.
Patent Information
- Application Number
- CN202420750061.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-12
- Publication Date
- 2025-03-28
- Estimated Expiration
- 2034-04-12
AI Technical Summary
In the prior art, the ZMU source board is costly to use and the test machine is insufficient space, which cannot meet the multi-SITE testing needs, resulting in low detection efficiency and high testing costs.
A capacitor wafer-level automatic probe test board is designed, including a PCB board, 64-core cable connection terminal, frequency voltage conversion module and curved arc probe. Multiple probes and frequency voltage conversion modules are used to facilitate multi-station combination and production and maintenance.
Multi-SITE testing is realized, which improves detection efficiency and reduces testing costs. The concentration of capacitance value distribution is increased through the frequency voltage conversion module, and the yield loss caused by line loss is reduced.
Smart Images
Figure CN222689812U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of capacitor crystal grain testing devices, and in particular relates to a capacitor wafer-level electrical parameter automatic probe testing board. Background Art
[0002] Capacitor chip testing can be divided into general testing and special testing. General testing is to place the packaged chip in various environments to test its electrical characteristics, such as power consumption, operating speed, withstand voltage, leakage, etc. After the test, the chip is divided into different grades according to its electrical characteristics. Special testing requires capacitor chips to be tested with targeted special probes based on the technical parameters of the customer's special needs, and to take out some capacitor chips from similar parameter specifications and varieties to see if they can meet the customer's special needs, so as to decide whether to design a special chip for the customer. Products that pass the general test can be shipped after being labeled with specifications, models, and factory dates and packaged. Chips that fail the test are classified as downgraded products or scrap products depending on the parameters they meet. In this context, some customers requested to add CISS (input capacitance) capacity test. If the ZMU source of the STS8200F machine is used to measure its capacitance, there will be the following disadvantages: 1. The cost of using the ZMU source board is high; 2. Each ZMU source board has only one CH. Multiple boards are required for multi-site testing. The test machine does not have enough space, and each source needs a long coaxial screen cable to connect, which takes up space and is inconvenient for operators to set up and maintain the probe test system. Utility Model Content
[0003] In view of the above-mentioned deficiencies existing in the prior art, the utility model provides a capacitor wafer-level electrical parameter automatic probe test board to solve the above-mentioned existing problems.
[0004] In order to solve the above technical problems, the utility model adopts the following technical solutions:
[0005] A capacitor wafer-level electrical parameter automatic probe test board comprises a PCB board and a plurality of 64-core cable connection terminals electrically connected to the two ends of the PCB board, a plurality of frequency-voltage conversion modules and a plurality of probes electrically connected to the middle of the PCB board, a probe fixing support is provided at one end of the plurality of probes away from the PCB board and pierces the probe fixing support, and the two ends of the probe fixing support are fixedly connected to the PCB board.
[0006] Furthermore, there are eight frequency-to-voltage conversion modules, which are distributed circumferentially on the PCB board.
[0007] Furthermore, there are 12 64-core cable connection terminals, which are distributed in groups of 6 at equal distances on both ends of the PCB board.
[0008] Furthermore, the plurality of probes are all arranged in a curved arc shape.
[0009] Compared with the prior art, the utility model has the following beneficial effects:
[0010] 1. The utility model can be used for multi-site testing, which greatly improves the testing efficiency and reduces the testing cost;
[0011] 2. The utility model adopts a frequency-voltage conversion module, which is convenient for multi-station combination and production maintenance;
[0012] 3. The capacitance values collected by the test of the utility model have a high distribution concentration, which can reduce the yield loss caused by line loss. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 This is a three-dimensional structural schematic diagram of an embodiment of a capacitor wafer-level electrical parameter automatic probe test board card of the utility model (viewing angle 1);
[0014] Figure 2 This is a three-dimensional structural schematic diagram of an embodiment of a capacitor wafer-level electrical parameter automatic probe test board card of the utility model (viewing angle 2);
[0015] The reference numerals in the drawings of the specification include:
[0016] PCB board 1, 64-core cable connection terminal 2, frequency-voltage conversion module 3, probe 4, probe fixing bracket 5. DETAILED DESCRIPTION
[0017] In order to enable those skilled in the art to better understand the present invention, the technical solution of the present invention is further described below in conjunction with the accompanying drawings and embodiments.
[0018] Among them, the drawings are only used for illustrative explanations, and they only represent schematic diagrams rather than actual pictures, and should not be understood as limitations on this patent; in order to better illustrate the embodiments of the utility model, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of the actual product; for those skilled in the art, it is understandable that some well-known structures and their descriptions in the drawings may be omitted.
[0019] The same or similar numbers in the drawings of the embodiments of the present invention correspond to the same or similar parts; in the description of the present invention, it should be understood that if the terms "upper", "lower", "left", "right", "inner", "outer", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, the terms describing the position relationship in the drawings are only used for illustrative purposes and cannot be understood as a limitation on this patent. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.
[0020] In the description of the present invention, unless otherwise clearly specified and limited, if the term "connection" or the like appears to indicate the connection relationship between components, the term should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two components or the interaction relationship between two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0021] Example:
[0022] like Figure 1-Figure 2 As shown, a capacitor wafer-level electrical parameter automatic probe test board of the utility model comprises a PCB board 1 and a plurality of 64-core cable connection terminals 2 electrically connected to the two ends of the PCB board 1, a plurality of frequency-voltage conversion modules 3 and a plurality of probes 4 electrically connected to the middle of the PCB board 1, a plurality of probes 4 are provided with a probe fixing support 5 at one end away from the PCB board 1, and the probe fixing support 5 is pierced, and the two ends of the probe fixing support 5 are fixedly connected to the PCB board 1, the frequency-voltage conversion modules 3 are eight, and are circumferentially distributed on the PCB board 1, the 64-core cable connection terminals 2 are 12, and a group of 6 is equidistantly distributed on the two ends of the PCB board 1, and the plurality of probes 4 are all arranged in a curved arc. Specifically, when in use, the wafer to be tested is placed on the probe fixing support 5, the needle of the probe 4 contacts the wafer to be tested, and the corresponding parameters are tested by power-on. After power-on, the frequency-voltage conversion module 3 will perform frequency-voltage conversion, and the corresponding test electrical signal is transmitted to the source meter of the test machine through the 64-core cable connection terminal 2.
[0023] The above are only embodiments of the utility model. The common sense such as the known specific structures and characteristics in the scheme is not described in detail here. The ordinary technicians in the relevant field are aware of all the common technical knowledge in the technical field to which the utility model belongs before the application date or priority date, can obtain all the existing technologies in the field, and have the ability to apply the conventional experimental means before that date. The ordinary technicians in the relevant field can improve and implement the scheme in combination with their own abilities under the enlightenment given by this application. Some typical known structures or known methods should not become obstacles for the ordinary technicians in the relevant field to implement this application. It should be pointed out that for the technicians in this field, without departing from the structure of the utility model, several deformations and improvements can be made, which should also be regarded as the protection scope of the utility model, and these will not affect the effect of the implementation of the utility model and the practicality of the patent.
Claims
1. A capacitor wafer-level electrical parameter automatic probe test board, characterized in that: It includes a PCB board and multiple 64-core cable connection terminals electrically connected to both ends of the PCB board. The middle part of the PCB board is electrically connected with multiple frequency-voltage conversion modules and multiple probes. The multiple probes are provided with probe fixing brackets at one end away from the PCB board and pierce the probe fixing brackets. The two ends of the probe fixing brackets are fixedly connected to the PCB board.
2. A capacitor wafer-level electrical parameter automatic probe test board as claimed in claim 1, characterized in that: There are eight frequency-voltage conversion modules, which are distributed circumferentially on the PCB board.
3. A capacitor wafer-level electrical parameter automatic probe test board as claimed in claim 2, characterized in that: There are 12 64-core cable connection terminals, which are distributed equidistantly on both ends of the PCB board in groups of 6.
4. A capacitor wafer-level electrical parameter automatic probe test board as claimed in claim 3, characterized in that: The plurality of probes are all arranged in a curved arc shape.