Thyristor device

Abstract

The utility model relates to a thyristor device. The thyristor device comprises a semiconductor wafer which is provided with a plurality of thyristor unit groups; each thyristor unit group comprises a plurality of thyristor units, and the plurality of thyristor units are arranged around the center of the semiconductor wafer; the plurality of thyristor unit groups are sequentially arranged along the radial direction of the semiconductor wafer; the gate contact is arranged on the first side of the semiconductor wafer; the gate pole of each thyristor unit is connected with the gate pole contact piece; wherein the gate contact comprises a plurality of first contact electrodes and a plurality of second contact electrodes which are arranged around the center of the semiconductor wafer; a distance between the first contact electrode and a center of the semiconductor wafer is greater than a distance between the second contact electrode and the center of the semiconductor wafer. According to the invention, the distance difference between each thyristor unit and the gate contact is reduced, and the current uniformity when the thyristor device is turned off is improved, so that the turn-off current is improved.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor devices, and in particular to a thyristor device. Background Art

[0002] Power semiconductor chips are core components in power electronic equipment, playing a role in power conversion and transmission. As the capacity of power electronic equipment continues to increase, power electronic equipment has put forward higher requirements on the performance of power semiconductor chips, especially in large-capacity power transmission scenarios, requiring power semiconductor chips to further improve their current conduction and shutdown capabilities.

[0003] In order to achieve the improvement of the on-current and off-current of a single chip, the whole wafer is often used to manufacture a chip to effectively utilize the overall area of ​​the wafer to achieve the improvement of on-current and off-current. A typical whole-wafer power semiconductor chip that can be turned off includes a terminal area, an active area and a gate contact ring. The terminal area surrounds the periphery of the active area. The active area includes multiple parallel power semiconductor units, which are displayed as multiple concentric cathode rings in a planar structure. Each cathode ring is arranged with multiple cathode combs distributed radially. The area outside the cathode combs in each cathode ring is the gate area. The gate areas are connected to each other and surround the cathode combs, forming an independent island structure. The gate is connected to the gate contact ring, which is used to transmit the gate signal and derive the current from the cathode commutation to the gate when the power semiconductor unit is turned off.

[0004] However, due to the large geometric size of the wafer chip, when the chip is turned off, the position closer to the gate contact ring starts to turn off first, and the current is concentrated at the position farther away from the gate contact ring, resulting in excessive current density of the power semiconductor unit here, which may cause damage in severe cases, affecting the increase of the maximum current that can be turned off. Therefore, how to further improve the current capability of the device that can be turned off has become one of the problems that need to be solved urgently. Summary of the invention

[0005] Based on this, it is necessary to provide a thyristor device that can improve the ability to cut off current.

[0006] A thyristor device, comprising:

[0007] A semiconductor wafer, the semiconductor wafer having a first side and a second side arranged opposite to each other; a plurality of thyristor unit groups are arranged on the semiconductor wafer; each of the thyristor unit groups includes a plurality of thyristor units, and the plurality of thyristor units are arranged around the center of the semiconductor wafer; the plurality of thyristor unit groups are arranged in sequence along the radial direction of the semiconductor wafer; and

[0008] A gate contact is provided on the first side of the semiconductor wafer; the gate of each thyristor unit is connected to the gate contact;

[0009] Wherein, the gate contact comprises a plurality of first contact electrodes and a plurality of second contact electrodes arranged around the center of the semiconductor wafer; the distance between the first contact electrode and the center of the semiconductor wafer is greater than the distance between the second contact electrode and the center of the semiconductor wafer.

[0010] In one embodiment, the plurality of first contact electrodes and the plurality of second contact electrodes are alternately arranged around the center of the semiconductor wafer.

[0011] In one embodiment, the distances between all the first contact electrodes and the center of the semiconductor wafer are equal;

[0012] And / or, the distances between all the second contact electrodes and the center of the semiconductor wafer are equal.

[0013] In one embodiment, the distance between the center of the first contact electrode and the center of the semiconductor wafer is a first distance, and the ratio of the first distance to the radius of the semiconductor wafer is between 0.6 and 0.7;

[0014] And / or, the distance between the center of the second contact electrode and the center of the semiconductor wafer is a second distance, and the ratio of the second distance to the radius of the semiconductor wafer is between 0.3-0.35.

[0015] In one embodiment, the orthographic projection of each of the first contact electrodes on the semiconductor wafer is an arc shape;

[0016] The orthographic projection of each of the second contact electrodes on the semiconductor wafer is an arc shape.

[0017] In one embodiment, the width of the first contact electrode and the width of the second contact electrode are both equal to the length of the cathode comb bar of the thyristor unit;

[0018] The width of the first contact electrode is the size of the first contact electrode along the radial direction of the semiconductor wafer, and the width of the second contact electrode is the size of the second contact electrode along the radial direction of the semiconductor wafer.

[0019] In one embodiment, the gate contact further includes a plurality of third contact electrodes; each of the third contact electrodes extends along a radial direction of the semiconductor wafer.

[0020] Along the circumferential direction of the semiconductor wafer, adjacent first contact electrodes and second contact electrodes are connected via one third contact electrode.

[0021] In one embodiment, the center of the gate contact coincides with the center of the semiconductor wafer.

[0022] In one of the embodiments, the thyristor unit includes a first emitter, a first base region, a second base region, a drift region, a buffer region, and a second emitter arranged in sequence from the first side to the second side;

[0023] The thyristor unit also includes a cathode comb bar, an anode and a gate; the cathode comb bar is connected to the side of the first emitter away from the first base region; the gate is connected to the side of the first base region away from the second base region and is arranged around the cathode comb bar; the anode is connected to the side of the second emitter away from the buffer zone.

[0024] In one of the embodiments, the thyristor unit includes a first emitter, a first base region, a drift region, and a second emitter arranged in sequence from the first side to the second side;

[0025] The thyristor unit also includes a cathode comb bar, an anode and a gate; the cathode comb bar is connected to the side of the first emitter away from the first base region; the gate is connected to the side of the first base region away from the second emitter and is arranged around the cathode comb bar; the anode is connected to the side of the second emitter away from the drift region.

[0026] The thyristor device provided in the embodiment of the present application arranges a plurality of thyristor unit groups in sequence along the radial direction of the semiconductor wafer, and all thyristor units in each thyristor unit group are arranged around the center of the semiconductor wafer, and further arranges the first contact electrode and the second contact electrode of the gate contact around the center of the semiconductor wafer, and the distance between the first contact electrode and the center of the semiconductor wafer is greater than the distance between the second contact electrode and the center of the semiconductor wafer. In this way, it is equivalent to distributing the first contact electrode and the second contact electrode at different positions in the circumferential direction of the semiconductor wafer, and distributing the first contact electrode and the second contact electrode at different positions in the radial direction of the semiconductor wafer. In this way, on the one hand, it is conducive to reducing the distance difference between each thyristor unit and the gate contact, improving the current uniformity when the thyristor device is turned off, thereby improving the turn-off current; on the other hand, it is conducive to dispersing the pressing pressure of the thyristor device during the crimping package, and improving the reliability of the thyristor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments or exemplary embodiments of the present application, the drawings required for use in the description of the embodiments or exemplary embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0028] Figure 1 A schematic diagram of the structure of a thyristor device provided in one embodiment of the present application.

[0029] Figure 2 for Figure 1 Schematic diagram of a top view of a thyristor device shown.

[0030] Figure 3 for Figure 1 Schematic diagram of the AA section.

[0031] Figure 4 A schematic diagram of the structure of another thyristor device provided in one embodiment of the present application.

[0032] Figure 5 for Figure 4 Schematic diagram of a top view of a thyristor device shown.

[0033] Figure 6 for Figure 4 Schematic diagram of BB cross section.

[0034] Description of reference numerals:

[0035] 1. Thyristor device; 10. Semiconductor wafer; 20. Thyristor unit group; 21. Thyristor unit; 211. First emitter; 212. First base region; 213. Second base region; 214. Drift region; 215. Buffer region; 216. Second emitter; 217. Cathode comb bar; 218. Anode; 219. Gate; 30. Gate contact; 31. First contact electrode; 32. Second contact electrode; 33. Third contact electrode; 40. Protection layer; 50. Terminal region; 60. Insulation layer. DETAILED DESCRIPTION

[0036] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present application more thorough and comprehensive.

[0037] It should be understood that although the terms "first", "second", etc. may be used herein to describe various elements, they do not represent any order, quantity or importance, but are only used to distinguish different components. These terms are only used to distinguish one element from another. For example, without departing from the scope of the present application, the first element may be referred to as the second element, and similarly, the second element may be referred to as the first element. "Include" or "comprising" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0039] Reference Figure 1-Figure 6 As shown, an embodiment of the present application provides a thyristor device 1, which may be a GCT (Gate Commutated Thyristor) or a GTO (Gate Turn-off Thyristor).

[0040] Specifically, Figure 1 , Figure 2 and Figure 3 As shown, the thyristor device 1 includes a semiconductor wafer 10 and a gate contact 30. The material of the semiconductor wafer 10 can be silicon, silicon carbide, gallium nitride, gallium arsenide, gallium oxide, diamond, etc. The semiconductor wafer 10 has a first side and a second side that are arranged opposite to each other, wherein the first side can be a front side, and the second side can be a back side.

[0041] A plurality of thyristor unit groups 20 are provided on the semiconductor wafer 10. The plurality of thyristor unit groups 20 are arranged in sequence along the radial direction of the semiconductor wafer 10. Each thyristor unit group 20 includes a plurality of thyristor units 21, and the plurality of thyristor units 21 are arranged around the center of the semiconductor wafer 10. A gate contact 30 is provided on a first side of the semiconductor wafer 10. The gate 219 of each thyristor unit 21 is connected to the gate contact 30.

[0042] The gate contact 30 includes a plurality of first contact electrodes 31 and a plurality of second contact electrodes 32 arranged around the center of the semiconductor wafer 10. The distance between the first contact electrode 31 and the center of the semiconductor wafer 10 is greater than the distance between the second contact electrode 32 and the center of the semiconductor wafer 10.

[0043] It can be understood that the center of the semiconductor wafer 10 is the center of the semiconductor wafer 10. The multiple thyristor unit groups 20 can be evenly arranged along the radial direction of the semiconductor wafer 10, and all thyristor units 21 in each thyristor unit group 20 can be evenly arranged around the center of the semiconductor wafer 10. It should be noted that the embodiment of the present application does not limit the number of thyristor unit groups 20 and the number of thyristor units 21 in each thyristor unit group 20.

[0044] The thyristor device 1 provided in the embodiment of the present application arranges the first contact electrode 31 and the second contact electrode 32 of the gate contact 30 around the center of the semiconductor wafer 10, which is equivalent to distributing the first contact electrode 31 and the second contact electrode 32 at different positions in the circumferential direction of the semiconductor wafer 10. By making the distance between the first contact electrode 31 and the center of the semiconductor wafer 10 greater than the distance between the second contact electrode 32 and the center of the semiconductor wafer 10, it is equivalent to distributing the first contact electrode 31 and the second contact electrode 32 at different positions in the radial direction of the semiconductor wafer 10. In this way, on the one hand, it is conducive to reducing the distance difference between each thyristor unit 21 and the gate contact 30, improving the current uniformity when the thyristor device 1 is turned off, thereby improving the turn-off current; on the other hand, it is conducive to dispersing the press-fitting pressure of the thyristor device 1 during the crimping package, thereby improving the reliability of the thyristor device 1.

[0045] In one embodiment, a plurality of first contact electrodes 31 and a plurality of second contact electrodes 32 are alternately arranged around the center of the semiconductor wafer 10 .

[0046] In this way, the first contact electrodes 31 and the second contact electrodes 32 can be arranged relatively evenly in the circumferential direction of the semiconductor wafer 10. On the one hand, it is helpful to further reduce the distance difference between each thyristor unit 21 and the gate contact 30, improve the current uniformity when the thyristor device 1 is turned off, and thus improve the turn-off current; on the other hand, it is helpful to further disperse the press-fitting pressure of the thyristor device 1 during the crimping package, and improve the reliability of the thyristor device 1.

[0047] In one embodiment, the distances between all first contact electrodes 31 and the center of the semiconductor wafer 10 are equal. In this way, all first contact electrodes 31 are distributed on the same virtual circumference, which is conducive to a more uniform distribution of all first contact electrodes 31 on the first side of the semiconductor wafer 10.

[0048] In one embodiment, the distances between all the second contact electrodes 32 and the center of the semiconductor wafer 10 are equal. In this way, all the second contact electrodes 32 are distributed on the same virtual circumference, which is conducive to a more uniform distribution of all the second contact electrodes 32 on the first side of the semiconductor wafer 10. It can be understood that the first contact electrode 31 and the second contact electrode 32 are respectively located on different virtual circumferences.

[0049] In one embodiment, the orthographic projection of each first contact electrode 31 on the semiconductor wafer 10 is an arc shape, so that all the first contact electrodes 31 are distributed on the same virtual circle.

[0050] In one embodiment, the orthographic projection of each second contact electrode 32 on the semiconductor wafer 10 is an arc shape, so that all the second contact electrodes 32 are distributed on the same virtual circle.

[0051] In one embodiment, the number of the first contact electrodes 31 is the same as the number of the second contact electrodes 32. In this way, the arc angle of the first contact electrode 31 is equal to the arc angle of the second contact electrode 32. It is understandable that the number of the first contact electrodes 31 and the second contact electrodes 32 may be 2, 3, 4, 5 or more, and it is understandable that the number of the first contact electrodes 31 and the number of the second contact electrodes 32 may also be unequal, and the embodiment of the present application does not limit the number of the first contact electrodes 31 and the number of the second contact electrodes 32.

[0052] In one embodiment, referring to Figure 2 As shown, the distance between the center of the first contact electrode 31 and the center of the semiconductor wafer 10 is a first distance L 1 , the first distance L 1 The ratio of the radius of the semiconductor wafer 10 is between 0.6 and 0.7. For example, the ratio may be 0.6, 0.63, 0.66, 0.7, or between any two of the above values.

[0053] The above arrangement is beneficial to shortening the distance between the thyristor unit 21 located at the outer edge of the semiconductor wafer 10 and the gate contact 30 .

[0054] In one embodiment, referring to Figure 2 As shown, the distance between the center of the second contact electrode 32 and the center of the semiconductor wafer 10 is the second distance L 2 , the second distance L 2 The ratio of the radius of the semiconductor wafer 10 is between 0.3 and 0.35. For example, the ratio may be 0.3, 0.32, 0.34, 0.35, or between any two of the above values.

[0055] The above arrangement is conducive to shortening the distance between the thyristor unit 21 located at the center of the semiconductor and the gate contact 30 .

[0056] In a preferred embodiment, the first distance L 1 The ratio of the radius of the semiconductor wafer 10 is 2:3, and the second distance L 2 The ratio of the radius of the semiconductor wafer 10 is 1:3. In this way, all the first contact electrodes 31 are located at two-thirds of the radius of the semiconductor wafer 10 , and all the second contact electrodes 32 are located at one-third of the radius of the semiconductor wafer 10 .

[0057] In this way, the semiconductor wafer 10 is divided into three equal parts in the radial direction, and each divided area is close to the gate contact 30, and the distance difference between each divided area and the gate contact 30 is small. On the one hand, it is conducive to further reducing the distance difference between each thyristor unit 21 and the gate contact 30, improving the current uniformity when the thyristor device 1 is turned off, thereby improving the turn-off current; on the other hand, it is conducive to further dispersing the press-fitting pressure of the thyristor device 1 during the press-fit packaging, thereby improving the reliability of the thyristor device 1.

[0058] It should be noted that the numerical values ​​and numerical ranges involved in the embodiments of the present application are approximate values. Due to the influence of the manufacturing process, there may be a certain range of errors, which can be considered negligible by those skilled in the art.

[0059] In one embodiment, the width of the first contact electrode 31 and the width of the second contact electrode 32 are both equal to the length of the cathode comb bar 217 of the thyristor unit 21. The width of the first contact electrode 31 is the size of the first contact electrode 31 along the radial direction of the semiconductor wafer 10, and the width of the second contact electrode 32 is the size of the second contact electrode 32 along the radial direction of the semiconductor wafer 10.

[0060] Specifically, Figure 2 and Figure 4 As shown, the number of thyristor unit groups 20 is 11, and counting from the inside to the outside, the second contact electrode 32 is located in the ring direction where the fourth group of thyristor unit groups 20 are located, and the first contact electrode 31 is located in the ring direction where the eighth group of thyristor unit groups 20 are located. The above arrangement is conducive to optimizing the arrangement of the gate contacts 30, so that the first contact electrode 31 (or the second contact electrode 32) only occupies part of the space of one group of thyristor unit groups 20, without affecting the space of the adjacent thyristor unit groups 20. In addition, it is also conducive to maximizing the contact area of ​​the gate contact 30.

[0061] In one embodiment, the gate contact 30 further includes a plurality of third contact electrodes 33. Each third contact electrode 33 extends in the radial direction of the semiconductor wafer 10. Along the circumferential direction of the semiconductor wafer 10, adjacent first contact electrodes 31 and second contact electrodes 32 are connected by means of one third contact electrode 33.

[0062] In this way, the orthographic projection of the gate contact 30 on the semiconductor wafer 10 is in a gear-like shape. Compared with the arrangement shape of the gate contact metal in the related art, the thyristor device 1 in the embodiment of the present application has a small gate contact 30 occupation area, a large number of cathode comb bars 217, a large number of thyristor units 21, and a good current flow of the thyristor device 1, which can minimize the adverse effect of the arrangement of the gate contact 30 on the current flow of the device.

[0063] In one embodiment, the center of the gate contact 30 coincides with the center of the semiconductor wafer 10 . It should be noted that the center of the gate contact 30 refers to the geometric center of the gate contact 30 .

[0064] The above arrangement is conducive to matching the shape arrangement of the gate contact 30 with the contour shape of the semiconductor wafer 10, thereby helping to reduce the distance difference between each thyristor unit 21 and the gate contact 30, improving the current uniformity when the thyristor device 1 is turned off, thereby improving the turn-off current.

[0065] In one embodiment, the gate contact 30 may be made of metal such as aluminum, silver, copper, etc., so that the gate contact 30 can form a good ohmic contact with the semiconductor wafer 10 .

[0066] In one embodiment, referring to Figure 1 , Figure 2 and Figure 3 As shown, the thyristor unit 21 includes a first emitter 211, a first base region 212, a second base region 213, a drift region 214, a buffer region 215, and a second emitter 216 arranged in sequence from the first side to the second side, and the first emitter 211, the first base region 212, the second base region 213, the drift region 214, the buffer region 215, and the second emitter 216 are arranged in the semiconductor wafer 10. The thyristor unit 21 also includes a cathode comb bar 217, an anode 218, and a gate 219. The cathode comb bar 217 is connected to a side of the first emitter 211 away from the first base region 212. The gate 219 is connected to a side of the first base region 212 away from the second base region 213, and is arranged around the cathode comb bar 217. The anode 218 is connected to a side of the second emitter 216 away from the buffer region 215. Furthermore, the doping type of the first emitter 211, the drift region 214 and the buffer region 215 is N-type, and the doping type of the first base region 212, the second base region 213 and the second emitter 216 is P-type. In this way, the thyristor device 1 is a GCT device.

[0067] In one embodiment, referring to Figure 4 , Figure 5 and Figure 6 As shown, the thyristor unit 21 includes a first emitter 211, a first base region 212, a drift region 214, and a second emitter 216 arranged in sequence from the first side to the second side, and the first emitter 211, the first base region 212, the drift region 214, and the second emitter 216 are arranged in the semiconductor wafer 10. The thyristor unit 21 also includes a cathode comb bar 217, an anode 218, and a gate 219. The cathode comb bar 217 is connected to a side of the first emitter 211 away from the first base region 212. The gate 219 is connected to a side of the first base region 212 away from the second emitter 216, and is arranged around the cathode comb bar 217. The anode 218 is connected to a side of the second emitter 216 away from the drift region 214. Further, the doping type of the first emitter 211 and the drift region 214 is N-type, and the doping type of the first base region 212 and the second emitter 216 is P-type. In this way, the thyristor device 1 is a GTO device.

[0068] It is understandable that an insulating layer 60 is also provided on part of the surface of the first base region 212. The insulating layer 60 also covers the first emitter 211 and is arranged around the cathode comb bar 217. The material of the insulating layer 60 may be silicon dioxide. A protective layer 40 is also covered on the insulating layer 60 and the gate 219. The protective layer 40 exposes the surface of the cathode comb bar 217. The material of the protective layer 40 may be polyimide. The protective layer 40 may isolate the cathode comb bar 217 from the gate contact 30. The thyristor region also includes a terminal region 50, which is provided on the first side of the semiconductor wafer 10 and at the edge of the semiconductor wafer 10.

[0069] It is understandable that the thyristor device 1 provided in the embodiment of the present application can be implemented by modifying the photolithography layout of the gate contact 30 based on the manufacturing process of the traditional thyristor device 1 and cooperating with photolithography, etching and other means, and has high feasibility.

[0070] In the case of using “including”, “having”, and “comprising” described herein, another component may be added unless a clear limiting term such as “only”, “consisting of”, etc. is used. Unless mentioned otherwise, a term in the singular form may include a plural form and should not be understood as being one in number.

[0071] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0072] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A thyristor device, characterized in that: include: A semiconductor wafer, wherein the semiconductor wafer has a first side and a second side arranged opposite to each other; a plurality of thyristor unit groups are arranged on the semiconductor wafer; The plurality of thyristor unit groups are sequentially arranged along the radial direction of the semiconductor wafer; each of the thyristor unit groups includes a plurality of thyristor units, and the plurality of thyristor units are arranged around the center of the semiconductor wafer; as well as A gate contact is provided on a first side of the semiconductor wafer; The gate of each of the thyristor units is connected to the gate contact; Wherein, the gate contact comprises a plurality of first contact electrodes and a plurality of second contact electrodes arranged around the center of the semiconductor wafer; the distance between the first contact electrode and the center of the semiconductor wafer is greater than the distance between the second contact electrode and the center of the semiconductor wafer.

2. The thyristor device according to claim 1, characterized in that: The plurality of first contact electrodes and the plurality of second contact electrodes are alternately arranged around the center of the semiconductor wafer.

3. The thyristor device according to claim 2, characterized in that: The distances between all the first contact electrodes and the center of the semiconductor wafer are equal; And / or, the distances between all the second contact electrodes and the center of the semiconductor wafer are equal.

4. The thyristor device according to claim 3, characterized in that: The distance between the center of the first contact electrode and the center of the semiconductor wafer is a first distance, and the ratio of the first distance to the radius of the semiconductor wafer is between 0.6 and 0.7; And / or, the distance between the center of the second contact electrode and the center of the semiconductor wafer is a second distance, and the ratio of the second distance to the radius of the semiconductor wafer is between 0.3-0.

35.

5. The thyristor device according to claim 3, characterized in that: The orthographic projection of each of the first contact electrodes on the semiconductor wafer is an arc shape; The orthographic projection of each of the second contact electrodes on the semiconductor wafer is an arc shape.

6. The thyristor device according to claim 5, characterized in that: The width of the first contact electrode and the width of the second contact electrode are both equal to the length of the cathode comb bar of the thyristor unit; The width of the first contact electrode is the size of the first contact electrode along the radial direction of the semiconductor wafer, and the width of the second contact electrode is the size of the second contact electrode along the radial direction of the semiconductor wafer.

7. The thyristor device according to claim 1, characterized in that: The gate contact also includes a plurality of third contact electrodes; each of the third contact electrodes extends along the radial direction of the semiconductor wafer; Along the circumferential direction of the semiconductor wafer, adjacent first contact electrodes and second contact electrodes are connected via one third contact electrode.

8. The thyristor device according to claim 7, characterized in that: The center of the gate contact coincides with the center of the semiconductor wafer.

9. The thyristor device according to any one of claims 1 to 8, characterized in that: The thyristor unit comprises a first emitter, a first base region, a second base region, a drift region, a buffer region, and a second emitter arranged in sequence from the first side to the second side; The thyristor unit also includes a cathode comb bar, an anode and a gate; the cathode comb bar is connected to the side of the first emitter away from the first base region; the gate is connected to the side of the first base region away from the second base region and is arranged around the cathode comb bar; the anode is connected to the side of the second emitter away from the buffer zone.

10. The thyristor device according to any one of claims 1 to 8, characterized in that: The thyristor unit includes a first emitter, a first base region, a drift region, and a second emitter arranged in sequence from the first side to the second side; The thyristor unit also includes a cathode comb bar, an anode and a gate; the cathode comb bar is connected to the side of the first emitter away from the first base region; the gate is connected to the side of the first base region away from the second emitter and is arranged around the cathode comb bar; the anode is connected to the side of the second emitter away from the drift region.

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