Charging circuit, chip and electronic device

Abstract

The present application relates to the field of electronic circuit technology, and discloses a charging circuit, a chip, and an electronic device. The charging circuit includes a first amplifier circuit, a second amplifier circuit, a voltage regulating module, and a voltage output module, wherein the voltage regulating module includes a first resistor, a second resistor, and a third resistor, and the voltage output module includes a first switch and a second switch; the negative input end of the first amplifier circuit is connected to the first end of the third resistor, and the negative input end of the second amplifier circuit is connected to the second end of the third resistor; the first resistor, the second resistor, and the third resistor are connected in sequence; the first end of the first switch is connected to the second end of the first resistor, the first end of the second switch is connected to the first end of the first resistor, and the second end of the first switch is connected to the second end of the second switch. Based on this circuit, the system voltage can be flexibly adjusted with the battery voltage.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a charging circuit, a chip and an electronic device. Background Art

[0002] The charging circuit needs to supply power to the subsequent system while charging the battery. When the battery voltage is low, the system voltage must not be too low. Therefore, it is necessary to determine the appropriate system voltage to supply power to the subsequent system based on the battery voltage and the system preset minimum voltage. For example Figure 1 A charging circuit schematic diagram is shown, when the voltage of the positive input terminal 101 is greater than the voltage of the negative input terminal 102, the first reference voltage VREF1 is output as the system reference voltage; when the voltage of the positive input terminal 101 is less than the voltage of the negative input terminal 102, the second reference voltage VREF2 is output as the system reference voltage. However, since the first reference voltage VREF1 and the second reference voltage VREF2 are unstable during switching, glitches are prone to occur, and smooth switching is not possible, and the first reference voltage VREF1 and the second reference voltage VREF2 are both fixed values ​​and cannot change with the voltage of the positive input terminal 101 and the voltage of the negative input terminal 102. In addition, in the process of powering the subsequent system, the voltage of the negative input terminal 102 is a variable value. When the voltage of the negative input terminal 102 is too low, the system reference voltage cannot be flexibly adjusted with the voltage of the negative input terminal 102, and it is impossible to ensure that the subsequent system can still be powered when the battery is completely exhausted or the battery is removed. Utility Model Content

[0003] The embodiments of the present application provide a charging circuit and a chip, which realize flexible adjustment of the system voltage along with the battery voltage by automatically and smoothly switching the voltage division of the system preset minimum voltage and the battery feedback voltage.

[0004] In order to solve the problem that the system voltage cannot be flexibly adjusted with the battery voltage, and cannot guarantee that the subsequent system can still be powered when the battery is completely exhausted or the battery is removed, the present application provides a charging circuit, chip and electronic device.

[0005] In a first aspect, the present application provides a charging circuit, which includes a first amplifier circuit, a second amplifier circuit, a voltage regulation module and a voltage output module; the first amplifier circuit is connected to the voltage regulation module, the second amplifier circuit is connected to the voltage regulation module; and the voltage output module is connected to the voltage regulation module.

[0006] In some optional examples of the first aspect, the voltage regulating module includes a first resistor, a second resistor and a third resistor, the voltage output module includes a first switch and a second switch, the negative input terminal of the first amplifier circuit is connected to the first end of the third resistor, and the negative input terminal of the second amplifier circuit is connected to the second end of the third resistor; the first resistor, the second resistor and the third resistor are connected in sequence; the first end of the first switch is connected to the second end of the first resistor, the first end of the second switch is connected to the first end of the first resistor, and the second end of the first switch is connected to the second end of the second switch.

[0007] In some optional instances of the first aspect, the charging circuit also includes: a logic circuit, when the input voltage of the positive input terminal of the first amplifier circuit is greater than the input voltage of the positive input terminal of the second amplifier circuit, the logic circuit is used to output a first signal, and the first signal is used to control the first switch to be in a disconnected state, and control the second switch to be in a connected state.

[0008] In some optional examples of the first aspect, when the first switch is in a disconnected state and the second switch is in a connected state, a first loop is formed, and the first loop includes: a first amplifying circuit, a third resistor, a second resistor and a second switch.

[0009] In some optional examples of the first aspect, when the charging circuit is a first loop, the output voltage of the output end of the charging circuit is the sum of the input voltage of the negative input end of the first amplifier circuit, the voltage drop of the second resistor and the voltage drop of the third resistor.

[0010] In some optional instances of the first aspect, when the input voltage of the positive input terminal of the first amplifier circuit is less than the input voltage of the positive input terminal of the second amplifier circuit and the charging circuit is in a charging state, the logic circuit is used to output a second signal, and the second signal is used to control the first switch to be in a connected state and to control the second switch to be in a disconnected state.

[0011] In some optional examples of the first aspect, when the first switch is in a connected state and the second switch is in a disconnected state, a second loop is formed, and the second loop includes: a second amplifying circuit, a second resistor, a first resistor and a first switch.

[0012] In some optional examples of the first aspect, when the charging circuit is the second loop, the output voltage of the output end of the charging circuit is the sum of the input voltage of the negative input end of the second amplifier circuit and the voltage drop of the second resistor and the voltage drop of the first resistor.

[0013] In some optional instances of the first aspect, when the input voltage of the positive input terminal of the first amplifier circuit is less than the input voltage of the positive input terminal of the second amplifier circuit and the charging circuit is in a non-charging state, the logic circuit is used to output a third signal, and the third signal is used to control the first switch to be in a disconnected state, and control the second switch to be in a connected state.

[0014] In some optional examples of the first aspect, when the first switch is in a disconnected state and the second switch is in a connected state, a third loop is formed, and the third loop includes: a second amplifying circuit, a second resistor and a second switch.

[0015] In some optional examples of the first aspect, when the charging circuit is a third loop, the output voltage of the output end of the charging circuit is the sum of the input voltage of the negative input end of the second amplifier circuit and the voltage drop of the first resistor.

[0016] In some optional examples of the first aspect, the charging circuit further includes a first current module and a second current module, the first end of the first current module is connected to the first end of the second current module, and the second end of the second current module is connected to the first end of the third resistor.

[0017] In some optional examples of the first aspect, the charging circuit further includes a first current module, and a first end of the first current module is connected to a first end of the third resistor.

[0018] In some optional examples of the first aspect, the charging circuit further includes a register, and the register is used to change the stored count value to change the size of the first resistor, the second resistor and / or the third resistor.

[0019] In a second aspect, the present application provides a chip, the chip comprising the charging circuit as mentioned in the first aspect above.

[0020] In a third aspect, the present application provides an electronic device, comprising the chip mentioned in the second aspect.

[0021] The beneficial effects of the present application are as follows: the system voltage in the charging circuit can be flexibly adjusted according to the battery voltage, and when the battery is completely exhausted or the battery is removed, the system voltage can also be automatically adjusted to ensure that the system supplies normal power to the subsequent circuits.

[0022] In the embodiment of the present application, by setting two operational amplifiers in a charging circuit, the input voltage of the positive input terminal of the first operational amplifier can be compared with the input voltage of the positive input terminal of the second operational amplifier, and the state of the first switch and the second switch can be controlled in combination with the logic circuit, so that the system voltage in the charging circuit can be flexibly adjusted with the battery voltage when the charging circuit is in a charging state or a non-charging state. When the battery circuit is completely exhausted or the battery is removed, the system can also automatically adjust the system voltage to ensure that the system supplies power to the subsequent circuit normally. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A charging circuit 10 is shown;

[0024] Figure 2According to some embodiments of the present application, another charging circuit 01 is shown;

[0025] Figure 3 According to some embodiments of the present application, a circuit schematic diagram of a charging circuit is shown;

[0026] Figure 4 According to some embodiments of the present application, a circuit schematic diagram of another charging circuit is shown;

[0027] Figure 5 According to some embodiments of the present application, a coordinate diagram showing the relationship between the magnitude changes of the system voltage and the battery voltage is shown.

[0028] Figure numerals: 01-charging circuit, 110-first amplifier circuit (first operational amplifier), 120-second amplifier circuit (second operational amplifier), 100-voltage regulation module, 130-voltage output module, 140-current module, 131-positive input terminal of the first amplifier circuit (positive input terminal of the first operational amplifier), 132-positive input terminal of the second amplifier circuit (positive input terminal of the second operational amplifier), 133-output terminal of the charging circuit, 134-negative input terminal of the first amplifier circuit (first operational amplifier), 135-negative input terminal of the second amplifier circuit (second operational amplifier), 136-first terminal of the current module, 111-first resistor, 112-second resistor, 113-third resistor, 121-first switch, 122-second switch, 151-first MOS tube, 152-second MOS tube, 161-first node, 162-second node. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application.

[0030] The charging circuits mentioned in some embodiments are introduced below.

[0031] Continue reading Figure 1 The charging circuit 10 includes a voltage comparator 12, wherein the voltage comparator 12 includes a positive input terminal 101, a negative input terminal 102, and an output terminal 103. Figure 1 In the charging circuit 10 shown, the voltage comparator 12 determines the output voltage of the output terminal 103 according to the magnitude of the input voltage at the positive and negative input terminals.

[0032] It can be understood that the input voltage of the positive input terminal 101 of the voltage comparator 12 can be a voltage division of the system preset minimum voltage, recorded as VSYSMIN, and the input voltage of the negative input terminal 102 of the voltage comparator 12 can be a battery feedback voltage, recorded as VBAT_FB. The first reference voltage can be recorded as VREF1, and the second reference voltage can be recorded as VREF2. The output voltage of the output terminal 103 of the voltage comparator 12 can be a system reference voltage, recorded as VREF_SYS.

[0033] In some specific implementations, when VSYSMIN>VBAT_FB, VREF_SYS=VREF2; when VBAT_FB>VSYSMIN, VREF_SYS=VREF1. Therefore, the value of VREF_SYS depends on whether the voltage comparator 12 selects VREF1 or VREF2. However, VREF1 and VREF2 are unstable when switching, prone to glitches, and cannot switch smoothly. Moreover, VREF1 and VREF2 are both fixed values, so VREF_SYS cannot be flexibly adjusted with the change of VBAT_FB.

[0034] In order to solve the above problems, an embodiment of the present application provides a charging circuit, exemplarily, Figure 2 The figure shows a charging circuit 01 , which includes a first amplifying circuit 110 , a second amplifying circuit 120 , a current module 140 , a logic circuit (not shown), a voltage regulating module 100 and a voltage output module 130 .

[0035] The first amplifier circuit 110 includes a positive input terminal 131 and a negative input terminal 134 , and the second amplifier circuit 120 includes a positive input terminal 132 and a negative input terminal 135 .

[0036] In some optional examples, the voltage regulating module 100 may include a first resistor 111 , a second resistor 112 , and a third resistor 113 , and the voltage output module 130 may include a first switch 121 and a second switch 122 .

[0037] It can be understood that in the charging circuit 01, the negative input terminal 134 of the first amplifier circuit 110 is connected to the first terminal 137 of the third resistor 113, and the negative input terminal 135 of the second amplifier circuit 120 is connected to the second terminal 138 of the third resistor 113. The first resistor 111, the second resistor 112 and the third resistor 113 are connected in sequence, that is, the second terminal 141 of the first resistor 111 is connected to the second terminal 140 of the second resistor 112, and the first terminal 139 of the second resistor 112 is connected to the second terminal 138 of the third resistor 113. The first terminal 145 of the first switch 121 is connected to the second terminal 142 of the first resistor 111, the first terminal 143 of the second switch 122 is connected to the first terminal 141 of the first resistor 111, and the second terminal 146 of the first switch 121 is connected to the second terminal 144 of the second switch 122. The first terminal 136 of the current module 140 is connected to the first terminal 137 of the third resistor 113.

[0038] The charging circuit 01 includes a first input terminal 131 , a second input terminal 132 and an output terminal 133 , wherein the first input terminal 131 may be a positive input terminal of the first amplifier circuit 110 , and the second input terminal 132 may be a positive input terminal of the second amplifier circuit 120 .

[0039] In some optional examples, the first switch 121 and the second switch 122 may have two states: disconnected and connected. The first amplifying circuit 110 and the second amplifying circuit 120 have an operating state and a non-operating state.

[0040] The current module 140 is used to provide the current I to the charging circuit 01 . The logic circuit (not shown) is used to output a signal for controlling the states of the first switch 121 and the second switch 122 .

[0041] based on Figure 2 The charging circuit 01 shown determines whether the first amplifier circuit 110 and the second amplifier circuit 120 are in an operating state or a non-operating state according to the magnitude of the input voltage of the first input terminal 131 and the input voltage of the second input terminal 132, that is, the magnitude of the input voltage of the positive input terminal 131 of the first amplifier circuit 110 and the input voltage of the positive input terminal 132 of the second amplifier circuit 120. Then, based on the logic circuit, the first switch 121 is controlled to be in a connected state or a disconnected state, and the second switch 122 is controlled to be in a connected state or a disconnected state, so that the loop is determined based on the states of the first switch 121 and the second switch 122, and the system reference voltage output by the charging circuit 01 is determined based on the voltage drop of at least one resistor in the loop.

[0042] In some optional examples, when the input voltage of the first input terminal 131 of the charging circuit 01 is greater than the input voltage of the second input terminal 132, that is, the input voltage of the positive input terminal 131 of the first amplifier circuit 110 is greater than the input voltage of the positive input terminal 132 of the second amplifier circuit 120, the first amplifier circuit 110 is in a working state, and the second amplifier circuit 120 is in a non-working state. At this time, the input voltage of the charging circuit 01 can be the input voltage of the first input terminal 131, that is, the input voltage of the positive input terminal 131 of the first amplifier circuit 110. At this time, the logic circuit can output the first signal.

[0043] Among them, the first signal can indicate that the charging circuit 01 controls the first switch 121 to be in a disconnected state and controls the second switch 122 to be in a connected state in the charging and non-charging states. At this time, the loop includes: the first amplifier circuit 110, the third resistor 113, the second resistor 112 and the second switch 122. Based on the loop, the current module 140 causes the current I to flow through the second resistor 112 to generate a second voltage drop, which is the voltage of the second resistor 112, and then flows through the third resistor 113 to generate a third voltage drop, which is the voltage of the third resistor 113. At this time, the output voltage of the output terminal 133 of the charging circuit 01 is the sum of the input voltage of the negative input terminal 134 of the first amplifier circuit 110, the voltage of the second resistor 112 and the voltage of the third resistor 113.

[0044] In some other optional embodiments, when the input voltage of the second input terminal 132 of the charging circuit 01 is greater than the input voltage of the first input terminal 131, that is, the input voltage of the positive input terminal 132 of the second amplifier circuit 120 is greater than the input voltage of the positive input terminal 131 of the first amplifier circuit 110, the second amplifier circuit 120 is in a working state, and the first amplifier circuit 110 is in a non-working state. At this time, the input voltage of the charging circuit 01 can be the input voltage of the second input terminal 132, that is, the input voltage of the positive input terminal 132 of the second amplifier circuit 120. At this time, the logic circuit can output the second signal or the third signal.

[0045] Among them, the second signal can indicate that the charging circuit 01 controls the first switch 121 to be in a connected state and controls the second switch 122 to be in a disconnected state in the charging state. At this time, the loop includes: the second amplifier circuit 120, the second resistor 112, the first resistor 111 and the first switch 121. Based on the loop, the current module 140 allows the current I to first flow through the first resistor 111 to generate a first voltage drop, that is, the voltage of the first resistor 111, and then flow through the second resistor 112 to generate a second voltage drop, that is, the voltage of the second resistor 112. At this time, the system reference voltage output by the output terminal 133 of the charging circuit 01 is the sum of the input voltage of the negative input terminal 135 of the second amplifier circuit 120, the voltage of the first resistor 111 and the voltage of the second resistor 112.

[0046] The third signal can indicate that the charging circuit 01 controls the first switch 121 to be in a disconnected state and controls the second switch 122 to be in a connected state when the charging circuit 01 is in a non-charging state. At this time, the loop includes: the second amplifier circuit 120, the second resistor 112 and the second switch 122. Based on the loop, the current module 140 causes the current I to flow through the second resistor 112 to generate a second voltage drop, which is the voltage of the second resistor 112. At this time, the system reference voltage output by the output terminal 133 of the charging circuit 01 is the sum of the input voltage of the negative input terminal 135 of the second amplifier circuit 120 and the voltage of the second resistor 112.

[0047] In some optional examples, the first amplifier circuit 110 of the charging circuit 01 may be a first operational amplifier 110, the second amplifier circuit 120 may be a second operational amplifier 120, and the operational amplifier may have a positive input terminal and a negative input terminal. When the input voltage of the first input terminal 131 of the charging circuit 01 is greater than the input voltage of the second input terminal 132, that is, the input voltage of the positive input terminal 131 of the first operational amplifier 110 is greater than the input voltage of the positive input terminal 132 of the second operational amplifier 120, the output voltage of the output terminal 133 of the charging circuit 01 is the sum of the input voltage of the negative input terminal 134 of the first operational amplifier 110 and the voltage of the resistor in the loop.

[0048] The specific implementation process of the technical solution provided in the embodiments of the present application is described in detail below with reference to the accompanying drawings.

[0049] Figure 3 FIG. 2 shows a circuit diagram of a charging circuit 01 in an embodiment of the present application. The charging circuit 01 can have two states: charging and non-charging. Figure 3 As shown, the charging circuit 01 includes a first operational amplifier 110, a second operational amplifier 120, a logic circuit (not shown), a first resistor 111, a second resistor 112, a third resistor 113, a first switch 121, a second switch 122, a first MOS transistor 151 and a second MOS transistor 152.

[0050] Among them, the positive input terminal 131 of the first operational amplifier 110 can be a voltage divided by the preset minimum voltage of the system, denoted as VSYSMIN, the negative input terminal 134 of the first operational amplifier 110 can be a voltage whose absolute value is equal to the voltage divided by the preset minimum voltage of the system, denoted as VA, and the output terminal of the first operational amplifier 110 can be denoted as VGA. The positive input terminal 132 of the second operational amplifier 120 can be a battery feedback voltage, denoted as VBAT_FB, the negative input terminal 135 of the second operational amplifier 120 can be a voltage whose absolute value is equal to the battery feedback voltage, denoted as VB, and the output terminal of the second operational amplifier 120 can be denoted as VGB. The output voltage of the output terminal 133 of the charging circuit 01 can be a system reference voltage, denoted as VREF_SYS.

[0051] In some optional examples, the charging circuit 01 further includes a first node 161 and a second node 162, wherein the first node 161 is connected to the negative input terminal 134 of the first operational amplifier 110, and the second node 162 is connected to the negative input terminal 135 of the second operational amplifier 120. It can be understood that the voltage of the first node 161 is equal to VA, and the voltage of the second node 162 is equal to VB.

[0052] In some optional examples, the logic circuit may output signals, such as a first signal, a second signal, and a third signal. The first signal may indicate that the charging circuit 01 controls the first switch 121 to be in a disconnected state and controls the second switch 122 to be in a connected state when the charging circuit 01 is in a charging state or a non-charging state. The second signal may indicate that the charging circuit 01 controls the first switch 121 to be in a connected state and controls the second switch 122 to be in a disconnected state when the charging circuit 01 is in a charging state. The third signal may indicate that the charging circuit 01 controls the first switch 121 to be in a disconnected state and controls the second switch 122 to be in a connected state when the charging circuit 01 is in a non-charging state.

[0053] In some optional embodiments, the second MOS transistor 152 can be used to import the current I, and the first MOS transistor 151 can be used to copy the current I imported by the second MOS transistor 152 in proportion, thereby changing the magnitude of the current I input to the charging circuit 01. For example, if the first MOS transistor 151 copies the current I at a ratio of 1:1, the magnitude of the current I remains unchanged. If the first MOS transistor 151 copies the current I at a ratio of 1:N (N is greater than 0 and not equal to 1), it means that the current I changes.

[0054] In some optional embodiments, the resistance of the first resistor 111, the resistance of the second resistor 112 and the resistance of the third resistor 113 in the charging circuit 01 may be constant. The first switch 121 and the second switch 122 may have two states: disconnected and connected.

[0055] In some specific implementations, when VSYSMIN>VBAT_FB, the first operational amplifier 110 is in an operating state, and the second operational amplifier 120 is in a non-operating state. At this time, the input voltage of the charging circuit 01 can be the input voltage of the negative input terminal 134 of the first operational amplifier 110, that is, the voltage at the first node 161 is equal to VA, and VA is equal to VSYSMIN. At this time, the logic circuit can output a first signal, which is used to indicate that the charging circuit 01 controls the first switch 121 to be in a disconnected state and controls the second switch 122 to be in a connected state in a charging or non-charging state. At this time, the loop includes: the first operational amplifier 110, the third resistor 113, the second resistor 112 and the second switch 122.

[0056] Based on the above loop, the specific workflow is as follows:

[0057] The current I flows through the second MOS transistor 152 and the first MOS transistor 151, and the first MOS transistor 151 replicates the current I in proportion. For example, if the current I=1μA, the replication ratio of the current I by the first MOS transistor 151 is 1:1, corresponding to the current I being constant, the current in the loop is 1μA. If the replication ratio of the current I by the first MOS transistor 151 is 1:1.25, corresponding to the current I changing, the current in the loop is 1.25μA.

[0058] The first MOS transistor 151 causes the introduced current I to flow through the second resistor 112 and the third resistor 113 in sequence, so that the third resistor 113 generates a third voltage drop V 113 , that is, the voltage of the third resistor 113, the second resistor 112 generates a second voltage drop V 112 , that is, the voltage of the second resistor 112. At this time, since the second switch 122 is in the connected state, the output terminal 133 of the charging circuit 01 outputs VREF_SYS. Since the voltage at the first node 161 is equal to VA, and VA is equal to VSYSMIN, VREF_SYS=VSYSMIN+V 113 +V 112 .

[0059] In some specific implementations, when VBAT_FB>VSYSMIN, the second operational amplifier 120 is in an operating state, and the first operational amplifier 110 is in a non-operating state. At this time, the input voltage of the charging circuit 01 can be the input voltage of the negative input terminal 135 of the second operational amplifier 120, that is, the voltage at the second node 162 is equal to VB, and VB is equal to VBAT_FB. At this time, the logic circuit can output the second signal and the third signal.

[0060] In some optional examples, the logic circuit outputs a second signal, which indicates that the charging circuit 01 is in a charging state, controls the first switch 121 to be in a connected state, and controls the second switch 122 to be in a disconnected state. In this case, the loop includes: a second operational amplifier 120, a second resistor 112, a first resistor 111, and a first switch 121.

[0061] Based on the above loop, the specific workflow is as follows:

[0062] The current I flows through the second MOS transistor 152 and the first MOS transistor 151, and the first MOS transistor 151 replicates the current I in proportion. For example, if the current I=1μA, the replication ratio of the current I by the first MOS transistor 151 is 1:1, corresponding to the current I being constant, the current in the loop is 1μA. If the replication ratio of the current I by the first MOS transistor 151 is 1:1.25, corresponding to the current I changing, the current in the loop is 1.25μA.

[0063] The first MOS transistor 151 allows the introduced current I to flow through the first resistor 111 and the second resistor 112 in sequence, so that the second resistor 112 generates a second voltage drop V 112 , that is, the voltage of the second resistor 112, the first resistor 111 generates a first voltage drop V 111 , that is, the voltage of the first resistor 111. At this time, since the first switch 121 is in a connected state, the output terminal 133 of the charging circuit 01 outputs VREF_SYS. Since the voltage at the second node 162 is equal to VB, and VB is equal to VBAT_FB, VREF_SYS=VBAT_FB+V 112 +V 111 .

[0064] In some optional examples, the logic circuit outputs a third signal, which is used to instruct the charging circuit 01 to control the first switch 121 to be in a disconnected state and the second switch 122 to be in a connected state when the charging circuit 01 is in a non-charging state. In this case, the loop includes: a second operational amplifier 120, a second resistor 112, and a second switch 122.

[0065] Based on the above loop, the specific workflow is as follows:

[0066] The current I flows through the second MOS transistor 152 and the first MOS transistor 151, and the first MOS transistor 151 proportionally replicates the current I. For example, if the current I=1μA, the replication ratio of the current I by the first MOS transistor 151 is 1:1, corresponding to the current I being constant, the current in the loop is 1μA. If the replication ratio of the current I by the first MOS transistor 151 is 1:1.25, corresponding to the current I changing, the current in the loop is 1.25μA.

[0067] The first MOS transistor 151 allows the introduced current I to flow through the second resistor 112, so that the second resistor 112 generates a second voltage drop V 112 , that is, the voltage of the second resistor 112. At this time, since the second switch 122 is in the connected state, the output terminal 133 of the charging circuit 01 outputs VREF_SYS. Since the voltage at the second node 162 is equal to VB, and VB is equal to VBAT_FB, VREF_SYS=VBAT_FB+V 112 .

[0068] In the embodiment of the present application, two operational amplifiers are used to achieve smooth switching between the system preset minimum voltage and the battery voltage, thereby being able to automatically adjust the system voltage.

[0069] The specific implementation process of the technical solution provided by another embodiment of the present application is described in detail below with reference to the accompanying drawings.

[0070] Figure 4 FIG. 2 shows a circuit diagram of a charging circuit 01 in an embodiment of the present application. The charging circuit 01 can have two states: charging and non-charging. Figure 4 As shown, the charging circuit 01 includes a first operational amplifier 110, a second operational amplifier 120, a logic circuit (not shown), a digital register (not shown), a first resistor 111, a second resistor 112, a third resistor 113, a first switch 121, a second switch 122 and a first MOS tube 151.

[0071] Among them, the positive input terminal 131 of the first operational amplifier 110 can be a voltage divided by the preset minimum voltage of the system, denoted as VSYSMIN, the negative input terminal 134 of the first operational amplifier 110 can be a voltage whose absolute value is equal to the voltage divided by the preset minimum voltage of the system, denoted as VA, and the output terminal of the first operational amplifier 110 can be denoted as VGA. The positive input terminal 132 of the second operational amplifier 120 can be a battery feedback voltage, denoted as VBAT_FB, the negative input terminal 135 of the second operational amplifier 120 can be a voltage whose absolute value is equal to the battery feedback voltage, denoted as VB, and the output terminal of the second operational amplifier 120 can be denoted as VGB. The output voltage of the output terminal 133 of the charging circuit 01 can be a system reference voltage, denoted as VREF_SYS.

[0072] In some optional examples, the charging circuit 01 further includes a first node 161 and a second node 162, wherein the first node 161 is connected to the negative input terminal 134 of the first operational amplifier 110, and the second node 162 is connected to the negative input terminal 135 of the second operational amplifier 120. It can be understood that the voltage of the first node 161 is equal to VA, and the voltage of the second node 162 is equal to VB.

[0073] In some optional examples, the logic circuit may output signals, such as a first signal, a second signal, and a third signal. The first signal may indicate that the charging circuit 01 controls the first switch 121 to be in a disconnected state and controls the second switch 122 to be in a connected state when the charging circuit 01 is in a charging state or a non-charging state. The second signal may indicate that the charging circuit 01 controls the first switch 121 to be in a connected state and controls the second switch 122 to be in a disconnected state when the charging circuit 01 is in a charging state. The third signal may indicate that the charging circuit 01 controls the first switch 121 to be in a disconnected state and controls the second switch 122 to be in a connected state when the charging circuit 01 is in a non-charging state.

[0074] In some optional embodiments, the first MOS transistor 151 may be used to introduce a current I into the charging circuit 01 , that is, the current I may be a constant value.

[0075] In some optional embodiments, the digital register in the charging circuit 01 can change the resistance value of the resistor in the circuit by changing the stored count value. For example, when the count value stored in the digital register is "0", the resistance value R of the first resistor 111 is 111 =1.25 kΩ, the resistance value of the second resistor 112 is R 112 =0.5 kΩ, the resistance value of the third resistor 113 is R 113 =1.25kΩ, when the count value stored in the digital register is "1", the resistance value of the first resistor 111 is R111=0.8kΩ, the resistance value of the second resistor 112 is R 112 =1.2 kΩ, the resistance value of the third resistor 113 is R 113 =1 kΩ. Therefore, the resistance of the first resistor 111, the resistance of the second resistor 112, and the resistance of the third resistor 113 can be variable. The first switch 121 and the second switch 122 can have two states: disconnected and connected.

[0076] In some specific implementations, when VSYSMIN>VBAT_FB, the first operational amplifier 110 is in an operating state, and the second operational amplifier 120 is in a non-operating state. At this time, the input voltage of the charging circuit 01 can be the input voltage of the negative input terminal 134 of the first operational amplifier 110, that is, the voltage at the first node 161 is equal to VA, and VA is equal to VSYSMIN. At this time, the logic circuit can output a first signal, which is used to indicate that the charging circuit 01 controls the first switch 121 to be in a disconnected state and controls the second switch 122 to be in a connected state in a charging or non-charging state. At this time, the loop includes: the first operational amplifier 110, the third resistor 113, the second resistor 112 and the second switch 122.

[0077] Based on the above loop, the specific workflow is as follows:

[0078] The first MOS transistor 151 causes the introduced current I to flow through the second resistor 112 and the third resistor 113 in sequence, so that the third resistor 113 generates a third voltage drop V 113 , that is, the voltage of the third resistor 113, the second resistor 112 generates a second voltage drop V 112 , that is, the voltage of the second resistor 112. At this time, since the second switch 122 is in the connected state, the output terminal 133 of the charging circuit 01 outputs VREF_SYS. Since the voltage at the first node 161 is equal to VA, and VA is equal to VSYSMIN, VREF_SYS=VSYSMIN+V 113 +V 112 .

[0079] In some specific implementations, when VBAT_FB>VSYSMIN, the second operational amplifier 120 is in an operating state, and the first operational amplifier 110 is in a non-operating state. At this time, the input voltage of the charging circuit 01 can be the input voltage of the negative input terminal 135 of the second operational amplifier 120, that is, the voltage at the second node 162 is equal to VB, and VB is equal to VBAT_FB. At this time, the logic circuit can output the second signal and the third signal.

[0080] In some optional examples, the logic circuit outputs a second signal, which is used to indicate that the charging circuit 01 controls the first switch 121 to be in a connected state and controls the second switch 122 to be in a disconnected state when in a charging state. In this case, the loop includes: a second operational amplifier 120, a second resistor 112, a first resistor 111, and a first switch 121.

[0081] Based on the above loop, the specific workflow is as follows:

[0082] The first MOS transistor 151 allows the introduced current I to flow through the first resistor 111 and the second resistor 112 in sequence, so that the second resistor 112 generates a second voltage drop V 112 , that is, the voltage of the second resistor 112, the first resistor 111 generates a first voltage drop V 111 , that is, the voltage of the first resistor 111. At this time, since the first switch 121 is in a connected state, the output terminal 133 of the charging circuit 01 outputs VREF_SYS. Since the voltage at the second node 162 is equal to VB, and VB is equal to VBAT_FB, VREF_SYS=VBAT_FB+V 112 +V 111 .

[0083] In some optional examples, the logic circuit outputs a third signal, which is used to instruct the charging circuit 01 to control the first switch 121 to be in a disconnected state and the second switch 122 to be in a connected state when the charging circuit 01 is in a non-charging state. In this case, the loop includes: a second operational amplifier 120, a second resistor 112, and a second switch 122.

[0084] Based on the above loop, the specific workflow is as follows:

[0085] The first MOS transistor 151 allows the introduced current I to flow through the second resistor 112, so that the second resistor 112 generates a second voltage drop V 112 , that is, the voltage of the second resistor 112. At this time, since the second switch 122 is in the connected state, the output terminal 133 of the charging circuit 01 outputs VREF_SYS. Since the voltage at the second node 162 is equal to VB, and VB is equal to VBAT_FB, VREF_SYS=VBAT_FB+V 112 .

[0086] It can be seen from the above embodiment that when VSYSMIN>VBAT_FB, the charging circuit 01 is in the charging state and the non-charging state, VREF_SYS=VSYSMIN+V 113 +V 112 ; When VBAT_FB>VSYSMIN, the charging circuit 01 is in the charging state VREF_SYS=VBAT_FB+V 112 +V 111 , charging circuit 01 is in the non-charging state, VREF_SYS=VBAT_FB+V 112 In the embodiments provided in the present application, a change in the current I or a change in the resistance value of the resistor corresponds to a change in the voltage of the resistor in the loop, thereby changing the change in the loop output voltage (system reference voltage).

[0087] The relationship between the system reference voltage and the battery feedback voltage is introduced below. In some optional examples, the system voltage can be 4 times the system reference voltage, and the battery voltage can be 4 times the battery feedback voltage. For ease of explanation, the relationship between the system reference voltage and the battery feedback voltage is introduced below based on the relationship between the system voltage and the battery voltage, where the system voltage can be recorded as VSYS and the battery voltage can be recorded as VBAT.

[0088] In some specific implementations, VSYSMIN = 1 / 4VSYS_MIN, VBAT_FB = 1 / 4VBAT, VREF_SYS = 1 / 4VSYS. Correspondingly, VSYSMIN > VBAT_FB can be VSYS_MIN > VBAT; VBAT_FB > VSYSMIN can be VBAT > VSYS_MIN. Furthermore, the voltages of the first resistor 111, the second resistor 112, and the third resistor 113 can also be represented in the same proportion, denoted as V1, V2, V3. Among them, V 111 = 1 / 4V1, V 112 = 1 / 4V2, V 113 = 1 / 4V3. Thus, when VSYS_MIN > VBAT, in the charging and non-charging states of the charging circuit 01, VSYS = VSYS_MIN + V2 + V3; when VBAT > VSYS_MIN, in the charging state of the charging circuit 01, VSYS = VBAT + V1 + V2, and in the non-charging state of the charging circuit 01, VSYS = VBAT + V2.

[0089] The following details the relationship between the system voltage and the battery voltage in the embodiments of the present application in combination with the above embodiments.

[0090] Figure 5 A relationship coordinate diagram of VBAT and VSYS is provided. Among them, the abscissa is VBAT, the ordinate is VSYS, the straight line 401 represents VSYS_MIN, the dotted lines 402 and 404 represent that the charging circuit 01 is in the charging state, and the solid lines 403 and 405 represent that the charging circuit 01 is in the non-charging state. The point a can be shown as the value of VSYS_MIN on the abscissa, that is, in the abscissa interval [0, a], it can be shown as VBAT < VSYS_MIN, and in the interval [a, ∞], it can be shown as VSYS_MIN < VBAT. The point b can be shown as the value of VSYS_MIN on the ordinate, and the point c can be shown as the value of VSYS when VBAT < VSYS_MIN.

[0091] Correspondingly, when VSYS_MIN > VBAT, that is, in the abscissa interval [0, a] part, the dotted line 402 represents that in the charging state of the charging circuit 01, VSYS = VSYS_MIN + V2 + V3, and the solid line 403 represents that in the non-charging state of the charging circuit 01, VSYS = VSYS_MIN + V2 + V3. Therefore, the solid line 403 coincides with the dotted line 402, and the value of VSYS at this time corresponds to the point b on the ordinate.

[0092] For example, VSYS_MIN = 3.5V, V2 = 50mV, V3 = 100mV, and at this time VSYS = 3.65V.

[0093] When VBAT>VSYS_MIN, that is, in the horizontal axis interval [a, ∞], the dotted line 404 indicates that the charging circuit 01 is in the charging state, VSYS=VBAT+V1+V2, and the solid line 405 indicates that the charging circuit 01 is in the non-charging state, VSYS=VBAT+V2. Therefore, the dotted line 404 is higher than the solid line 405, and as VBAT increases, VSYS also increases continuously.

[0094] For example, V2=50mV, V1=100mV, in the charging state, VSYS=VBAT+150mV; in the non-charging state, VSYS=VBAT+50mV.

[0095] Therefore, the charging circuit 01 realizes smooth switching between the preset minimum voltage of the system and the battery voltage through two operational amplifiers according to the size of the preset minimum voltage of the system and the battery voltage, so as to automatically adjust the system voltage. Even if the battery is completely exhausted or the battery is removed, the system can automatically adjust the system voltage to ensure that the system can supply power to the subsequent circuits normally. And in the charging state, the system voltage can also increase with the increase of the battery voltage.

[0096] This embodiment is a charging circuit implementation method corresponding to the above circuit embodiment, and this embodiment can be implemented in conjunction with the circuit implementation method. The relevant technical details mentioned in the circuit implementation method are still valid in this embodiment, and in order to reduce repetition, they are not repeated here. Accordingly, the relevant technical details mentioned in this embodiment can also be applied in the circuit implementation method.

[0097] An embodiment of the present application provides a chip, which may include a circuit, and the circuit is used to execute the charging circuit of the automatic voltage switching described in the embodiment.

[0098] This embodiment is a chip implementation corresponding to the above circuit embodiment, and this embodiment can be implemented in conjunction with the charging circuit implementation. The relevant technical details mentioned in the circuit implementation are still valid in this embodiment, and in order to reduce repetition, they are not repeated here. Accordingly, the relevant technical details mentioned in this embodiment can also be applied in the circuit implementation.

[0099] An embodiment of the present application provides an electronic device, which may include the above-mentioned chip.

[0100] The electronic device mentioned in the present application is introduced below. It can be understood that the electronic device can be any electronic device including the above-mentioned charging circuit for automatically switching voltage. But not limited to: mobile phones (including foldable screen mobile phones and straight-screen mobile phones), tablet computers, desktop computers, handheld computers, laptop computers, ultra-mobile personal computers (UMPC), netbooks, personal digital assistants (personal digital assistants), tablet computers (portable android devices, PAD), personal digital assistants (personal digital assistants, PDA), handheld devices with wireless communication functions, computing devices, vehicle-mounted devices or wearable devices, virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, wireless terminals in industrial control, wireless terminals in self driving, wireless terminals in remote medical, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, and other mobile terminals or fixed terminals, power banks and other electronic devices with data transmission synchronization requirements.

[0101] It should be noted that in the examples and description of this patent, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "including one" do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0102] Although the present application has been illustrated and described with reference to certain preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the present application.

Claims

1. A charging circuit, characterized in that: The charging circuit includes a first amplifying circuit, a second amplifying circuit, a voltage regulating module and a voltage output module; The first amplifying circuit is connected to the voltage regulating module, and the second amplifying circuit is connected to the voltage regulating module; The voltage output module is connected to the voltage regulating module.

2. The charging circuit according to claim 1, characterized in that: The voltage regulating module includes a first resistor, a second resistor and a third resistor, and the voltage output module includes a first switch and a second switch. The negative input terminal of the first amplifier circuit is connected to the first end of the third resistor, and the negative input terminal of the second amplifier circuit is connected to the second end of the third resistor; The first resistor, the second resistor and the third resistor are connected in sequence; A first end of the first switch is connected to a second end of the first resistor, a first end of the second switch is connected to a first end of the first resistor, and a second end of the first switch is connected to a second end of the second switch.

3. The charging circuit according to claim 2, characterized in that: The charging circuit further includes: a logic circuit, When the input voltage of the positive input terminal of the first amplifier circuit is greater than the input voltage of the positive input terminal of the second amplifier circuit, the logic circuit is used to output a first signal, and the first signal is used to control the first switch to be in a disconnected state and control the second switch to be in a connected state.

4. The charging circuit according to claim 3, characterized in that: When the first switch is in an off state and the second switch is in a connected state, a first loop is formed. The first loop includes: the first amplifying circuit, the third resistor, the second resistor and the second switch.

5. The charging circuit according to claim 4, characterized in that: When the charging circuit is the first loop, the output voltage of the output end of the charging circuit is the sum of the input voltage of the negative input end of the first amplifier circuit, the voltage drop of the second resistor and the voltage drop of the third resistor.

6. The charging circuit according to claim 3, characterized in that: When the input voltage of the positive input terminal of the first amplifier circuit is less than the input voltage of the positive input terminal of the second amplifier circuit and the charging circuit is in a charging state, the logic circuit is used to output a second signal, and the second signal is used to control the first switch to be in a connected state and control the second switch to be in a disconnected state.

7. The charging circuit according to claim 6, characterized in that: When the first switch is in a connected state and the second switch is in a disconnected state, a second circuit is formed. The second loop includes: the second amplifying circuit, the second resistor, the first resistor and the first switch.

8. The charging circuit according to claim 7, characterized in that: When the charging circuit is the second loop, the output voltage of the output end of the charging circuit is the sum of the input voltage of the negative input end of the second amplifier circuit, the voltage drop of the second resistor, and the voltage drop of the first resistor.

9. The charging circuit according to claim 3, characterized in that: When the input voltage of the positive input terminal of the first amplifier circuit is less than the input voltage of the positive input terminal of the second amplifier circuit and the charging circuit is in a non-charging state, the logic circuit is used to output a third signal, and the third signal is used to control the first switch to be in a disconnected state and control the second switch to be in a connected state.

10. The charging circuit according to claim 9, characterized in that: When the first switch is in the disconnected state and the second switch is in the connected state, a third circuit is formed. The third loop includes: the second amplifying circuit, the second resistor and the second switch.

11. The charging circuit according to claim 10, characterized in that: When the charging circuit is the third loop, the output voltage of the output end of the charging circuit is the sum of the input voltage of the negative input end of the second amplifier circuit and the voltage drop of the first resistor.

12. The charging circuit according to any one of claims 2 to 11, characterized in that: The charging circuit further includes a first current module and a second current module. The first end of the first current module is connected to the first end of the second current module, and the second end of the second current module is connected to the first end of the third resistor.

13. The charging circuit according to any one of claims 2 to 11, characterized in that: The charging circuit further includes a first current module, The first end of the first current module is connected to the first end of the third resistor.

14. The charging circuit according to any one of claims 2 to 11, characterized in that: The charging circuit further includes a register, The register is used to change the stored count value to change the size of the first resistor, the second resistor and / or the third resistor.

15. A chip, characterized in that: The chip comprises the charging circuit as described in any one of claims 1-14.

16. An electronic device, characterized in that: Comprising the chip as claimed in claim 15.

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