An active balancing circuit structure suitable for cascade utilization of lithium batteries

Abstract

The utility model discloses an active balancing circuit structure suitable for cascade utilization of lithium batteries. It includes a lithium battery pack, a battery cell collection chip, a gate, a GPIO expansion module, a battery cell gate switch matrix and a counter-attack drive module; the lithium battery pack includes a plurality of batteries connected in series in sequence; the battery cell collection chip is connected to the gate; the battery cell collection chip is connected to the GPIO expansion module through an I2C bus; the GPIO expansion module is connected to the battery cell gate switch matrix; the battery cell collection chip is connected to the counter-attack drive module; the counter-attack drive module is connected to the lithium battery pack through the battery cell gate switch matrix; compared with the prior art, the utility model reduces the single-chip microcomputer and the single-chip microcomputer circuit set on the sub-control board through the battery cell collection chip, the gate, the first GPIO chip, etc., and does not need to provide power and communication for the single-chip microcomputer and the single-chip microcomputer circuit on the sub-control board, thereby reducing the high cost brought by the single-chip microcomputer on the sub-control board.

Description

Technical Field

[0001] The utility model belongs to the technical field of lithium batteries, and in particular relates to an active equalization circuit structure suitable for cascade utilization of lithium batteries. Background Art

[0002] There are many cells in a battery pack, and the voltages of the cells may be different. For example, some cells have a voltage of 2V, while others have a voltage of 4V. Since the voltage of the 2V cell is lower, the voltage of the 4V cell will be consumed all the time, and the service life of the entire battery pack will be shortened due to the voltage imbalance of each cell. In order to solve the problem of voltage imbalance, two balancing methods are available on the market: passive balancing and active balancing. Passive balancing is a common balancing method at present. It mainly uses resistors to consume the electric energy of high-voltage cells. The control of this balancing method is generally inside the analog front-end chip (AFE). However, the current of this passive balancing is about 100mA. If the current is too large, the heat generated by the analog front-end chip will increase. Once the chip heats up to a certain degree, it will fail. Therefore, this passive balancing method is difficult to achieve balancing of large currents. As in the prior art, the Chinese patent with publication number CN20513627U discloses a passive balancing device for lithium batteries, which also mentions passive balancing of batteries.

[0003] The current energy storage market is booming, and the application of energy storage cells has also shown new characteristics. In order to improve the energy density of energy storage battery packs, large-capacity lithium-ion cells have begun to appear in energy storage applications. The capacity of such lithium-ion cells can reach 280-380AH. In the application of large-capacity cells, if battery balancing is performed, a relatively large current will be required, and this current needs to be greater than 1A, so the currently commonly used passive balancing method will no longer be applicable.

[0004] In addition, with the popularity of electric vehicles, retired batteries have gradually increased, and energy storage has become one of the important application areas of these batteries. However, the main difficulty in the cascade utilization of retired batteries for energy storage is the poor consistency of the battery cells. During their application, a large current balancing method is required to maintain their consistency, so active balancing is the ideal solution.

[0005] However, although the current system using active balancing can effectively improve the balancing current and energy transfer efficiency, its high cost is also the main reason limiting the promotion of active balancing.

[0006] Therefore, there is an urgent need for an active balancing circuit structure suitable for cascade utilization of lithium batteries to solve the above problems, which can not only ensure high efficiency and large current balancing, but also reduce production costs. Summary of the invention

[0007] In view of the problems in the related technology, the utility model proposes an active balancing circuit structure suitable for the cascade utilization of lithium batteries to overcome the above-mentioned technical problems existing in the existing related technology. The utility model reduces the single-chip microcomputer and single-chip microcomputer circuit set on the sub-control board through the battery cell acquisition chip, the gate, the first GPIO chip, etc., and there is no need to provide power supply and communication for the single-chip microcomputer and the single-chip microcomputer circuit on the sub-control board, thereby reducing the high cost brought by the single-chip microcomputer on the sub-control board and being more practical.

[0008] The technical solution of the utility model is implemented as follows: an active balancing circuit structure suitable for cascade utilization of lithium batteries, including a lithium battery pack, a battery cell acquisition chip, a gate, a GPIO expansion module, a battery cell gate switch matrix and a counter-drive module;

[0009] The lithium battery pack includes a plurality of battery cells connected in series, each of which has a positive electrode and a negative electrode; the battery cell selection switch matrix includes a plurality of selection switches, and the positive and negative electrodes of each battery cell are respectively connected to a selection switch;

[0010] The battery cell acquisition chip is connected to the gate; the battery cell acquisition chip has a plurality of acquisition channels, and the gate is used to expand more acquisition channels for the battery cell acquisition chip; the battery cell acquisition chip and each acquisition channel on the gate are respectively connected to the sensor on each battery cell in a one-to-one correspondence; the acquisition channel is used to collect the voltage or temperature of the battery cell;

[0011] In the present utility model, the sensor is a thermistor NTC;

[0012] The battery cell acquisition chip is connected to the GPIO expansion module via an I2C bus; the GPIO expansion module is connected to the battery cell gating switch matrix;

[0013] The battery cell collection chip is connected to the counter-attack driving module; the counter-attack driving module is connected to the lithium battery pack through the battery cell selection switch matrix;

[0014] The cell acquisition chip sends an active balancing signal to the GPIO expansion module and the counter-attack driving module according to the voltage or temperature of the cell acquired by the acquisition channel; the GPIO expansion module and the counter-attack driving module drive the gate switch of the cell gate switch matrix to close according to the active balancing signal.

[0015] In the existing battery management system, a main control board and a sub-control board are included, wherein the main control board is the upper level of the sub-control board, and both the main control board and the sub-control board are provided with a single-chip microcomputer, and the upper-level main control board collects the voltage or temperature of the battery cell through the single-chip microcomputer on the sub-control board; and the battery cell acquisition chip described in the utility model is bidirectionally connected with the single-chip microcomputer of the upper-level main control board through a daisy chain communication architecture, and the active balancing circuit structure described in the utility model replaces the sub-control board in the prior art, which not only reduces the single-chip microcomputer and single-chip microcomputer circuit arranged on the sub-control board, but also does not need to provide power supply and communication for the single-chip microcomputer and single-chip microcomputer circuit on the sub-control board, thereby reducing the high cost brought by the single-chip microcomputer on the sub-control board; the daisy chain communication architecture is a communication connection structure adopted by the daisy chain communication method, which is a prior art;

[0016] Furthermore, the battery cell acquisition chip sends the received voltage or temperature data of the battery cell to the upper-level main control board, and the upper-level main control board feeds back a balancing instruction to the battery cell acquisition chip according to the voltage or temperature data of the battery cell, and the battery cell acquisition chip then sends an active balancing signal to the GPIO expansion module and the counter-attack drive module.

[0017] Further, the lithium battery pack includes a first battery cell, a second battery cell, ..., an Nth battery cell connected in series in sequence, wherein N is a positive integer greater than 1;

[0018] The cell selection switch matrix includes switch S0, switch S1, switch S2, ..., switch S(2N-1); wherein the switch S0 is connected to the negative electrode of the first cell, the switch S2 is connected to the positive electrode of the first cell, ..., and so on, the switch S(2N-3) is connected to the negative electrode of the Nth cell, and the switch S(2N-1) is connected to the positive electrode of the Nth cell.

[0019] Further, the GPIO expansion module includes a first GPIO chip, a second GPIO chip and a third GPIO chip; the battery cell acquisition chip is respectively connected to the first GPIO chip, the second GPIO chip and the third GPIO chip through an I2C bus; each of the GPIO chips is respectively connected to the battery cell selection switch matrix;

[0020] Each of the GPIO chips includes pins IO0_0 to IO0_7, and pins IO1_0 to IO1_7; wherein all the pins of the first GPIO chip, the second GPIO chip and the pins IO0_0 to IO0_7 of the third GPIO chip are respectively connected to switch S0, switch S1..., switch S(2N-1) in a one-to-one correspondence.

[0021] Further, the cell gating switch matrix further includes a circuit switch S37 and a circuit switch S36;

[0022] Each of the selection switches connected to the positive electrode of the battery cell is connected to the counter-attack driving module through the circuit switch S37; each of the selection switches connected to the negative electrode of the battery cell is connected to the counter-attack driving module through the circuit switch S36.

[0023] Furthermore, the counter-attack driving module includes a first counter-attack driving circuit and a second counter-attack driving circuit; the first counter-attack driving circuit includes a first counter-attack driving chip, a first MOS tube and a first transformer; the second counter-attack driving circuit includes a second counter-attack driving chip, a second MOS tube and a second transformer; each of the counter-attack driving chips includes an interface Isense, an interface Driver, an interface CTRL, an interface VCC, an interface Product, and an interface GND;

[0024] In the first counter-drive circuit, one end of the interface Isense is connected to the source of the first MOS tube, the other end of the interface Isense is connected to the negative electrode of the lithium battery pack through the resistor R1 and the interface GND, and the interface Driver is connected to the gate of the first MOS tube; the interface CTRL is connected to the receiving end of the first light-emitting diode LED1; the interface VCC is connected to the collector of the first transistor through the resistor R3; the emitter of the first transistor is connected to the positive electrode of the lithium battery pack; the interface Product is divided into two paths after being connected to the resistor R2, one path is connected to the positive electrode of the lithium battery pack, and the other path is connected to the primary coil of the first transformer; the secondary coil of the first transformer is connected to the circuit switch S37 and the circuit switch S36 respectively, and the first light-emitting diode LED1 is connected in parallel to the two ends of the secondary coil of the first transformer; the capacitor C1 is connected in parallel to the two ends of the first light-emitting diode LED1, and the capacitor C1 is connected to the secondary coil of the first transformer through the diode D1; the drain of the first MOS tube is connected to the primary coil of the first transformer.

[0025] Furthermore, in the second counter-drive circuit, one end of the interface Isense is connected to the source of the second MOS tube, the other end of the interface Isense is connected to the negative electrode of the lithium battery pack through the resistor R4 and the interface GND, and the interface Driver is connected to the gate of the second MOS tube; the interface CTRL is connected to the receiving end of the second light-emitting diode LED2; the interface VCC is connected to the positive electrode of the lithium battery pack through the resistor R6; the interface Product is connected to the positive electrode of the lithium battery pack through the resistor R5; the primary coil of the second transformer is connected to the positive electrode of the lithium battery pack; the second light-emitting diode LED2 is connected in parallel at both ends of the secondary coil of the second transformer; the capacitor C3 is connected in parallel at both ends of the second light-emitting diode LED2, and the capacitor C3 is connected to the secondary coil of the first transformer through the diode D2; the drain of the second MOS tube is connected to the primary coil of the second transformer.

[0026] The first counter-attack driving circuit first selects the battery cells that need to be balanced through the battery cell selection switch matrix according to the active balancing signal, and then boosts the voltage of the battery cells that need to be balanced;

[0027] Furthermore, after receiving the active balancing signal, the GPIO expansion module and the counter-attack drive module close the circuit switch S37 and the circuit switch S36, and the lithium battery pack selects the battery cells that need to be balanced through the battery cell selection switch matrix, and connects the battery cells that need to be balanced with the first counter-attack drive circuit and the second counter-attack drive circuit; the second counter-attack drive circuit supplies power, and the first counter-attack drive circuit starts the counter-attack drive and performs unidirectional charging on the battery cells that need to be balanced, and the balancing current during charging can reach more than 3A;

[0028] Compared with the current of about 100 mA obtained by passive balancing in the prior art, the balancing current obtained by the active balancing circuit structure of the utility model is larger and sufficient to maintain the consistency of the battery cells.

[0029] Furthermore, it also includes an LDO low-voltage dropout linear regulator, the input end of the LDO low-voltage dropout linear regulator is connected to the second counter-drive circuit, and the output end of the LDO low-voltage dropout linear regulator is respectively connected to the gate and the GPIO expansion module; the second counter-drive circuit is used to provide input voltage for the LDO low-voltage dropout linear regulator and each of the gate switches; the LDO low-voltage dropout linear regulator is used to convert the input voltage into the operating voltage of the gate and the GPIO expansion module;

[0030] In the present invention, the input voltage is 12V, and the operating voltage of the gate and GPIO expansion module is 5V.

[0031] Furthermore, each of the selection switches includes an electromagnetic induction switch, an electromagnetic induction coil and a second transistor; one end of the electromagnetic induction switch is connected to the positive electrode or the negative electrode of the lithium battery pack, and the other end is connected to the circuit switch S37 or the circuit switch S36; one end of the electromagnetic induction coil is connected to the input voltage, and the other end is connected to the emitter of the second transistor; the collector of the second transistor is grounded, and the base of the second transistor is connected to the circuit switch S37 or the circuit switch S36.

[0032] Further, the selector includes pins Y_0 to Y_15, pins S0 to S3, pin E and pin Z; wherein the pins S0 to S3 and pin E of the selector are connected to the pins IO1_0 to IO1_7 of the third GPIO chip in a one-to-one correspondence.

[0033] Furthermore, each of the GPIO chips has a pin SCL and a pin SDA;

[0034] The battery cell acquisition chip includes pins GPIO_0 to GPIO_7; wherein the pin GPIO_0 is connected to the pin Z of the selector; the pins GPIO_1 to GPIO_2 of the battery cell acquisition chip and the pins Y_0 to Y_15 of the selector form a plurality of acquisition channels; the pin GPIO_3 is connected to the base of the first transistor; the pin GPIO_4 is respectively connected to the pin SCL of each GPIO chip through the I2C bus; the pin GPIO_5 is respectively connected to the pin SDA of each GPIO chip through the I2C bus.

[0035] Beneficial effects of the utility model:

[0036] (1) The utility model provides an active balancing circuit structure suitable for cascade utilization of lithium batteries, including a lithium battery pack, a battery cell collection chip, a gate, a GPIO expansion module, a battery cell selection switch matrix and a counter-drive module; compared with the prior art, the utility model reduces the number of single-chip microcomputers and single-chip microcomputer circuits arranged on the sub-control board through the battery cell collection chip, the gate, the first GPIO chip, etc., and does not need to provide power and communication for the single-chip microcomputer and the single-chip microcomputer circuit on the sub-control board, thereby reducing the high cost caused by the single-chip microcomputer on the sub-control board;

[0037] (2) The cell acquisition chip is connected to the GPIO expansion module via an I2C bus; the GPIO expansion module is connected to the cell selection switch matrix; the utility model uses the I2C bus for communication, so that the communication bus in the active balancing circuit structure occupies less space, and can also effectively reduce the space of the circuit board and the number of chip legs, thereby reducing the interconnection cost;

[0038] (3) The battery cell acquisition chip sends an active balancing signal to the GPIO expansion module and the counter-attack drive module according to the voltage or temperature of the battery cell collected by the acquisition channel; the GPIO expansion module and the counter-attack drive module drive the battery cell selection switch matrix to select the battery cell that needs to be balanced according to the active balancing signal, and the counter-attack drive module then boosts the voltage of the battery cell that needs to be balanced; so that the utility model can ensure high efficiency and achieve large current balancing at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 This is a structural principle block diagram of an active equalization circuit structure suitable for cascade utilization of lithium batteries in the utility model;

[0040] Figure 2 This is a circuit diagram of an active equalization circuit structure suitable for cascade utilization of lithium batteries in the utility model;

[0041] Figure 3 This is a circuit diagram of the counter-attack drive module described in the utility model;

[0042] Figure 4 The schematic diagram is a circuit diagram of a single switch in the matrix switch of the utility model.

[0043] Marking Description:

[0044] 1. Cell collection chip; 2. Selector; 3. First GPIO chip; 4. Second GPIO chip; 5. Third GPIO chip; 6. First counter-attack driver chip; 7. Second counter-attack driver chip; 8. I2C bus; 9. Cell selection switch matrix; 91. Electromagnetic induction switch; 92. Electromagnetic induction coil; 93. Second transistor; 10. LDO low voltage difference linear regulator. DETAILED DESCRIPTION

[0045] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0046] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0047] like Figure 1-2 As shown, this embodiment provides an active balancing circuit structure suitable for cascade utilization of lithium batteries, including a lithium battery pack, a battery cell acquisition chip 1, a gate 2, a GPIO expansion module, a battery cell gate switch matrix 9 and a counter-drive module;

[0048] The lithium battery pack includes a plurality of cells connected in series, each of which has a positive electrode and a negative electrode; the cell selection switch matrix 9 includes a plurality of selection switches, and the positive and negative electrodes of each cell are respectively connected to a selection switch;

[0049] The battery cell acquisition chip 1 is connected to the gate 2; the battery cell acquisition chip 1 has a plurality of acquisition channels, and the gate 2 is used to expand more acquisition channels for the battery cell acquisition chip 1; the battery cell acquisition chip 1 and each acquisition channel on the gate 2 are respectively connected to the sensor on each battery cell in a one-to-one correspondence; the acquisition channel is used to collect the voltage or temperature of the battery cell;

[0050] In this embodiment, the sensor is a thermistor NTC;

[0051] The battery cell acquisition chip 1 is connected to the GPIO expansion module via the I2C bus 8; the GPIO expansion module is connected to the battery cell selection switch matrix 9;

[0052] The battery cell collection chip 1 is connected to the counter-attack driving module; the counter-attack driving module is connected to the lithium battery pack through the battery cell selection switch matrix 9;

[0053] The cell acquisition chip 1 sends an active balancing signal to the GPIO expansion module and the counter-attack drive module according to the voltage or temperature of the cell acquired by the acquisition channel; the GPIO expansion module and the counter-attack drive module drive the gate switch of the cell gate switch matrix 9 to close according to the active balancing signal;

[0054] In the existing battery management system, a main control board and a sub-control board are included, wherein the main control board is the upper level of the sub-control board, and both the main control board and the sub-control board are provided with a single-chip microcomputer, and the upper-level main control board collects the voltage or temperature of the battery cell through the single-chip microcomputer on the sub-control board; and the battery cell acquisition chip 1 described in this embodiment is bidirectionally connected to the single-chip microcomputer of the upper-level main control board through a daisy chain communication architecture, and the active balancing circuit structure described in this embodiment replaces the sub-control board in the prior art; the daisy chain communication architecture is a communication connection structure adopted by the daisy chain communication method, which is a prior art;

[0055] Specifically, the cell acquisition chip 1 sends the received cell voltage or temperature data to the upper-level main control board, and the upper-level main control board feeds back a balancing instruction to the cell acquisition chip 1 according to the cell voltage or temperature data, and the cell acquisition chip 1 then sends an active balancing signal to the GPIO expansion module and the counter-drive module;

[0056] The designs of the cell acquisition chip 1, the gate 2, the GPIO expansion module, the cell gate switch matrix 9 and the counter-drive module enable this embodiment to reduce the number of single-chip microcomputers and single-chip microcomputer circuits provided on the sub-control board, and to eliminate the need to provide power and communication for the single-chip microcomputers and single-chip microcomputer circuits on the sub-control board, thereby reducing the high cost caused by the single-chip microcomputers on the sub-control board.

[0057] Specifically, the lithium battery pack includes a first battery cell, a second battery cell, ..., an Nth battery cell connected in series in sequence, wherein N is a positive integer greater than 1;

[0058] The cell selection switch matrix 9 includes switch S0, switch S1, switch S2, ..., switch S(2N-1); wherein the switch S0 is connected to the negative electrode of the first cell, the switch S2 is connected to the positive electrode of the first cell, ..., and so on, the switch S(2N-3) is connected to the negative electrode of the Nth cell, and the switch S(2N-1) is connected to the positive electrode of the Nth cell.

[0059] Specifically, the GPIO expansion module includes a first GPIO chip 3, a second GPIO chip 4 and a third GPIO chip 5; the battery cell acquisition chip 1 is connected to the first GPIO chip 3, the second GPIO chip 4 and the third GPIO chip 5 respectively through an I2C bus 8; each of the GPIO chips is connected to the battery cell selection switch matrix 9 respectively;

[0060] Each of the GPIO chips includes pins IO0_0 to IO0_7, and pins IO1_0 to IO1_7; wherein all the pins of the first GPIO chip 3, the second GPIO chip 4 and the pins IO0_0 to IO0_7 of the third GPIO chip 5 are respectively connected to switch S0, switch S1..., switch S(2N-1) in a one-to-one correspondence.

[0061] Specifically, the cell gating switch matrix 9 further includes a circuit switch S37 and a circuit switch S36;

[0062] Each of the selection switches connected to the positive electrode of the battery cell is connected to the counter-attack driving module through the circuit switch S37; each of the selection switches connected to the negative electrode of the battery cell is connected to the counter-attack driving module through the circuit switch S36.

[0063] Specifically, if Figure 3 As shown, the counter-attack driving module includes a first counter-attack driving circuit and a second counter-attack driving circuit; the first counter-attack driving circuit includes a first counter-attack driving chip 6, a first MOS tube and a first transformer; the second counter-attack driving circuit includes a second counter-attack driving chip 7, a second MOS tube and a second transformer; each of the counter-attack driving chips includes an interface Isense, an interface Driver, an interface CTRL, an interface VCC, an interface Product, and an interface GND;

[0064] In the first counter-drive circuit, one end of the interface Isense is connected to the source of the first MOS tube, the other end of the interface Isense is connected to the negative electrode of the lithium battery pack through the resistor R1 and the interface GND, and the interface Driver is connected to the gate of the first MOS tube; the interface CTRL is connected to the receiving end of the first light-emitting diode LED1; the interface VCC is connected to the collector of the first transistor through the resistor R3; the emitter of the first transistor is connected to the positive electrode of the lithium battery pack; the interface Product is divided into two paths after being connected to the resistor R2, one path is connected to the positive electrode of the lithium battery pack, and the other path is connected to the primary coil of the first transformer; the secondary coil of the first transformer is connected to the circuit switch S37 and the circuit switch S36 respectively, and the first light-emitting diode LED1 is connected in parallel to the two ends of the secondary coil of the first transformer; the capacitor C1 is connected in parallel to the two ends of the first light-emitting diode LED1, and the capacitor C1 is connected to the secondary coil of the first transformer through the diode D1; the drain of the first MOS tube is connected to the primary coil of the first transformer.

[0065] Specifically, in the second counter-drive circuit, one end of the interface Isense is connected to the source of the second MOS tube, the other end of the interface Isense is connected to the negative electrode of the lithium battery pack through the resistor R4 and the interface GND, and the interface Driver is connected to the gate of the second MOS tube; the interface CTRL is connected to the receiving end of the second light-emitting diode LED2; the interface VCC is connected to the positive electrode of the lithium battery pack through the resistor R6; the interface Product is connected to the positive electrode of the lithium battery pack through the resistor R5; the primary coil of the second transformer is connected to the positive electrode of the lithium battery pack; the second light-emitting diode LED2 is connected in parallel at both ends of the secondary coil of the second transformer; the capacitor C3 is connected in parallel at both ends of the second light-emitting diode LED2, and the capacitor C3 is connected to the secondary coil of the first transformer through the diode D2; the drain of the second MOS tube is connected to the primary coil of the second transformer.

[0066] The first counter-attack driving circuit first selects the battery cells that need to be balanced through the battery cell selection switch matrix 9 according to the active balancing signal, and then boosts the voltage of the battery cells that need to be balanced;

[0067] Specifically, after the GPIO expansion module and the counter-attack drive module receive the active balancing signal, the circuit switch S37 and the circuit switch S36 are closed, and the lithium battery pack selects the battery cells that need to be balanced through the battery cell selection switch matrix 9, and connects the battery cells that need to be balanced with the first counter-attack drive circuit and the second counter-attack drive circuit; the second counter-attack drive circuit supplies power, and the first counter-attack drive circuit starts the counter-attack drive and performs unidirectional charging on the battery cells that need to be balanced, and the balancing current during charging can reach more than 3A;

[0068] Compared with the current of about 100 mA obtained by passive balancing in the prior art, the balancing current obtained by the active balancing circuit structure in this embodiment is larger and sufficient to maintain the consistency of the battery cells; moreover, this embodiment can also ensure high efficiency and large current balancing at the same time.

[0069] Specifically, it also includes an LDO low-voltage dropout linear regulator 10, the input end of the LDO low-voltage dropout linear regulator 10 is connected to the second counter-drive circuit, and the output end of the LDO low-voltage dropout linear regulator 10 is respectively connected to the gate 2 and the GPIO expansion module; the second counter-drive circuit is used to provide input voltage for the LDO low-voltage dropout linear regulator 10 and each of the gate switches; the LDO low-voltage dropout linear regulator 10 is used to convert the input voltage into the operating voltage of the gate 2 and the GPIO expansion module; so that this embodiment can achieve self-power supply and reduce production costs;

[0070] In this embodiment, the input voltage is 12V, and the operating voltage of the gate 2 and the GPIO expansion module is 5V.

[0071] Specifically, if Figure 4 As shown, each of the selection switches includes an electromagnetic induction switch 91, an electromagnetic induction coil 92 and a second transistor 93; one end of the electromagnetic induction switch 91 is connected to the positive electrode or the negative electrode of the lithium battery pack, and the other end is connected to the circuit switch S37 or the circuit switch S36; one end of the electromagnetic induction coil 92 is connected to the input voltage, and the other end is connected to the emitter of the second transistor 93;

[0072] When a cell starts to boost voltage, the selection switch corresponding to the cell needs to be closed, and a high level is input to the base of the second transistor 93 first, and the electromagnetic induction coil 92 starts to be energized to generate magnetic force, and the electromagnetic induction switch 91 is closed under the action of the magnetic force until the cell completes the boost voltage, and then the electromagnetic induction switch 91 is opened;

[0073] The collector of the second transistor 93 is grounded, and the base of the second transistor 93 is connected to the circuit switch S37 or the circuit switch S36.

[0074] Specifically, the selector 2 includes pins Y_0 to Y_15, pins S0 to S3, pin E and pin Z; wherein the pins S0 to S3 and pin E of the selector 2 are connected to the pins IO1_0 to IO1_7 of the third GPIO chip 5 in sequence in a one-to-one correspondence.

[0075] Specifically, each of the GPIO chips has a pin SCL and a pin SDA;

[0076] The battery cell acquisition chip 1 includes pins GPIO_0 to GPIO_7; wherein the pin GPIO_0 is connected to the pin Z of the gate 2; the pins GPIO_1 to GPIO_2 of the battery cell acquisition chip 1 and the pins Y_0 to Y_15 of the gate 2 constitute a plurality of acquisition channels; the pin GPIO_3 is connected to the base of the first transistor; the pin GPIO_4 is respectively connected to the pins SCL of each of the GPIO chips through the I2C bus 8; the pin GPIO_5 is respectively connected to the pins SDA of each of the GPIO chips through the I2C bus 8.

[0077] In this embodiment, Figure 2As shown, N is 18, and the lithium battery pack includes 18 cells; the cell selection switch matrix 9 includes switch S0, switch S1, switch S2, ..., switch S35; the cell acquisition chip 1 and the gate 2 have a total of 18 acquisition channels, and each acquisition channel corresponds to a cell;

[0078] The working principle of the active balancing circuit structure suitable for the cascade utilization of lithium batteries described in this embodiment is as follows:

[0079] Presetting a threshold voltage of each of the battery cells;

[0080] When the voltage of a certain battery cell decreases, the battery cell acquisition chip 1 first acquires the voltage data of the battery cell through the acquisition channel corresponding to the battery cell, and then sends the voltage data of the battery cell to the upper-level main control board through the daisy chain communication architecture. The upper-level main control board feeds back the corresponding balancing instruction to the battery cell acquisition chip 1 according to the voltage data of the battery cell; the battery cell acquisition chip 1 sends an active balancing signal to the GPIO expansion module and the counter-attack drive module according to the received balancing instruction;

[0081] After receiving the active balancing signal, the GPIO expansion module and the counter-attack drive module close the circuit switch S37 and the circuit switch S36. At the same time, the lithium battery pack closes the enable switch corresponding to the battery cell through the battery cell enable switch matrix 9, and connects the battery cell to the first counter-attack drive circuit and the second counter-attack drive circuit; the second counter-attack drive circuit starts to supply power, and the first counter-attack drive circuit starts the counter-attack drive and charges the battery cell in one direction; when the battery cell voltage is boosted to reach the threshold voltage, the enable switch corresponding to the battery cell is disconnected, and the battery cell stops boosting; thereby, the active balancing circuit structure described in this embodiment completes the voltage boost of the battery cell through active balancing.

[0082] According to the disclosure and teaching of the above description, the technical personnel in the field to which the utility model belongs can also change and modify the above implementation. Therefore, the utility model is not limited to the specific implementation methods disclosed and described above, and some modifications and changes to the utility model should also fall within the scope of protection of the claims of the utility model. In addition, although some specific terms are used in this specification, these terms are only for the convenience of description and do not constitute any limitation to the utility model.

Claims

1. An active balancing circuit structure suitable for cascade utilization of lithium batteries, characterized in that: Including lithium battery pack, battery cell acquisition chip, gate, GPIO expansion module, battery cell gate switch matrix and counter-drive module; The lithium battery pack includes a plurality of battery cells connected in series, each of which has a positive electrode and a negative electrode; the battery cell selection switch matrix includes a plurality of selection switches, and the positive and negative electrodes of each battery cell are respectively connected to a selection switch; The battery cell collection chip is connected to the gate; the battery cell collection chip has a plurality of collection channels, and the gate is used to expand more collection channels for the battery cell collection chip; The cell collection chip and each collection channel on the gate are respectively connected to the sensors on each cell in a one-to-one correspondence; the collection channel is used to collect the voltage or temperature of the cell; The battery cell acquisition chip is connected to the GPIO expansion module via an I2C bus; the GPIO expansion module is connected to the battery cell gating switch matrix; The battery cell collection chip is connected to the counter-attack driving module; the counter-attack driving module is connected to the lithium battery pack through the battery cell selection switch matrix.

2. The active equalization circuit structure suitable for the second-life lithium battery according to claim 1, characterized in that: The lithium battery pack comprises a first battery cell, a second battery cell, ..., an Nth battery cell connected in series in sequence, wherein N is a positive integer greater than 1; The cell selection switch matrix includes switch S0, switch S1, switch S2, ..., switch S(2N-1); wherein the switch S0 is connected to the negative electrode of the first cell, the switch S2 is connected to the positive electrode of the first cell, ..., and so on, the switch S(2N-3) is connected to the negative electrode of the Nth cell, and the switch S(2N-1) is connected to the positive electrode of the Nth cell.

3. The active equalization circuit structure suitable for the cascade utilization of lithium batteries according to claim 2, characterized in that: The GPIO expansion module includes a first GPIO chip, a second GPIO chip and a third GPIO chip; the battery cell acquisition chip is respectively connected to the first GPIO chip, the second GPIO chip and the third GPIO chip through an I2C bus; each of the GPIO chips is respectively connected to the battery cell selection switch matrix; Each of the GPIO chips includes pins IO0_0 to IO0_7, and pins IO1_0 to IO1_7; wherein all the pins of the first GPIO chip, the second GPIO chip and the pins IO0_0 to IO0_7 of the third GPIO chip are respectively connected to switch S0, switch S1..., switch S(2N-1) in a one-to-one correspondence.

4. The active equalization circuit structure suitable for the second-life lithium battery according to claim 3, characterized in that: The cell gating switch matrix further includes a circuit switch S37 and a circuit switch S36; Each of the selection switches connected to the positive electrode of the battery cell is connected to the counter-attack driving module through the circuit switch S37; each of the selection switches connected to the negative electrode of the battery cell is connected to the counter-attack driving module through the circuit switch S36.

5. The active equalization circuit structure suitable for the cascade utilization of lithium batteries according to claim 4, characterized in that: The counter-attack driving module includes a first counter-attack driving circuit and a second counter-attack driving circuit; the first counter-attack driving circuit includes a first counter-attack driving chip, a first MOS tube and a first transformer; the second counter-attack driving circuit includes a second counter-attack driving chip, a second MOS tube and a second transformer; each of the counter-attack driving chips includes an interface Isense, an interface Driver, an interface CTRL, an interface VCC, an interface Product, and an interface GND; In the first counter-drive circuit, one end of the interface Isense is connected to the source of the first MOS tube, the other end of the interface Isense is connected to the negative electrode of the lithium battery pack through the resistor R1 and the interface GND, and the interface Driver is connected to the gate of the first MOS tube; the interface CTRL is connected to the receiving end of the first light-emitting diode LED1; the interface VCC is connected to the collector of the first transistor through the resistor R3; the emitter of the first transistor is connected to the positive electrode of the lithium battery pack; the interface Product is divided into two paths after being connected to the resistor R2, one path is connected to the positive electrode of the lithium battery pack, and the other path is connected to the primary coil of the first transformer; the secondary coil of the first transformer is connected to the circuit switch S37 and the circuit switch S36 respectively, and the first light-emitting diode LED1 is connected in parallel to the two ends of the secondary coil of the first transformer; the capacitor C1 is connected in parallel to the two ends of the first light-emitting diode LED1, and the capacitor C1 is connected to the secondary coil of the first transformer through the diode D1; the drain of the first MOS tube is connected to the primary coil of the first transformer.

6. The active equalization circuit structure suitable for the second-life lithium battery according to claim 5, characterized in that: In the second counter-drive circuit, one end of the interface Isense is connected to the source of the second MOS tube, the other end of the interface Isense is connected to the negative electrode of the lithium battery pack through the resistor R4 and the interface GND, and the interface Driver is connected to the gate of the second MOS tube; the interface CTRL is connected to the receiving end of the second light-emitting diode LED2; the interface VCC is connected to the positive electrode of the lithium battery pack through the resistor R6; the interface Product is connected to the positive electrode of the lithium battery pack through the resistor R5; the primary coil of the second transformer is connected to the positive electrode of the lithium battery pack; the second light-emitting diode LED2 is connected in parallel at both ends of the secondary coil of the second transformer; the capacitor C3 is connected in parallel at both ends of the second light-emitting diode LED2, and the capacitor C3 is connected to the secondary coil of the first transformer through the diode D2; the drain of the second MOS tube is connected to the primary coil of the second transformer.

7. The active equalization circuit structure suitable for the second-life lithium battery according to claim 6, characterized in that: It also includes an LDO low-voltage dropout linear regulator, the input end of the LDO low-voltage dropout linear regulator is connected to the second counter-drive circuit, and the output end of the LDO low-voltage dropout linear regulator is respectively connected to the gate and the GPIO expansion module; the second counter-drive circuit is used to provide input voltage for the LDO low-voltage dropout linear regulator and each of the gate switches; the LDO low-voltage dropout linear regulator is used to convert the input voltage into the operating voltage of the gate and the GPIO expansion module.

8. The active equalization circuit structure suitable for cascade utilization of lithium batteries according to claim 6, characterized in that: Each of the selection switches includes an electromagnetic induction switch, an electromagnetic induction coil and a second transistor; one end of the electromagnetic induction switch is connected to the positive electrode or the negative electrode of the lithium battery pack, and the other end is connected to the circuit switch S37 or the circuit switch S36; one end of the electromagnetic induction coil is connected to the input voltage, and the other end is connected to the emitter of the second transistor; the collector of the second transistor is grounded, and the base of the second transistor is connected to the circuit switch S37 or the circuit switch S36.

9. The active equalization circuit structure suitable for cascade utilization of lithium batteries according to claim 5, characterized in that: The selector includes pins Y_0 to Y_15, pins S0 to S3, pin E and pin Z; wherein the pins S0 to S3 and pin E of the selector are sequentially connected with the pins IO1_0 to IO1_7 of the third GPIO chip in a one-to-one correspondence.

10. The active equalization circuit structure suitable for cascade utilization of lithium batteries according to claim 9, characterized in that: Each of the GPIO chips has a pin SCL and a pin SDA; The battery cell acquisition chip includes pins GPIO_0 to GPIO_7; wherein the pin GPIO_0 is connected to the pin Z of the selector; the pins GPIO_1 to GPIO_2 of the battery cell acquisition chip and the pins Y_0 to Y_15 of the selector form a plurality of acquisition channels; the pin GPIO_3 is connected to the base of the first transistor; the pin GPIO_4 is respectively connected to the pin SCL of each GPIO chip through the I2C bus; the pin GPIO_5 is respectively connected to the pin SDA of each GPIO chip through the I2C bus.

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