Pulse acquisition circuit and vehicle
By setting a level pull-up module at the input end of the vehicle speed pulse signal acquisition circuit, the high-level signal detection problem when the vehicle speed sensor output is OC or OD gate circuit is solved, and flexible processing and efficient acquisition of different types of pulse signals are realized.
Patent Information
- Application Number
- CN202421522168.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-28
- Publication Date
- 2025-04-11
- Estimated Expiration
- 2034-06-28
AI Technical Summary
The existing vehicle speed pulse signal acquisition circuit cannot directly detect the high-level signal when the vehicle speed sensor outputs as an OC or OD gate circuit, resulting in the controller being unable to detect the pulse signal.
A pulse acquisition circuit is designed, by setting a level pull-up module at the input end, connecting or disconnecting the input end according to the level state of the control signal, thereby increasing the voltage value of the high-level state of the pulse signal.
It realizes the flexibility of different types of pulse signals without additional disassembly and line modification, and improves the adaptability and processing efficiency of the pulse acquisition circuit.
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Figure CN222750409U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of pulse acquisition technology, and in particular to a pulse acquisition circuit and a vehicle. Background Art
[0002] During the driving process of the vehicle, the vehicle detects the driving speed through the speed sensor and sends it out in the form of a pulse signal. The equipment or device connected to the speed sensor collects this pulse signal and generates data (frequency, duty cycle, amplitude, etc.) to calculate the current speed of the vehicle for speed reminder and speeding alarm functions.
[0003] The vehicle speed pulse signal acquisition circuit in the prior art is usually built using the following logic devices, such as Figure 1 As shown, the pulse signal input from the front stage is converted into a PWM signal (Pulse Width Modulation) of uniform amplitude through a transistor acquisition unit, and then the signal is shaped by a Schmitt trigger and sent to the controller to calculate the vehicle speed. The defect is that if the output end of the vehicle speed sensor is an OC (Open Collector) or OD (Open Drain) gate circuit output, the vehicle speed sensor cannot directly output a high level, resulting in the controller being unable to detect the pulse signal and unable to complete the vehicle speed detection. Utility Model Content
[0004] The present application aims to solve one of the technical problems in the above-mentioned prior art to a certain extent. To this end, the present application provides a pulse acquisition circuit and a vehicle thereof.
[0005] In order to achieve the above-mentioned purpose, the present application adopts the following technical solution: a pulse acquisition circuit, comprising an input end and an output end, wherein the input end is used to receive a first pulse signal, and the output end is used to output a second pulse signal, a pulse acquisition module is arranged between the input end and the output end, and the pulse acquisition circuit further comprises a control end for receiving a control signal, and a level pull-up module electrically connected between the control end and the input end,
[0006] The level pull-up module is used to connect or disconnect with the input end according to the level state of the control signal input by the control end. The level pull-up module is also used to increase the voltage value of the high level state of the first pulse signal when the level pull-up module is connected to the input end.
[0007] The pulse acquisition circuit of the present application increases the high level value of the first pulse signal input at the input end by setting a level pull-up module, and a controller connected to the control end controls whether the level pull-up module is connected to the input end, that is, the controller controls whether to pull up the voltage in the high level state of the first pulse signal input at the input end. Without the need for additional disassembly and line modification operations, the pulse acquisition circuit can flexibly process different types of pulse signals, thereby improving the adaptability of the pulse acquisition circuit and the work efficiency when processing different types of pulse signals.
[0008] Optionally, the level pull-up module includes a control signal shaping submodule and a switch submodule, wherein the control signal shaping submodule is used to adjust the voltage values corresponding to the high level and low level states of the control signal to output a shaped control signal; the switch submodule is used to connect or disconnect the input end according to the level state of the shaped control signal, the first end of the control signal shaping submodule is electrically connected to the control end, and the second end is electrically connected to the control end of the switch submodule, the first end of the switch submodule is electrically connected to the power supply, and the second end is electrically connected to the input end.
[0009] Optionally, the switch submodule includes a first switch tube, a second switch tube and a first pull-up resistor, the control electrode of the first switch tube is electrically connected to the second end of the control signal shaping submodule, the first electrode is connected to the power supply through a first voltage-dividing resistor and a second voltage-dividing resistor connected in series, the second electrode is connected to a reference ground, the control electrode of the second switch tube is electrically connected between the first voltage-dividing resistor and the second voltage-dividing resistor, the first electrode of the second switch tube is connected to the power supply, the second electrode is connected to one end of the first pull-up resistor, and the other end of the first pull-up resistor is connected to the input end;
[0010] When the first and second electrodes of the first switch tube are turned on under the control of the control electrode input signal, the first and second electrodes of the second switch tube are turned on, so that the voltage value of the high level state of the first pulse signal input to the input terminal BIN increases.
[0011] Optionally, the control signal shaping submodule includes a third pull-up resistor electrically connected to the first end, a first pull-down resistor electrically connected to the second end, and a first current limiting resistor connected between the first end and the second end, the other end of the third pull-up resistor is connected to a power supply, and the other end of the first pull-down resistor is connected to a reference ground.
[0012] Optionally, the first switch tube is set as an NPN type triode, the control electrode of the first switch tube is set as the base, the first electrode is set as the collector, and the second electrode is set as the emitter;
[0013] The second switch tube is set as an enhancement type PMOS tube, the control electrode of the second switch tube is set as a gate, the first electrode is set as a source, and the second electrode is set as a drain.
[0014] Optionally, the pulse acquisition module includes a DC blocking capacitor unit, a voltage stabilizing and dividing unit, a threshold voltage output unit and a transistor acquisition unit which are electrically connected in sequence.
[0015] Optionally, the DC blocking capacitor unit includes a DC blocking capacitor, a second current limiting resistor and a second pull-down resistor, one end of the second current limiting resistor is connected to the input end, and the other end is connected to the DC blocking capacitor, one end of the second pull-down resistor is connected between the second current limiting resistor and the DC blocking capacitor, and the other end is connected to a reference ground, one end of the DC blocking capacitor is connected to the second current limiting resistor, and the other end is connected to a voltage stabilizing divider unit, and the second pull-down resistor is used to reduce the voltage value of the low level state of the input end pulse signal.
[0016] Optionally, the voltage-stabilizing voltage-divider unit includes a voltage-stabilizing diode, a Schottky diode and a voltage-divider resistor branch connected in parallel between a DC-isolating capacitor unit and a reference ground; the voltage-divider resistor branch includes a third voltage-divider resistor and a fourth voltage-divider resistor connected in series; a threshold voltage output unit is electrically connected between the third voltage-divider resistor and the fourth voltage-divider resistor; and positive electrodes of the voltage-stabilizing diode and the Schottky diode are connected to the reference ground.
[0017] Optionally, the threshold voltage output unit includes an inverting Schmitt trigger.
[0018] Optionally, the transistor acquisition unit includes a third switch tube, the control electrode of the third switch tube is connected to the output end of the threshold voltage output unit, the first electrode is connected to the power supply through the second pull-up resistor, and the second electrode is connected to the reference ground. The control electrode controls the conduction or cutoff between the first electrode and the second electrode, and the first electrode of the third switch tube is also electrically connected to the output end of the pulse acquisition circuit.
[0019] Optionally, the input end and the output end of the pulse acquisition circuit are electrically connected to a first decoupling capacitor and a second decoupling capacitor, respectively.
[0020] In addition, the present application also provides a vehicle, including a sensor and a controller, wherein a pulse acquisition circuit as described in any of the above technical solutions is arranged between the sensor and the controller, wherein the sensor acquires the vehicle speed and outputs a first pulse signal representing the vehicle speed, wherein the output end of the sensor is electrically connected to the input end of the pulse acquisition circuit, the input end of the controller is electrically connected to the output end of the pulse acquisition circuit, and the output end of the controller is electrically connected to the control end of the pulse acquisition circuit. The reasoning process of the beneficial effects of the vehicle provided by the present application and the aforementioned pulse acquisition circuit is similar, and will not be repeated here.
[0021] These features and advantages of the present application will be disclosed in detail in the following specific embodiments and drawings. The best embodiments or means of the present application will be described in detail in conjunction with the drawings, but they are not intended to limit the technical solutions of the present application. In addition, there are multiple features, elements, and components that appear in each of the following texts and drawings, and different symbols or numbers are marked for convenience, but they all represent components with the same or similar structures or functions. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] The present application is further described below in conjunction with the accompanying drawings:
[0023] Figure 1 A pulse acquisition circuit structure block diagram of the related technology;
[0024] Figure 2 It is another pulse acquisition circuit structure block diagram of the related technology;
[0025] Figure 3 This is a block diagram of the pulse acquisition circuit structure of this embodiment;
[0026] Figure 4 This is a circuit structure block diagram of the level pull-up module of this embodiment;
[0027] Figure 5 Schematic diagram of the pulse acquisition circuit of this embodiment.
[0028] Among them, 100, a level pull-up module; 110, a signal shaping submodule; 120, a switch submodule; 200, a pulse acquisition module; 210, a DC isolation capacitor unit; 220, a voltage stabilizing and dividing unit; 230, a threshold voltage output unit; 240, a transistor acquisition unit. DETAILED DESCRIPTION
[0029] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments based on the embodiments are intended to be used to explain the present application and cannot be understood as limiting the present application.
[0030] References to "one embodiment" or "an example" or "an example" in this specification mean that a particular feature, structure, or characteristic described in conjunction with the embodiment itself may be included in at least one embodiment disclosed in the present application. The appearance of the phrase "in one embodiment" in various places in the specification does not necessarily refer to the same embodiment.
[0031] In order to solve the problem that "the controller cannot detect the pulse signal", the inventor proposed a circuit optimization solution, such as Figure 2As shown, a pull-up resistor and a DC-blocking capacitor are added between the pulse signal input terminal and the transistor acquisition unit. The problem that the pulse output is an OC or OD gate circuit that cannot directly output a high level is solved by adding a pull-up resistor, and the problem that the voltage value of the pulse signal in the low level state is too high is solved by adding a DC-blocking capacitor. Figure 2 The pulse acquisition circuit shown in the figure still has the following two defects. First, when the pulse signal output end is a non-OC or OD gate circuit, the current generated by the power supply connected to the pull-up resistor may flow into the speed sensor circuit, affecting the normal operation of the speed sensor; second, the current in the RC filter circuit formed by the DC blocking capacitor and the resistor in the acquisition circuit may also affect the normal operation of the speed sensor, resulting in an abnormal pulse signal waveform output by the speed sensor.
[0032] In view of this, if Figure 3 As shown, an embodiment of the present invention provides a pulse acquisition circuit for acquiring pulse signals and outputting them to a controller, including an input terminal BIN and an output terminal BOUT, wherein the input terminal BIN is used to receive a first pulse signal sent by a speed sensor of a vehicle, and the output terminal NOUT is used to output a second pulse signal to the controller. A pulse acquisition module 200 is arranged between the input terminal BIN and the output terminal BOUT, and further includes a control terminal EN for receiving a control signal output by the controller, a level pull-up module 100 is arranged between the control terminal EN and the input terminal BIN, and the level pull-up module 100 is connected or disconnected with the input terminal BIN according to the level state of the control signal input by the control terminal EN. When the level pull-up module 100 is connected to the input terminal BIN, the voltage value of the high level state of the first pulse signal input by the input terminal BIN is increased.
[0033] It should be noted that the connection between the input terminal BIN of the pulse acquisition circuit of this embodiment and the speed sensor of the vehicle is only an example. The input terminal BIN of the pulse acquisition circuit can be used to connect any pulse signal sending device or generating device that can output a pulse signal and receive the pulse signal; similarly, the output terminal BOUT of the pulse acquisition circuit is used to send a second pulse signal after the first pulse signal is collected and processed to an external device, and the external device includes but is not limited to a controller.
[0034] The pulse acquisition circuit of the present application increases the high level value of the pulse signal at the input end by setting a level pull-up module 100, and a controller connected to the control end controls whether the level pull-up module 100 is connected to the input end, that is, the controller controls whether to pull up the voltage of the high level state of the pulse signal at the input end. Without the need for additional disassembly and line modification operations, the pulse acquisition circuit can flexibly process different types of pulse signals, that is, the pulse acquisition circuit can be suitable for different sensor types (the voltage values corresponding to the output level states of the sensors are different), thereby improving the compatibility of the pulse acquisition circuit and the work efficiency when processing different types of pulse signals.
[0035] like Figure 4 As shown, the level pull-up module 100 includes a control signal shaping submodule 110 and a switch submodule 120. The first end of the control signal shaping submodule 110 is electrically connected to the control end EN, and the second end is electrically connected to the control end of the switch submodule 120. The first end of the switch submodule 120 is electrically connected to the power supply VCC, and the second end is electrically connected to the input end BIN. The control signal shaping submodule 110 is used to shape and filter the control signal input to the control end EN, adjust the voltage value of the high and low level states of the control signal input to the control end EN, so that the control signal controls the switch submodule 120 more accurately. The switch submodule 120 connects or disconnects the input end BIN according to the level state of the control signal input to the control end EN. For example, when the control signal is in a high level state, the first end of the switch submodule 120 is connected to the second end, and the level pull-up module 100 starts to work. When the control signal is in a low level state, the first end of the switch submodule 120 is connected to the second end, and the level pull-up module 100 does not work.
[0036] like Figure 5 As shown, the switch submodule 120 includes a first switch tube Q1, a second switch tube Q2 and a first pull-up resistor R5, the control electrode of the first switch tube Q1 is electrically connected to the second end of the control signal shaping submodule 110, the first electrode is connected to the power supply VCC through the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 connected in series, and the second electrode is connected to the reference ground, the control electrode of the second switch tube Q2 is electrically connected between the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2, the first electrode of the second switch tube Q2 is connected to the power supply VCC, the second electrode is connected to one end of the first pull-up resistor R5, and the other end of the first pull-up resistor R5 is connected to the input end; when the first electrode and the second electrode of the first switch tube Q1 are turned on under the control of the control electrode input signal, the first electrode and the second electrode of the second switch tube Q2 are turned on, so that the voltage value of the high level state of the first pulse signal input to the input end BIN increases.
[0037] Specifically, the first switch tube Q1 is set as an NPN type transistor, the control electrode of the first switch tube Q1 is set as the base, the first electrode is set as the collector, and the second electrode is set as the emitter; the second switch tube Q2 is set as an enhancement type PMOS tube, the control electrode of the second switch tube Q2 is set as the gate, the first electrode is set as the source, and the second electrode is set as the drain. When the control signal at the control terminal EN is at a low level, the first switch tube Q1 works in a cut-off state, the collector and emitter of the first switch tube Q1 are disconnected, that is, the branch composed of the power supply VCC, the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 is disconnected, the voltage applied to the gate of the second switch tube Q2 is equal to the voltage value of the power supply VCC, the second switch tube Q2 is not turned on, and the level pull-up module 100 is disconnected from the pulse signal input terminal BIN; when the control signal at the control terminal EN is at a high level, the first switch tube Q1 works in a conducting state, the collector and emitter of the first switch tube Q1 are turned on, the branch composed of the power supply VCC, the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 is turned on, the gate voltage of the second switch tube Q2 is pulled down to the voltage across the resistor R2, the source and drain of the second switch tube Q2 are turned on, the power supply VCC and the resistor R5 form a pull-up resistor circuit, so that the voltage value of the high level state of the first pulse signal input at the input terminal BIN increases. In other embodiments, the second switch tube Q2 can be set to other types of field effect tubes or switch tubes. For example, the second switch tube Q2 can be set to an enhanced NMOS tube, then the drain of the second switch tube Q2 is connected to the power supply VCC, the source is connected to the first pull-up resistor R5, the gate voltage is in a low level state when the first switch tube Q1 is in the cut-off state, and is in a high level state when the first switch tube Q1 is in the on state (the collector of the first switch tube Q1 is connected to the power supply VCC, the emitter is connected to the gate of the second switch tube Q2, and a corresponding resistor is configured), so that when the first switch tube Q1 is turned on, the drain and source of the second switch tube Q2 are also connected, the power supply VCC and the first pull-up resistor R5 are connected and form a pull-up resistor circuit, so that the voltage value of the high level state of the pulse signal input by the input terminal BIN increases.
[0038] like Figure 5As shown, the level pull-up module 100 also includes a third pull-up resistor R3 electrically connected to the control terminal EN and used to increase the voltage value of the high level state of the control signal, a first pull-down resistor R6 for reducing the voltage value of the low level state of the control signal, and a first current limiting resistor R4 connected between the control terminal EN and the base of the first switch tube Q1, the other end of the third pull-up resistor R3 is connected to the power supply VCC, the other end of the first pull-down resistor R6 is connected to the reference ground, and the first pull-down resistor R6 is also connected in parallel with a capacitor C2 at both ends, and the first voltage-dividing resistor R1 is connected in parallel with a capacitor C1 at both ends. Through the above circuit setting, the voltage value of the high and low level states of the control signal input by the control terminal EN can be made more stable, and the control of the control signal to the first switch tube Q1 and the second switch tube Q2 can be made more accurate, so as to prevent interference current from affecting the normal operation of the circuit. An anti-reverse diode D1 is also set between the first pull-up resistor R5 and the pulse signal input terminal BIN to prevent the pulse signal input level pull-up module 100 from damaging the circuit.
[0039] like Figure 3 As shown, the pulse acquisition module 200 includes a DC blocking capacitor unit 210, a voltage stabilizing and dividing unit 220, a threshold voltage output unit 230 and a transistor acquisition unit 240 which are electrically connected in sequence. The DC blocking capacitor unit 210 is provided to solve the problem that the pulse acquisition circuit cannot acquire the pulse signal due to the excessively high voltage value of the low-level state of the pulse signal of the input terminal BIN; the pulse signal of the input terminal BIN is shaped by the voltage stabilizing and dividing unit 220, the threshold voltage output unit 230 and the transistor acquisition unit 240, and the first pulse signal of the periodically changing waveform is shaped into the second pulse signal of the required rectangular pulse signal.
[0040] Specifically, Figure 5 As shown, the DC blocking capacitor unit 210 includes a DC blocking capacitor C3, a second current limiting resistor R10 and a second pull-down resistor R13, one end of the second current limiting resistor R10 is connected to the input end, and the other end is connected to the DC blocking capacitor C3, one end of the second pull-down resistor R13 is connected between the second current limiting resistor R10 and the DC blocking capacitor C3, and the other end is connected to the reference ground, one end of the DC blocking capacitor C3 is connected to the second current limiting resistor R10, and the other end is connected to the voltage stabilizing voltage divider unit 220, and the second pull-down resistor R13 is used to reduce the voltage value of the low level state of the input end pulse signal. The DC blocking capacitor C3 is used to isolate the DC current in the pulse sampling circuit to prevent the DC current in the pulse sampling circuit from flowing back into the front-stage circuit of the input end. At the same time, the second pull-down resistor R13 in the DC blocking capacitor unit 210 can reduce the voltage value of the low level state of the pulse signal, which solves the problem that the pulse acquisition circuit cannot collect the pulse signal due to the excessively high voltage value of the low level state of the pulse signal.
[0041] like Figure 4The voltage-stabilizing voltage-dividing unit 220 includes a voltage-stabilizing diode D2, a Schottky diode D3 and a voltage-dividing resistor branch connected in parallel between the DC-isolating capacitor unit 210 and the reference ground. The voltage-dividing resistor branch includes a third voltage-dividing resistor R11 and a fourth voltage-dividing resistor R14 connected in series. The threshold voltage output unit 230 is electrically connected between the third voltage-dividing resistor R11 and the fourth voltage-dividing resistor R14. The positive electrodes of the voltage-stabilizing diode D2 and the Schottky diode D3 are connected to the reference ground. The voltage-stabilizing diode D2 is used to stabilize the voltage value across the third voltage-dividing resistor R11 and the fourth voltage-dividing resistor R14 within a certain range. The Schottky diode D3 is used for rectification, freewheeling and protection circuits. In this embodiment, the threshold voltage output unit 230 is set as a Schmitt trigger, specifically a reverse Schmitt trigger. The Schmitt trigger is used to shape the pulse signal, and shapes the input analog signal waveform into a square wave waveform that can be processed by the digital circuit. The reverse Schmitt trigger shapes the input analog signal waveform and makes the level state of the square wave signal output by it opposite to the input signal. After the transistor acquisition unit 240 reverses the level state of the square wave signal output by the reverse Schmitt trigger again, the level state of the square wave signal output by the output terminal BOUT is consistent with the level state of the pulse signal input by the input terminal BIN.
[0042] The transistor collection unit 240 includes a third switch tube Q3, which is set as an NPN type transistor, whose control electrode is set as the base, the first electrode is set as the collector, and the second electrode is set as the emitter. The base of the third switch tube Q3 is connected to the output end of the threshold voltage output unit 230, the collector is connected to the power supply VCC through the second pull-up resistor R9, and the emitter is connected to the reference ground. The collector of the third switch tube Q3 is also electrically connected to the output end BOUT of the pulse collection circuit. When the output end of the threshold voltage output unit 230 outputs a high-level signal, the third switch tube Q3 is turned on, and the output end BOUT of the pulse collection circuit is connected to the reference ground after passing through the collector and emitter of the second switch tube, and a low-level signal is output; conversely, when the output end of the threshold voltage output unit 230 outputs a low-level signal, the third switch tube Q3 is turned off, and the output end BOUT of the pulse collection circuit is connected to the power supply VCC through the second pull-up resistor R9, and a high-level signal is output.
[0043] Specifically, the transistor acquisition unit 240 also includes a fourth pull-up resistor R8 electrically connected to the output end of the reverse Schmitt trigger and used to increase the voltage value of the high level state of its output signal, a third pull-down resistor R15 used to reduce the voltage value of the low level state of the reverse Schmitt trigger output signal, and a first current limiting resistor R12 connected between the output end of the reverse Schmitt trigger and the base of the third switch tube Q3.
[0044] The input terminal BIN and the output terminal BOUT of the pulse acquisition circuit are also electrically connected to a first decoupling capacitor C4 and a second decoupling capacitor C6, respectively. The first decoupling capacitor C4 and the second decoupling capacitor C6 are used to provide a path for high-frequency noise in the circuit or the first pulse signal, thereby effectively reducing the impact of power supply fluctuations and electromagnetic interference on the circuit.
[0045] In addition, this embodiment further provides a vehicle, including a sensor and a controller, wherein any pulse acquisition circuit as described in the above embodiments is arranged between the sensor and the controller, wherein the sensor acquires the vehicle speed and outputs a first pulse signal representing the vehicle speed, wherein the output end of the sensor is electrically connected to the input end BIN of the pulse acquisition circuit, the input end of the controller is electrically connected to the output end BOUT of the pulse acquisition circuit, and the output end of the controller is electrically connected to the control end EN of the pulse acquisition circuit. In this embodiment, the controller can determine whether it is necessary to increase the voltage value corresponding to the high level state of the first pulse signal output by the sensor by detecting the voltage values corresponding to the high and low level states of the first pulse signal, and output a high level signal when it is necessary to increase the voltage value corresponding to the high level state of the first pulse signal.
[0046] In summary, this embodiment can choose whether to increase the voltage value of the high level state of the pulse signal at the input end by setting the level pull-up module 100 controlled by the control end, thereby improving the compatibility and versatility of the pulse acquisition circuit; by setting the DC isolation capacitor unit 210 to reduce the voltage value of the low level state of the pulse signal, the problem that the pulse acquisition circuit cannot collect the pulse signal due to the excessively high voltage value of the low level state of the pulse signal is solved; by the voltage stabilizing voltage divider unit 220, the threshold voltage output unit 230 and the transistor acquisition unit 240, the analog signal inputted by the input end BIN is shaped and a rectangular pulse signal that can be processed by the digital circuit is output, which is convenient for the post-processor or controller to process data. At the same time, the pulse acquisition circuit of this embodiment also has the advantages of high impedance input, no impact on the external circuit, high compatibility, and convenient collection of pulse signals of various states.
[0047] The above are only specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Those skilled in the art should understand that the present application includes but is not limited to the contents described in the drawings and the above specific embodiments. Any modification that does not deviate from the functional and structural principles of the present application will be included in the scope of the claims.
Claims
1. A pulse acquisition circuit, comprising an input terminal (BIN) and an output terminal (BOUT), wherein the input terminal (BIN) is used to receive a first pulse signal, and the output terminal (BOUT) is used to output a second pulse signal, and a pulse acquisition module (200) is arranged between the input terminal (BIN) and the output terminal (BOUT), characterized in that: The pulse acquisition circuit also includes a control terminal (EN) for receiving a control signal, and a level pull-up module (100) electrically connected between the control terminal (EN) and the input terminal (BIN). The level pull-up module is used to connect or disconnect with the input terminal (BIN) according to the level state of the control signal input by the control terminal (EN); the level pull-up module (100) is also used to increase the voltage value of the high level state of the first pulse signal when the level pull-up module (100) is connected to the input terminal (BIN).
2. The pulse acquisition circuit according to claim 1, characterized in that: The level pull-up module (100) comprises a control signal shaping submodule (110) and a switch submodule (120), wherein the control signal shaping submodule (110) is used to adjust the voltage values corresponding to the high level and low level states of the control signal to output a shaped control signal; The switch submodule (120) is used to connect or disconnect the input terminal (BIN) according to the level state of the shaped control signal; the first terminal of the control signal shaping submodule (110) is electrically connected to the control terminal (EN), and the second terminal is electrically connected to the control terminal of the switch submodule (120); the first terminal of the switch submodule (120) is electrically connected to the power supply (VCC), and the second terminal is electrically connected to the input terminal (BIN).
3. The pulse acquisition circuit according to claim 2, characterized in that: The switch submodule (120) comprises a first switch tube (Q1), a second switch tube (Q2) and a first pull-up resistor (R5); the control electrode of the first switch tube (Q1) is electrically connected to the second end of the control signal shaping submodule (110); the first electrode is connected to a power supply (VCC) via a first voltage-dividing resistor (R1) and a second voltage-dividing resistor (R2) connected in series; the second electrode is connected to a reference ground; the control electrode of the second switch tube (Q2) is electrically connected between the first voltage-dividing resistor (R1) and the second voltage-dividing resistor (R2); the first electrode of the second switch tube (Q2) is connected to the power supply (VCC); the second electrode is connected to one end of the first pull-up resistor (R5); and the other end of the first pull-up resistor (R5) is connected to the input end; When the first and second electrodes of the first switch tube (Q1) are turned on under the control of the control electrode input signal, the first and second electrodes of the second switch tube (Q2) are turned on, so that the voltage value of the high level state of the first pulse signal input to the input terminal (BIN) increases.
4. The pulse acquisition circuit according to claim 3, characterized in that: The first switch tube (Q1) is set as an NPN type triode, the control electrode of the first switch tube (Q1) is set as the base electrode, the first electrode is set as the collector electrode, and the second electrode is set as the emitter electrode; The second switch tube (Q2) is set as an enhancement type PMOS tube, the control electrode of the second switch tube (Q2) is set as a gate, the first electrode is set as a source, and the second electrode is set as a drain.
5. The pulse acquisition circuit according to claim 2, characterized in that: The control signal shaping submodule (110) comprises a third pull-up resistor (R3) electrically connected to the first end, a first pull-down resistor (R6) electrically connected to the second end, and a first current limiting resistor (R4) connected between the first end and the second end, the other end of the third pull-up resistor (R3) being connected to a power supply (VCC), and the other end of the first pull-down resistor (R6) being connected to a reference ground.
6. The pulse acquisition circuit according to claim 1, characterized in that: The pulse acquisition module (200) comprises a DC isolation capacitor unit (210), a voltage stabilization and voltage division unit (220), a threshold voltage output unit (230) and a triode acquisition unit (240) which are electrically connected in sequence.
7. The pulse acquisition circuit according to claim 6, characterized in that: The DC blocking capacitor unit comprises a DC blocking capacitor (C3), a second current limiting resistor (R10) and a second pull-down resistor (R13); one end of the second current limiting resistor (R10) is connected to the input end, and the other end is connected to the DC blocking capacitor (C3); one end of the second pull-down resistor (R13) is connected between the second current limiting resistor (R10) and the DC blocking capacitor (C3), and the other end is connected to a reference ground; one end of the DC blocking capacitor (C3) is connected to the second current limiting resistor (R10), and the other end is connected to a voltage stabilizing voltage divider unit (220); the second pull-down resistor (R13) is used to reduce the voltage value of the low-level state of the input end pulse signal.
8. The pulse acquisition circuit according to claim 6, characterized in that: The voltage-stabilizing and voltage-dividing unit (220) comprises a voltage-stabilizing diode (D2), a Schottky diode (D3) and a voltage-dividing resistor branch connected in parallel between a DC-isolating capacitor unit (210) and a reference ground; the voltage-dividing resistor branch comprises a third voltage-dividing resistor (R11) and a fourth voltage-dividing resistor (R14) connected in series; a threshold voltage output unit (230) is electrically connected between the third voltage-dividing resistor (R11) and the fourth voltage-dividing resistor (R14); and positive electrodes of the voltage-stabilizing diode (D2) and the Schottky diode (D3) are connected to the reference ground.
9. The pulse acquisition circuit according to claim 6, characterized in that: The triode collection unit (240) comprises a third switch tube (Q3), a control electrode of the third switch tube (Q3) being connected to the output end of the threshold voltage output unit (230), a first electrode being connected to a power supply (VCC) via a second pull-up resistor (R9), and a second electrode being connected to a reference ground, the control electrode controlling conduction or cutoff between the first electrode and the second electrode, and a first electrode of the third switch tube (Q3) being also electrically connected to the output end (BOUT) of the pulse collection circuit.
10. The pulse acquisition circuit according to any one of claims 7 to 9, characterized in that: The input end (BIN) and the output end (BOUT) of the pulse acquisition circuit are also electrically connected to a first decoupling capacitor (C4) and a second decoupling capacitor (C6), respectively.
11. A vehicle, comprising a sensor and a controller, characterized in that: A pulse acquisition circuit as described in any one of claims 1 to 10 is arranged between the sensor and the controller, the sensor acquires the vehicle speed and outputs a first pulse signal representing the vehicle speed, the sensor output end is electrically connected to the pulse acquisition circuit input end (BIN), the controller input end is electrically connected to the pulse acquisition circuit output end (BOUT), and the controller output end is electrically connected to the pulse acquisition circuit control end (EN).