Special electrostatic protection chip for USB3. X interface
By designing an electrostatic protection chip for USB3.x interface, using a metal lead frame and a four-channel ultra-low capacitance unidirectional electrostatic protection chip, the problem of large number of components and complex wiring in the existing technology is solved, and the electrostatic protection effect of small number of components, simple wiring and low cost is achieved.
Patent Information
- Application Number
- CN202421277144.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-05
- Publication Date
- 2025-04-18
- Estimated Expiration
- 2034-06-05
AI Technical Summary
The existing USB3.x interface has a large number of electrostatic protection solutions, large area of printed circuit boards, complex wiring, and electrostatic protection devices cannot get close to the USB3.x interface at a short distance, resulting in a large number of patches and high cost.
Design a dedicated electrostatic protection chip for USB3.x interface. Through the combination of metal lead frame, silver paste solder, four-channel ultra-low capacity unidirectional electrostatic protection chip, metal conductors and epoxy resin, one chip provides electrostatic protection for multiple signal lines, simplifying wiring and reducing the number of components.
It has achieved small number of components, simple wiring, and the electrostatic protection devices can be placed close to the USB3.x interface, reducing the number of patches and costs, reducing the risk of external static radiation, and has broad market application prospects.
Smart Images

Figure CN222776525U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of semiconductors, and in particular to a special electrostatic protection chip for a USB3.x interface. Background Art
[0002] The reason why USB3.x has "overspeed" performance is due to the improvement of technology. Compared with USB 2.0 interface, USB3.x adds more parallel mode physical buses. The USB3.x interface adds 5 more lines for receiving and transmitting signals on the basis of the original 4-wire structure of power, ground and two data lines. Whether in the cable or on the interface, there are a total of 9 lines, namely Vcc, D+, D-, RX+, RX-, TX+, TX-, CC, GND. Common USB3.x interfaces use a power line Vcc and six signal lines D+, D-, RX+, RX-, TX+, TX-, and require ultra-low capacitance electrostatic protection for this power line and six signal lines.
[0003] The existing electrostatic protection solutions for USB3.x interfaces on the market mostly use a high-power electrostatic protection diode to protect the power line Vcc and six ultra-low capacitance electrostatic protection diodes to protect the six signal lines D+, D-, RX+, RX-, TX+, and TX-; or an electrostatic protection device with one high-power electrostatic protection channel and two channels of ultra-low capacitance is used to protect the power line Vcc and two signal lines such as D+ and D-, and then a four-channel ultra-low capacitance electrostatic protection device is used to protect the four signal lines RX+, RX-, TX+, and TX-. Regardless of whether the above solutions use seven single-channel electrostatic protection diodes or one dual-channel electrostatic protection device plus one four-channel electrostatic protection device, there are the following problems: a large number of components, occupying a lot of printed circuit board area, relatively complex wiring, and the electrostatic protection device cannot be placed close to the USB3.x interface at a short distance, the number of patch times is high, and the cost is high.
[0004] In order to solve the above problems, it is particularly necessary to design a new type of electrostatic protection chip dedicated to the USB3.x interface. Utility Model Content
[0005] In view of the deficiencies in the prior art, the utility model aims to provide a dedicated electrostatic protection chip for a USB3.x interface, which can provide electrostatic protection for a power line Vcc and six signal lines D+, D-, RX+, RX-, TX+, and TX- of the USB3.x interface with a single chip. The structure is reasonably designed, the number of components is small, the wiring is simple, and the printed circuit board area is reduced. The electrostatic protection device can be placed at a short distance close to the USB3.x interface, the number of patch times is small, the cost is low, the practicability is strong, and it is easy to promote and use.
[0006] In order to achieve the above-mentioned purpose, the utility model is realized through the following technical scheme: a USB3.x interface dedicated electrostatic protection chip, including a metal lead frame, silver paste solder, a four-channel ultra-low capacitance unidirectional electrostatic protection chip, a metal wire and epoxy resin, silver paste solder is placed on the left and right sides of the GND end of the metal lead frame, and a four-channel ultra-low capacitance unidirectional electrostatic protection chip is placed on the silver paste solder on each side, wherein the left two chip opening windows of the four-channel ultra-low capacitance unidirectional electrostatic protection chip on the left are electrically connected to the 1st and 10th pins of the metal lead frame through metal wires, and the four-channel ultra-low capacitance unidirectional electrostatic protection chip on the left is electrically connected to the 1st and 10th pins of the metal lead frame through metal wires. The two chip openings on the right side of the unidirectional electrostatic protection chip are electrically connected to pin 2 of the metal lead frame through metal wires; the four chip openings of the four-channel ultra-low capacitance unidirectional electrostatic protection chip on the right side are electrically connected to pins 4, 5, 6, and 7 of the metal lead frame through metal wires, and the GND end of the metal lead frame is electrically connected to pin 9 of the metal lead frame through a metal wire, and pins 3 and 8 of the metal lead frame are empty. The metal lead frame, silver paste solder, four-channel ultra-low capacitance unidirectional electrostatic protection chip, and the periphery of the metal wire are half-wrapped with epoxy resin to form an electrostatic protection chip structure for the USB3.x interface.
[0007] Preferably, pins 1 and 10 of the metal lead frame are two unidirectional ultra-low capacitance electrostatic protection channels, which form a ground path with the GND terminal to provide high-speed electrostatic protection function for the D+ and D- signal lines of UBS3.x.
[0008] Preferably, two pins of the metal lead frame are connected in parallel with GND via two unidirectional ultra-low capacitance electrostatic protection channels to form a ground path, thereby meeting the needs of high-power electrostatic protection of the VBUS power line of UBS3.x.
[0009] Preferably, pins 4, 5, 6 and 7 of the metal lead frame are four unidirectional ultra-low capacitance electrostatic protection channels, which form a ground path with the GND end to provide high-speed electrostatic protection function for the four signal lines RX+, RX-, TX+ and TX- of UBS3.x.
[0010] The beneficial effects of the utility model are as follows: the device has a small number of components, only uses one electrostatic protection device, and has simple wiring, which reduces the area occupied by the electrostatic protection device on the printed circuit board, so that the electrostatic protection device can be placed close to the USB3.x interface at a short distance, reducing the number of patch times, reducing costs, and having broad application prospects. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] The utility model is described in detail below with reference to the accompanying drawings and specific implementation methods;
[0012] Figure 1 It is a schematic diagram of the structure of the utility model;
[0013] Figure 2 It is the internal circuit diagram of the utility model. DETAILED DESCRIPTION
[0014] In order to make the technical means, creative features, objectives and effects achieved by the present invention easy to understand, the present invention is further described below in conjunction with specific implementation methods.
[0015] Reference Figure 1-2 , this specific implementation adopts the following technical scheme: a USB3.x interface dedicated electrostatic protection chip, including a metal lead frame A, silver paste solder B, a four-channel ultra-low capacitance unidirectional electrostatic protection chip C, a metal wire D and an epoxy resin E, silver paste solder B is placed on the left and right sides of the GND end of the metal lead frame A, and a four-channel ultra-low capacitance unidirectional electrostatic protection chip C is placed on the silver paste solder B on each side, wherein the left two chip opening windows of the four-channel ultra-low capacitance unidirectional electrostatic protection chip C on the left are electrically connected to the 1st and 10th pins of the metal lead frame A through the metal wire D, and the four-channel ultra-low capacitance unidirectional electrostatic protection chip C on the left is electrically connected to the 1st and 10th pins of the metal lead frame A through the metal wire D. The two chip opening windows on the right are electrically connected to pin 2 of the metal lead frame A through a metal wire D; the four chip opening windows of the four-channel ultra-low capacitance unidirectional electrostatic protection chip C on the right are electrically connected to pins 4, 5, 6, and 7 of the metal lead frame A through metal wire D, and the GND end of the metal lead frame A is electrically connected to pin 9 of the metal lead frame A through metal wire D. Pins 3 and 8 of the metal lead frame A are empty, and epoxy resin E is half-wrapped around the metal lead frame A, silver paste solder B, four-channel ultra-low capacitance unidirectional electrostatic protection chip C, and metal wire D, thereby forming an electrostatic protection chip structure for a USB3.x interface.
[0016] Compared with the existing solution of using seven single-channel electrostatic protection devices or one dual-channel electrostatic protection device plus one four-channel electrostatic protection device, this specific implementation method uses two four-channel ultra-low capacitance unidirectional electrostatic protection chips C to connect the specified circuit through a metal lead frame A, silver paste solder B, and metal wire D, and then half-wrapped with epoxy resin E to form a channel containing six ultra-low capacitance electrostatic protection channels and one high-power low capacitance electrostatic protection channel. A single device can provide electrostatic protection function for a VBUS power line and six signal lines of D+, D-, RX+, RX-, TX+, and TX- of a USB3.x interface in a one-stop manner. Among them, pins 1 and 10 of the metal lead frame A are two unidirectional ultra-low capacitance electrostatic protection channels, which form a ground path with the GND end to provide high-speed electrostatic protection function for the D+ and D- signal lines of UBS3.x; pin 2 of the metal lead frame A is connected to the ground by two unidirectional ultra-low capacitance electrostatic protection channels in parallel with GND to form a ground path. The two unidirectional ultra-low capacitance electrostatic protection channels in parallel can obtain double the power and capacitance, which is suitable for the high-power electrostatic protection needs of the VBUS power line of UBS3.x; pins 4, 5, 6, and 7 of the metal lead frame A are four unidirectional ultra-low capacitance electrostatic protection channels, which form a ground path with the GND end to provide high-speed electrostatic protection function for the four signal lines RX+, RX-, TX+, and TX- of UBS3.x; pin 9 of the metal lead frame A is connected to the GND end to provide an additional grounding point.
[0017] This specific implementation provides one high-power electrostatic protection channel and six ultra-low capacitance electrostatic protection channels in the same package shape, meeting the requirements of providing high-power electrostatic protection for one power line and ultra-low capacitance electrostatic protection for six signal lines of the USB3.x interface. Its technical advantages are:
[0018] ① Only one electrostatic protection device is used, the number of components is small, and the area occupied by the electrostatic protection device on the printed circuit board is reduced;
[0019] ② Reduce the number of placements during SMT;
[0020] ③ Reduce the cost of the device itself and the patch;
[0021] ④Simplify PCB wiring, and the electrostatic protection device can be placed closer to the USB3.x interface, thereby greatly reducing the risk of electrostatic external radiation between the USB3.x interface and the electrostatic protection device, and has broad market application prospects.
[0022] The above shows and describes the basic principle and main features of the utility model and the advantages of the utility model. Those skilled in the art should understand that the utility model is not limited by the above embodiments. The above embodiments and descriptions are only for explaining the principle of the utility model. Without departing from the spirit and scope of the utility model, the utility model may have various changes and improvements, which fall within the scope of the utility model to be protected. The scope of protection claimed by the utility model is defined by the attached claims and their equivalents.
Claims
1. A USB3.x interface dedicated electrostatic protection chip, characterized in that: It includes a metal lead frame (A), silver paste solder (B), a four-channel ultra-low capacitance unidirectional electrostatic protection chip (C), a metal wire (D) and an epoxy resin (E). Silver paste solder (B) is placed on the left and right sides of the GND end of the metal lead frame (A), and a four-channel ultra-low capacitance unidirectional electrostatic protection chip (C) is placed on each side of the silver paste solder (B). The two chip openings on the left side of the four-channel ultra-low capacitance unidirectional electrostatic protection chip (C) are electrically connected to the 1st and 10th pins of the metal lead frame (A) through the metal wire (D), and the two chip openings on the right side of the four-channel ultra-low capacitance unidirectional electrostatic protection chip (C) are electrically connected to the 1st and 10th pins of the metal lead frame (A) through the metal wire (D). (D) is electrically connected to pin 2 of the metal lead frame (A); the four chip opening windows of the four-channel ultra-low capacitance unidirectional electrostatic protection chip (C) on the right are electrically connected to pins 4, 5, 6, and 7 of the metal lead frame (A) through metal wires (D), and the GND end of the metal lead frame (A) is electrically connected to pin 9 of the metal lead frame (A) through the metal wire (D). Pins 3 and 8 of the metal lead frame (A) are empty. The metal lead frame (A), silver paste solder (B), four-channel ultra-low capacitance unidirectional electrostatic protection chip (C), and metal wire (D) are half-wrapped with epoxy resin (E) to form an electrostatic protection chip structure for a USB3.x interface.
2. The USB3.x interface dedicated electrostatic protection chip according to claim 1, characterized in that: Pins 1 and 10 of the metal lead frame (A) are two unidirectional ultra-low capacitance electrostatic protection channels, forming a ground path with the GND terminal.
3. The USB3.x interface dedicated electrostatic protection chip according to claim 1, characterized in that: The two pins of the metal lead frame (A) are connected in parallel with GND by two unidirectional ultra-low capacitance electrostatic protection channels to form a ground path.
4. The USB3.x interface dedicated electrostatic protection chip according to claim 1, characterized in that: Pins 4, 5, 6 and 7 of the metal lead frame (A) are four unidirectional ultra-low capacitance electrostatic protection channels, forming a ground path with the GND terminal.