Super junction MOSFET device

Abstract

The embodiment of the utility model relates to the technical field of chip packaging, and discloses a super-junction MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device. The super junction MOSFET device comprises a frame, an MOS chip, a first copper clamp and a second copper clamp. The device comprises a frame and an MOS chip welded on the frame, the frame comprises a substrate, a source electrode pin and a grid electrode pin, and the MOS chip comprises a source electrode bonding pad and a grid electrode bonding pad; one end of the first copper clamp is welded on the source electrode bonding pad, and the other end of the first copper clamp is welded on the source electrode pin; the second copper clamp comprises a first part, a second part and an extension part connected with the first part and the second part, the first part is fixedly connected with the grid electrode, and the second part is fixedly connected with the grid electrode pin; and the step structure is provided with a first surface and a second surface which are oppositely arranged along a preset direction, the first surface is fixedly connected with the first part, and the second surface extends along the preset direction and is fixedly connected with the gate bonding pad. According to the super-junction MOSFET device provided by the embodiment of the invention, not only can better conductivity be realized, but also the adaptability of a product can be enhanced.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of chip packaging technology, and in particular to a super junction MOSFET device. Background Art

[0002] Super Junction MOSFET (Super Junction Metal-Oxide-Semiconductor Field-Effect Transistor) is a semiconductor component widely used in high-efficiency and high-voltage power electronic devices. Compared with traditional planar MOSFET, super junction MOSFET achieves lower on-resistance and higher breakdown voltage through the structural design of vertically alternating P-type and N-type regions.

[0003] With the continuous advancement of technology, the gate pad size of super junction MOSFET is gradually reduced to improve integration and response speed. However, although this size reduction improves device performance, it also brings new challenges to the manufacturing process. Especially in the packaging process, small-sized gate pads are often difficult to match with traditional clip processes. Therefore, how to enhance the adaptability of super junction MOSFET devices is an important issue. Utility Model Content

[0004] The purpose of the implementation mode of the present application is to provide a super junction MOSFET device that can achieve better conductivity and enhance product adaptability.

[0005] In order to solve the above technical problems, the embodiment of the present application provides a super junction MOSFET device, which includes a frame, a MOS chip, a first copper clip, a second copper clip and a step structure. The frame and the MOS chip welded on the frame, the frame includes a substrate, a source pin and a gate pin, and the MOS chip includes a source pad and a gate pad; the first copper clip, one end of which is welded on the source pad, and the other end is welded on the source pin; the second copper clip includes a first part and a second part, and an extension connecting the first part and the second part, the first part is fixedly connected to the gate pad, and the second part is fixedly connected to the gate pin; the step structure has a first surface and a second surface arranged opposite to each other along a preset direction, the first surface is fixedly connected to the first part, and the second surface extends along a preset direction and is fixedly connected to the gate pad.

[0006] The super junction MOSFET device provided in the embodiment of the present application addresses the problem of poor aluminum wire bonding process effect, and adopts a second copper clip with a stepped structure, which not only improves the current density and current carrying capacity, but also enables the second copper clip to flexibly match gate pads of different sizes due to its stepped design, thereby achieving better conductivity and enhancing product adaptability.

[0007] In some embodiments, a width of the extension portion perpendicular to the preset direction is greater than a width of the first portion perpendicular to the preset direction.

[0008] In some embodiments, a width of the extension portion perpendicular to the preset direction is greater than a width of the second portion perpendicular to the preset direction.

[0009] In some embodiments, a distance between the extension portion and the MOS chip is greater than a distance between the first portion and the MOS chip.

[0010] In some embodiments, a distance between the extension portion and the MOS chip is greater than a distance between the second portion and the MOS chip.

[0011] In some embodiments, the stepped structure further includes two side surfaces connecting the first surface and the second surface, and the two side surfaces are arranged parallel to a preset direction.

[0012] In some embodiments, the thickness of the step structure in a predetermined direction is 30%-70% of the thickness of the second copper clip.

[0013] In some embodiments, the thickness of the step structure in a predetermined direction is 40%-60% of the thickness of the second copper clip.

[0014] In some embodiments, the gate pad and the second copper clip, the gate pin and the second copper clip, the source pad and the first copper clip, and the source pin and the first copper clip are all welded by solder paste material.

[0015] In some embodiments, the size of the second surface is 74um*76um. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0017] Figure 1 is a schematic diagram of the overall structure of a super junction MOSFET device provided in some embodiments of the present application;

[0018] Figure 2 is a front view of a second copper clip of a super junction MOSFET device provided by some embodiments of the present application;

[0019] Figure 3 is a side view of a second copper clip of a super junction MOSFET device provided in some embodiments of the present application. DETAILED DESCRIPTION

[0020] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, each embodiment of the present application will be described in detail below in conjunction with the accompanying drawings. However, it will be appreciated by those skilled in the art that in each embodiment of the present application, many technical details are proposed in order to enable the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical scheme claimed in the present application can also be implemented. The division of the following embodiments is for the convenience of description, and the specific implementation of the present application should not constitute any limitation, and the various embodiments can be combined with each other and referenced to each other without contradiction.

[0021] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0022] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0023] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0024] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "installed", "connected", "connected" and the like should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0025] In the manufacturing process of super junction MOSFET, aluminum wire bonding process is a key back-end step. This process involves using aluminum wire to connect the gate and source of the MOS chip to the corresponding pins respectively. This process is usually carried out after the MOS chip is soldered to the frame by solder material at high temperature, and then the connection between the aluminum wire and the solder joint is completed by ultrasonic welding technology.

[0026] However, the aluminum wire bonding process of this super junction MOSFET product also has some significant disadvantages. Since MOSFET products are used at high power and the current density of aluminum wire is relatively low, their power-carrying capacity is limited and the resistance value is also high. This leads to a large amount of heat being easily generated in the welding area. In addition, the product life is relatively short, and problems such as craters and cold solder joints may occur during the bonding process, which increases the risk of the product. At the same time, the adjustment range of the ultrasonic welding process is relatively narrow and the process is difficult. If the welding depth is too shallow, the connection may be loose and easy to fall off; if the welding depth is too deep, the internal oxide layer may be damaged, which may cause the entire device to fail.

[0027] To this end, some embodiments of the present application provide a super junction MOSFET device. In view of the problem of poor aluminum wire bonding process effect, the super junction MOSFET device adopts a second copper clip with a stepped structure, which not only improves the current density and power-carrying capacity, but also enables the second copper clip to flexibly match gate pads of different sizes due to its stepped design. This can achieve better conductivity and enhance product adaptability.

[0028] Combine the following Figures 1 to 3 , illustrating the super junction MOSFET device provided in some embodiments of the present application.

[0029] like Figure 1 As shown, the super junction MOSFET device provided by some embodiments of the present application includes a frame, a MOS chip 20, a first copper clip 30, a second copper clip 40 and a step structure 50. The frame, and the MOS chip 20 welded on the frame, the frame includes a substrate, a source pin 11 and a gate pin 12, and the MOS chip 20 includes a source pad 21 and a gate pad 22; the first copper clip 30, one end of which is welded on the source pad 21, and the other end is welded on the source pin 11; the second copper clip 40, including a first part 41 and a second part 42, and an extension part 43 connecting the first part 41 and the second part 42, the first part 41 is fixedly connected to the gate pad 22, and the second part 42 is fixedly connected to the gate pin 12; the step structure 50 has a first surface and a second surface arranged opposite to each other along a preset direction, the first surface is fixedly connected to the first part 41, and the second surface extends along a preset direction and is fixedly connected to the gate pad 22.

[0030] The frame is the mechanical support structure of the device, which consists of a substrate and source pins 11 and gate pins 12 extending from the substrate. The substrate of the frame provides a stable mounting platform for the device and is connected to the MOS chip 20 by high-temperature welding. The MOS chip 20 is the core part of the device, which includes a source pad 21 and a gate pad 22.

[0031] The first copper clip 30 is an electrical connection element, one end of which is welded to the source pad 21 , and the other end of which is welded to the source lead 11 , thereby achieving electrical connection of the source pad 21 .

[0032] The second copper clip 40 is an electrical connection element, including a first portion 41 and a second portion 42 , and an extension portion 43 connecting the first portion 41 and the second portion 42 . The first portion is welded to the gate pad 22 , and the second portion is welded to the gate pin 12 to achieve electrical connection of the gate pad 22 .

[0033] The copper clip can ensure good current transfer. Its overall integrated structure, planar shape layout characteristics, and spatial hierarchical structure characteristics maintain the stability and performance of the entire device.

[0034] The step structure 50 has a first surface and a second surface arranged opposite to each other along a preset direction. The first surface is fixedly connected to the first portion 41 to enhance the stability and reliability of the connection. The second surface extends along the preset direction and is welded and fixed to the gate pad 22.

[0035] like Figure 2 and Figure 3 As shown, the distance between the first portion and the MOS chip 20 may be inconsistent, wherein the portion closest to the MOS chip 20 is provided with a step structure 50 for being welded and fixed to the gate pad 22 .

[0036] In the core mounting process, the MOS chip 20 is first soldered to the frame under high temperature conditions through solder material to ensure a stable connection between the chip and the frame. Subsequently, in the bonding process, the gate pad 22 of the MOS chip 20 is electrically connected to the gate pin 12 via the second copper clip 40, and at the same time, the source pad 21 of the MOS chip 20 is also electrically connected to the source pin 11 via the first copper clip 30. The above connection process is as follows Figure 2 As shown, this connection method can effectively improve the conductivity and reliability of the device.

[0037] The super junction MOSFET device provided in the embodiment of the present application adopts the second copper clip 40 with a stepped structure 50, which not only improves the current density and the current carrying capacity, but also enables the second copper clip 40 to flexibly match the gate pads 22 of different sizes due to its stepped design. Thus, better conductive performance can be achieved and the adaptability of the product can be enhanced.

[0038] In some embodiments, the width of the extension portion 43 perpendicular to the preset direction is greater than the width of the first portion 41 and the second portion 42 perpendicular to the preset direction.

[0039] That is to say, the extension portion 43 has a larger area and can provide better structural strength and stability.

[0040] like Figure 2 As shown, the distance between the extension portion 43 and the MOS chip 20 is greater than the distance between the first portion 41 and the MOS chip 20 .

[0041] Meanwhile, the distance between the extension portion 43 and the MOS chip 20 is greater than the distance between the second portion 42 and the MOS chip 20 .

[0042] like Figure 3 As shown, the step structure 50 further includes two side surfaces connecting the first surface and the second surface, and the two side surfaces are arranged parallel to a preset direction.

[0043] That is to say, the stepped structure 50 as a whole adopts a regular shape, which is conducive to simplifying the production.

[0044] In some embodiments, the thickness of the step structure 50 in a predetermined direction may be 30%-70% of the thickness of the second copper clip 40 .

[0045] The thickness of the step structure 50 in the preset direction may account for 50% to 70% of the thickness of the second copper clip 40. For example, the thickness of the step structure 50 in the preset direction may be 30%, 40%, 50%, 60% or 70% of the thickness of the second copper clip 40.

[0046] In actual situations, the stepped structure 50 is more optimized in terms of strength and stability, and can better support and fix the connection between the second copper clip 40 and the gate pad 22 . The thickness of the stepped structure 50 in a preset direction can be 40%-60% of the thickness of the second copper clip 40 .

[0047] In some embodiments, the size of the second surface may be 74um*76um.

[0048] The size of the second surface of the step structure 50 refers to the existing minimum chip size, i.e., 74um76um. This size can ensure that there is sufficient contact area between the step structure 50 and the second copper clip 40 and the gate pad 22, thereby forming a stable and reliable electrical connection. At the same time, this size can also reduce the contact resistance to a certain extent and improve the conductive performance of the device.

[0049] In some embodiments, the gate pad 22 and the second copper clip 40 , the gate pin 12 and the second copper clip 40 , the source pad 21 and the first copper clip 30 , and the source pin 11 and the first copper clip 30 can all be welded by solder paste material.

[0050] Solder paste is a key material used to form solder joints between electronic components and printed circuit boards. During the soldering process, the solder paste melts at the solder joint location and forms a solid solder connection after cooling, thereby reliably fixing the electronic component to the circuit board. The active flux contained in the solder paste can also effectively reduce oxidation on the metal surface, which helps to ensure a clean soldering surface and improve soldering quality and reliability. By reducing oxidation, the solder paste promotes wetting during the soldering process, making the soldering more uniform and firm.

[0051] Those skilled in the art will appreciate that the above-mentioned embodiments are specific examples for implementing the present application, and in actual applications, various changes may be made thereto in form and detail without departing from the spirit and scope of the present application.

Claims

1. A super junction MOSFET device, characterized in that: include: A frame, and a MOS chip welded on the frame, wherein the frame comprises a substrate, a source pin and a gate pin, and the MOS chip comprises a source pad and a gate pad; A first copper clip, one end of which is welded to the source electrode pad, and the other end of which is welded to the source electrode pin; A second copper clip, comprising a first part and a second part, and an extension connecting the first part and the second part, the first part is fixedly connected to the gate pad, and the second part is fixedly connected to the gate pin; The stepped structure comprises a first surface and a second surface which are arranged opposite to each other along a preset direction, wherein the first surface is fixedly connected to the first portion, and the second surface extends along the preset direction and is fixedly connected to the gate pad.

2. A super junction MOSFET device according to claim 1, characterized in that: The width of the extending portion perpendicular to the preset direction is greater than the width of the first portion perpendicular to the preset direction.

3. A super junction MOSFET device according to claim 2, characterized in that: The width of the extending portion perpendicular to the preset direction is greater than the width of the second portion perpendicular to the preset direction.

4. A super junction MOSFET device according to claim 3, characterized in that: The distance between the extending portion and the MOS chip is greater than the distance between the first portion and the MOS chip.

5. A super junction MOSFET device according to claim 4, characterized in that: The distance between the extending portion and the MOS chip is greater than the distance between the second portion and the MOS chip.

6. A super junction MOSFET device according to claim 5, characterized in that: The step structure further includes two side surfaces connecting the first surface and the second surface, and the two side surfaces are arranged parallel to the preset direction.

7. A super junction MOSFET device according to claim 6, characterized in that: The thickness of the stepped structure in the preset direction is 30%-70% of the thickness of the second copper clip.

8. A super junction MOSFET device according to claim 7, characterized in that: The thickness of the stepped structure in the preset direction is 40%-60% of the thickness of the second copper clip.

9. A super junction MOSFET device according to claim 8, characterized in that: The gate pad and the second copper clip, the gate pin and the second copper clip, the source pad and the first copper clip, and the source pin and the first copper clip are all welded by solder paste material.

10. A super junction MOSFET device according to claim 9, characterized in that: The minimum size of the second surface is 74um*76um.

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