Small-width DDR5 memory bank circuit board

Abstract

The utility model discloses a small-width DDR5HUB memory bank circuit board, which belongs to the technical field of memory bank circuit boards, and comprises a PCB (printed circuit board), a DDR5HUB packaging chip, a plurality of pins, a groove and a plurality of address lines, the PCB comprises a surface layer in contact with the outside and a wiring layer not in contact with the outside, the DDR5HUB packaging chip is fixedly arranged in the middle of the upper end of the surface layer of the PCB, and the pins are fixedly arranged on the surface layer of the PCB. The plurality of pins are fixedly arranged at the lower end of the surface layer of the PCB, the plurality of grooves are arranged at the left side, the right side and the lower part of the PCB, and the plurality of address lines are arranged on the wiring layer; the address lines of the wiring layer are arranged obliquely, so that the wiring space is optimized, the DDR5HUB packaging chip is moved downwards to the optimized space, the width of the DDR5 memory bank circuit board is shortened, the cost is reduced, and the production efficiency is improved.

Description

Technical Field

[0001] The utility model belongs to the technical field of memory bar circuit boards, and more specifically, relates to a small-width DDR5 memory bar circuit board. Background Art

[0002] DDR5 is a computer memory specification. Compared with DDR4 memory, the DDR5 standard has stronger performance and lower power consumption. Its voltage is reduced from 1.2V to 1.1V, and at the same time, 32 / 40 bits per channel (error checking and correction can be achieved, bus efficiency is improved, and the number of pre-fetched Bank Groups is increased to improve performance. Compared with DDR4, the improved DDR5 function will increase the actual bandwidth by 36%, even starting at 3200MT / s (this statement must be tested) and 4800MT / s speeds, compared with DDR4-3200, the actual bandwidth will be 87% higher. At the same time, one of the most important features of DDR5 is the single-chip chip density of more than 16Gb, but the existing DDR5 memory bar circuit board has added DDR5_HUB packaged chips, and the existing DDR5 memory bar wiring method is forward wiring, and the spatial layout is limited. The existing DDR5 memory bar width is 31.25mm, resulting in a wider width of the memory bar DDR5 memory bar circuit board and a higher cost; the connection position is long, which is not conducive to the folding process of the finished single PCS, and the folding efficiency is low, so a DDR5 memory bar circuit board that can reasonably utilize the spatial layout and shorten the width is needed. Summary of the invention

[0003] The technical problem to be solved by the utility model is to provide a small-width DDR5 memory strip circuit board, which can meet the requirements of reasonable utilization of space layout and shortening width.

[0004] The utility model discloses a circuit board of a DDR5 memory bar with small width, comprising a PCB board, a DDR5_HUB package chip, a plurality of pins, grooves and a plurality of address lines. The PCB board comprises a surface layer in contact with the outside and a wiring layer not in contact with the outside. The DDR5_HUB package chip is fixedly installed in the middle of the upper end of the surface layer of the PCB board, a plurality of pins are fixedly installed at the lower end of the surface layer of the PCB board, a plurality of grooves are arranged on the left and right sides and the bottom of the PCB board, and a plurality of address lines are arranged on the wiring layer. The address lines of the wiring layer are obliquely wired to optimize the wiring space, and the DDR5_HUB package chip is moved down to the optimized space, so as to shorten the width of the circuit board of the DDR5 memory bar to no more than 29.25 mm, thereby reducing costs and improving production efficiency.

[0005] As a further improvement of the present invention, the groove includes a pair of upper fixing card notches, a pair of lower fixing card notches and pin partition notches. The pair of upper fixing card notches are arranged at both ends of the PCB board, and the pair of lower fixing card notches are arranged below the pair of upper fixing card notches, thereby ensuring the correct docking of the memory stick with the motherboard slot, thereby avoiding problems caused by reverse insertion or improper installation. The pin partition notches are arranged at the lower end of the PCB board to isolate several pins to prevent memory sticks of different generations from being mistakenly inserted into the memory slot and causing burning.

[0006] As a further improvement of the present invention, the distance between the upper edge of a pair of upper fixing card notches and the upper edge of the PCB board is 1.5mm-11.65mm, the distance between the upper edge of a pair of lower fixing card notches and the upper edge of the PCB board is 8.1mm-18.25mm, and the distance between the top of the pin partition notch and the upper edge of the PCB board is 15.25mm-25.4mm. The distance is optimized to match the installation position and improve space utilization.

[0007] As a further improvement of the present invention, the connection distance between the upper edge of a pair of upper fixing card notches and the upper end of the PCB board is 2.15mm-10.15mm, shortening the connection position, which is beneficial to the breaking process of the finished single PCS and improving the efficiency of the folding plate.

[0008] As a further improvement of the utility model, the DDR5_HUB packaged chip includes a controller, and the pins include a signal HSCL pin and a signal HSDL pin. The distance range of the signal HSCL of the signal HSCL pin to the controller 2-1 is 15.58mm-23.58mm, and the distance range of the signal HSDL of the signal HSDL pin to the controller 2-1 is 16.08mm-24.08mm, thereby shortening the signal transmission distance and increasing the signal strength, thereby achieving the effect of improving product performance.

[0009] Compared with the prior art, the beneficial effects of the utility model are: the address lines of the wiring layer are routed obliquely, thereby optimizing the wiring space, moving the DDR5_HUB packaged chip down to the optimized space, and completing the shortening of the width of the DDR5 memory strip circuit board to no more than 29.25mm, thereby reducing costs and improving production efficiency; a pair of upper fixed card notches are arranged at both ends of the PCB board, and a pair of lower fixed card notches are arranged below the pair of upper fixed card notches, ensuring the correct docking of the memory strip with the motherboard slot, thereby avoiding problems caused by reverse insertion or improper installation, and the pin partition notch is arranged at the lower end of the PCB board to separate a number of pins to prevent different generations of memory strips from being mistakenly inserted into the memory slot and causing burning; the distance between a pair of upper fixed card notches and a pair of lower fixed card notches is optimized to match the installation position, thereby improving space utilization; the connection distance between the upper edge of a pair of upper fixed card notches and the upper end of the PCB board is 2.15mm-10.15mm, shortening the connection position, which is conducive to the folding processing of the finished single PCS and improving the efficiency of the folding plate; shortening the signal transmission distance, thereby increasing the signal strength, thereby achieving the effect of improving product performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a schematic diagram of the structure of the utility model;

[0011] Figure 2 It is an enlarged schematic diagram of the wiring layer structure of the utility model;

[0012] Figure 3 This is a schematic diagram of the groove structure of the utility model;

[0013] Figure 4 This is a diagram of the connection distance from the groove to the upper end of the PCB board of the utility model;

[0014] Figure 5 This is a schematic diagram of the pin structure of the utility model;

[0015] Figure 6 It is a schematic diagram of the wiring structure of the existing DDR5 memory bar of the present invention.

[0016] Description of the numbers in the figure:

[0017] PCB board 1; surface layer 1-1; wiring layer 1-2; DDR5_HUB package chip 2; controller 2-1; pin 3; signal HSCL pin 3-1; signal HSDL pin 3-2; groove 4; upper fixing card notch 4-1; lower fixing card notch 4-2; pin partition notch 4-3; address line 5. DETAILED DESCRIPTION

[0018] Specific embodiment 1: Please refer to Figure 1-Figure 6The utility model relates to a small-width DDR5 memory strip circuit board, including a PCB board 1, a DDR5_HUB package chip 2, a plurality of pins 3, a groove 4 and a plurality of address lines 5. The PCB board 1 includes a surface layer 1-1 in contact with the outside and a wiring layer 1-2 not in contact with the outside. The DDR5_HUB package chip 2 is fixedly installed in the middle of the upper end of the surface layer 1-1 of the PCB board 1, a plurality of pins 3 are fixedly installed at the lower end of the surface layer 1-1 of the PCB board 1, a plurality of grooves 4 are arranged on the left and right sides and below the PCB board 1, and a plurality of address lines 5 are arranged on the wiring layer 1-2; the address lines 5 of the wiring layer 1-2 are obliquely wired to optimize the wiring space, and the DDR5_HUB package chip 2 is moved down to the optimized space. The width of the DDR5 memory strip circuit board is shortened to no more than 29.25 mm, thereby reducing costs and improving production efficiency.

[0019] In a further embodiment, Figure 3 As shown, the groove 4 includes a pair of upper fixing card notches 4-1, a pair of lower fixing card notches 4-2 and a pin partition notch 4-3. The pair of upper fixing card notches 4-1 are arranged at both ends of the PCB board 1, and the pair of lower fixing card notches 4-2 are arranged below the pair of upper fixing card notches 4-1, ensuring the correct docking of the memory stick with the motherboard slot, thereby avoiding problems caused by reverse insertion or improper installation. The pin partition notch 4-3 is arranged at the lower end of the PCB board 1 to partition a number of pins 3 to prevent memory sticks of different generations from being mistakenly inserted into the memory slot and causing burning.

[0020] In a further embodiment, Figure 3 As shown, the distance between the upper edge of a pair of upper fixing card notches 4-1 and the upper edge of the PCB board 1 is 1.5mm-11.65mm, the distance between the upper edge of a pair of lower fixing card notches 4-2 and the upper edge of the PCB board 1 is 8.1mm-18.25mm, and the distance between the top of the pin partition slot 4-3 and the upper edge of the PCB board 1 is 15.25mm-25.4mm. The distance is optimized to match the installation position and improve space utilization.

[0021] In a further embodiment, Figure 4 As shown, the connection distance between the upper edge of a pair of upper fixing card notches 4-1 and the upper end of the PCB board 1 is 2.15mm-10.15mm, shortening the connection position, which is beneficial to the breaking process of the finished single PCS and improving the efficiency of the folding plate.

[0022] In a further embodiment, Figure 5As shown, the DDR5_HUB packaged chip 2 includes a controller 2-1, and pin 3 includes a signal HSCL pin 3-1 and a signal HSDL pin 3-2. The distance range of the signal HSCL from the signal HSCL pin 3-1 to the controller 2-1 is 15.58mm-23.58mm, and the distance range of the signal HSDL from the signal HSDL pin 3-2 to the controller 2-1 is 16.08mm-24.08mm, which shortens the signal transmission distance, thereby increasing the signal strength and achieving the effect of improving product performance.

Claims

1. A small width DDR5 memory strip circuit board, characterized by: The invention comprises a PCB board (1), a DDR5_HUB package chip (2), a plurality of pins (3), a groove (4) and a plurality of address lines (5); the PCB board (1) comprises a surface layer (1-1) in contact with the outside and a wiring layer (1-2) not in contact with the outside; the DDR5_HUB package chip (2) is fixedly mounted in the middle of the upper end of the surface layer (1-1); the plurality of pins (3) are fixedly mounted at the lower end of the surface layer (1-1); a plurality of grooves (4) are arranged on the left and right sides and the bottom of the PCB board (1); and the plurality of address lines (5) are arranged on the wiring layer (1-2); the address lines (5) of the wiring layer (1-2) are obliquely wired to vacate the wiring layer (1-2) space of the PCB board (1); the DDR5_HUB package chip (2) is moved down to the vacated space, and the width of the DDR5 memory strip circuit board is shortened to no more than 29.25 mm.

2. A small width DDR5 memory strip circuit board according to claim 1, characterized in that: The groove (4) comprises a pair of upper fixing card notches (4-1), a pair of lower fixing card notches (4-2) and a pin partition notch 4-3, the pair of upper fixing card notches (4-1) being arranged at two ends of the PCB board (1), the pair of lower fixing card notches (4-2) being arranged below the pair of upper fixing card notches (4-1), and the pin partition notch (4-3) being arranged at the lower end of the PCB board (1).

3. A circuit board of a small-width DDR5 memory strip according to claim 2, characterized in that: The distance between the upper edge of the pair of upper fixing card notches (4-1) and the upper edge of the PCB board (1) is 1.5 mm to 11.65 mm, and the distance between the upper edge of the pair of lower fixing card notches (4-2) and the upper edge of the PCB board (1) is 8.1 mm to 18.25 mm.

4. The circuit board of a small-width DDR5 memory strip according to claim 2, characterized in that: The distance between the top of the pin partition notch (4-3) and the upper edge of the PCB board (1) is 15.25-25.4 mm.

5. The circuit board of a small-width DDR5 memory strip according to claim 3, characterized in that: The connection distance between the upper edge of a pair of upper fixing card notches (4-1) and the upper end of the PCB board (1) is 2.15 mm to 10.15 mm.

6. The circuit board of a small-width DDR5 memory strip according to claim 1, characterized in that: The DDR5_HUB package chip (2) includes a controller (2-1), and the pin (3) includes a signal HSCL pin (3-1) and a signal HSDL pin (3-2). The distance range between the signal HSCL of the signal HSCL pin (3-1) and the controller (2-1) is 15.58 mm to 23.58 mm, and the distance range between the signal HSDL of the signal HSDL pin (3-2) and the controller (2-1) is 16.08 mm to 24.08 mm.

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