Circuit for reducing peripheral power consumption

Abstract

The utility model provides a circuit for reducing peripheral power consumption. The circuit comprises a first transistor, a second transistor, a charging unit and a first capacitor, the input end of the first transistor is respectively connected with the input end of the charging unit and an input power supply; the output end of the first transistor is connected with an output load; the control end of the first transistor is connected with the input end of the second transistor, the control end of the charging unit and one end of the first capacitor. The other end of the first capacitor is grounded; the control end of the second transistor is used for being connected with a communication pin, is cut off according to a charging signal generated by the communication pin, and is switched on according to a communication signal generated by the communication pin; and the output end of the second transistor is grounded. Therefore, when the peripheral is not operated, the first capacitor can be charged through the charging unit, and when the voltage threshold is reached, the first transistor is cut off, and the power supply cannot be input, so that the effect of reducing power consumption is achieved.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic circuits, in particular to a circuit for reducing power consumption of peripherals. Background Art

[0002] In the related technologies, most peripheral devices need to work with the terminal. For example, in the field of financial technology, financial peripherals work with the terminal, and the peripherals are powered by the terminal's USB power supply or a DC 12V or DC 9V adapter. However, even if the peripheral is not working for a long time, the peripheral will continue to be powered, thereby increasing the standby power consumption of the peripheral. Utility Model Content

[0003] The technical problem to be solved by the utility model is to provide a circuit for reducing the power consumption of peripherals, so that the peripherals can be automatically powered off when not working for a long time, thereby reducing the power consumption.

[0004] In order to solve the above technical problems, the technical solution adopted by the utility model is:

[0005] A circuit for reducing power consumption of peripherals, comprising a first transistor, a second transistor, a charging unit and a first capacitor; the input end of the first transistor is respectively connected to the input end of the charging unit and an input power supply; the output end of the first transistor is connected to an output load; the control end of the first transistor is respectively connected to the input end of the second transistor, the control end of the charging unit and one end of the first capacitor; the other end of the first capacitor is grounded; the control end of the second transistor is used to connect to a communication pin, and is cut off according to a charging signal generated by the communication pin, and is turned on according to a communication signal generated by the communication pin; the output end of the second transistor is grounded.

[0006] Furthermore, the charging unit includes a first resistor and a PNP transistor; one end of the first resistor serves as an input end of the charging unit; the other end of the first resistor is connected to the emitter of the PNP transistor; the base of the PNP transistor serves as a control end of the charging unit; and the collector of the PNP transistor is grounded.

[0007] Furthermore, it also includes a switch and a second resistor; the control end of the first transistor is also connected to one end of the second resistor; the other end of the second resistor is connected to one end of the switch; and the other end of the switch is grounded.

[0008] Furthermore, it also includes a diode; the cathode of the diode is connected to the input end of the first transistor; the control end of the first transistor is also connected to the anode of the diode.

[0009] Furthermore, a third resistor is included; one end of the third resistor is used to be connected to the communication pin; the other end of the third resistor is connected to the control end of the second transistor.

[0010] Furthermore, the first transistor is a PMOS tube; the input end of the first transistor is the source of the PMOS tube, the control end is the gate of the PMOS tube, and the output end is the drain of the PMOS tube.

[0011] Furthermore, the second transistor is a triode; the input end of the second transistor is the collector of the triode, the control end is the base of the triode, and the output end is the emitter of the triode.

[0012] The beneficial effects of the utility model are as follows: the control end of the second transistor is connected to the communication pin, and when a communication signal for operating the peripheral is received, the second transistor is turned on, the first capacitor cannot be powered by the charging unit, and the first transistor is turned on to supply power to the load; and when the charging signal is received, the second transistor is turned off, and the first capacitor is charged by the charging unit. Since the first capacitor is connected to the control end of the first transistor, the control end of the first transistor is set to a high level after the first capacitor is completely charged, so that the first transistor is turned off and power cannot be input; that is, when the peripheral is not operated, the first transistor can be turned off and power cannot be input when the first capacitor is charged and reaches the voltage threshold, thereby reducing power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 A circuit diagram for reducing power consumption of peripherals in an embodiment of the utility model;

[0014] Description of labels:

[0015] 1. Charging unit; Q1, first transistor; Q2, second transistor; C1, first capacitor;

[0016] R1, first resistor; Q3, PNP transistor; S1, switch; R2, second resistor; D1, diode; R3, third resistor; RL, load; V1, input power supply. DETAILED DESCRIPTION

[0017] In order to explain the technical content, achieved objectives and effects of the present invention in detail, the following is an explanation in conjunction with the implementation modes and the accompanying drawings.

[0018] Please refer to Figure 1, a circuit for reducing power consumption of peripherals, comprising a first transistor, a second transistor, a charging unit and a first capacitor; the input end of the first transistor is respectively connected to the input end of the charging unit and an input power supply; the output end of the first transistor is connected to an output load; the control end of the first transistor is respectively connected to the input end of the second transistor, the control end of the charging unit and one end of the first capacitor; the other end of the first capacitor is grounded; the control end of the second transistor is used to connect to a communication pin, and is cut off according to a charging signal generated by the communication pin, and is turned on according to a communication signal generated by the communication pin; the output end of the second transistor is grounded.

[0019] From the above description, it can be seen that the beneficial effect of the utility model is that: by connecting the control end of the second transistor with the communication pin, when a communication signal for operating the peripheral is received, the second transistor is turned on, the first capacitor cannot be powered by the charging unit, and the first transistor is turned on to supply power to the load; and when the charging signal is received, the second transistor is turned off, and the first capacitor is charged through the charging unit. Since the first capacitor is connected to the control end of the first transistor, the control end of the first transistor is set to a high level after the first capacitor is charged, so that the first transistor is cut off and power cannot be input; that is, when the peripheral is not operating, the first transistor can be cut off and power cannot be input by charging the first capacitor and reaching the voltage threshold, thereby reducing power consumption.

[0020] Furthermore, the charging unit includes a first resistor and a PNP transistor; one end of the first resistor serves as an input end of the charging unit; the other end of the first resistor is connected to the emitter of the PNP transistor; the base of the PNP transistor serves as a control end of the charging unit; and the collector of the PNP transistor is grounded.

[0021] From the above description, it can be seen that the first resistor and the PNP transistor are used as the charging unit, and the PNP base current is used as 1 / β of the emitter current, so that the charging current of the first capacitor is at the nanoampere level, which satisfies the smaller resistance and capacitance values ​​to achieve a longer charging time; at the same time, the charging time of the first capacitor is controlled by adjusting the size of the first resistor and the size of the first capacitor, so that the charging time can be adjusted to shut down the input power supply according to different usage scenarios.

[0022] Furthermore, it also includes a switch and a second resistor; the control end of the first transistor is also connected to one end of the second resistor; the other end of the second resistor is connected to one end of the switch; and the other end of the switch is grounded.

[0023] From the above description, it can be seen that by setting a switch and a second resistor, and connecting the switch and the second resistor to the first capacitor, when the peripheral device needs to be powered, the switch, the second resistor and the first capacitor form a loop by turning on the switch, and the first capacitor is discharged to the ground through the second resistor, so that the voltage of the first capacitor is close to 0V, the first transistor is turned on, and the peripheral device is powered.

[0024] Furthermore, it also includes a diode; the cathode of the diode is connected to the input end of the first transistor; the control end of the first transistor is also connected to the anode of the diode.

[0025] From the above description, it can be seen that by setting a diode, the first capacitor can be discharged through the diode when the peripheral power supply is removed, so that the level of the first capacitor is nearly 0V when the power supply is plugged in next time, and the peripheral can be powered normally.

[0026] Furthermore, a third resistor is included; one end of the third resistor is used to be connected to the communication pin; the other end of the third resistor is connected to the control end of the second transistor.

[0027] It can be seen from the above description that by setting the third resistor at the control end of the second transistor, the voltage input to the second transistor can be adjusted so that the second transistor works stably.

[0028] Furthermore, the first transistor is a PMOS tube; the input end of the first transistor is the source of the PMOS tube, the control end is the gate of the PMOS tube, and the output end is the drain of the PMOS tube.

[0029] From the above description, it can be known that the first transistor is a PMOS tube, so that when the gate of the PMOS tube is charged by the first capacitor to reach a threshold voltage, the power supply can be cut off when the PMOS tube is turned off, thereby reducing power consumption.

[0030] Furthermore, the second transistor is a triode; the input end of the second transistor is the collector of the triode, the control end is the base of the triode, and the output end is the emitter of the triode.

[0031] From the above description, it can be seen that the second transistor is a triode, which can be cut off when the base of the triode receives a high-level signal, controlling the charging unit to charge the first capacitor; and turned on when receiving a low-level signal, so that the peripheral device can be powered and work normally.

[0032] The circuit for reducing power consumption of peripherals provided by the utility model can be applied to the control of peripherals. For example, in the scenario where financial peripherals cooperate with terminals to work, the circuit can control the financial peripherals to be powered off when no communication signal is received for a long time, thereby reducing the power consumption of the financial peripherals. The following is an explanation through specific implementation methods:

[0033] Embodiment 1

[0034] Please refer to Figure 1 , a circuit for reducing power consumption of peripherals, including a first transistor Q1, a second transistor Q2, a charging unit 1 and a first capacitor C1; wherein the first transistor Q1 and the second transistor Q2 can be implemented by PMOS tubes, NMOS tubes, PNP transistors Q3 and NPN transistors. For example, the first transistor Q1 in this embodiment is a PMOS tube, the source of the PMOS tube is used as an input terminal, the gate is used as a control terminal, and the drain is used as an output terminal; the second transistor Q2 is an NPN transistor, the collector is used as an input terminal, the base is used as a control terminal, and the emitter is used as an output terminal. The specific connection method is as follows:

[0035] The input end of the first transistor Q1 is respectively connected to the input end of the charging unit 1 and the input power supply V1; the output end of the first transistor Q1 is used to connect to the output load RL; the control end of the first transistor Q1 is respectively connected to the input end of the second transistor Q2, the control end of the charging unit 1 and one end of the first capacitor C1; the other end of the first capacitor C1 is grounded; the control end of the second transistor Q2 is used to connect to the communication pin, and is cut off according to the charging signal generated by the communication pin, and is turned on according to the communication signal generated by the communication pin; the output end of the second transistor Q2 is grounded; the load includes the circuit in the peripheral device that realizes the main function of the peripheral device, such as the peripheral device is a financial device such as a barcode scanning gun, and the barcode scanning function circuit therein is the corresponding load; for example, the peripheral device is a second-generation ID card reader, a bank card swiper and other devices, and the circuit is directly integrated on the second-generation ID card reader, the bank card swiper and other corresponding peripheral devices.

[0036] Among them, in this embodiment, the communication pin is implemented by the communication method of RS232 signal: -3 to -15V is logic "1", 3~15V is logic "0"; the initial state of the RS232 signal at power-on is "1", and when communicating, the start bit is "0", that is, when the peripheral device is connected, RS232_TX outputs a charging signal, that is, logic "1", so that the NPN transistor is cut off; and when the peripheral device is operated, a "0" communication signal will be generated to turn on the NPN transistor.

[0037] In an optional embodiment, the charging unit includes a first resistor R1 and a PNP transistor Q3; one end of the first resistor R1 serves as the input end of the charging unit 1; the other end of the first resistor R1 is connected to the emitter of the PNP transistor Q3; the base of the PNP transistor Q3 serves as the control end of the charging unit 1; and the collector of the PNP transistor Q3 is grounded. When the second transistor Q2 is turned off, the input power supply V1 sequentially charges the first capacitor C1 through the first resistor R1, the emitter of the PNP transistor Q3, and the base of the PNP transistor Q3. At the same time, based on the NPN base current being 1 / β of the emitter current, the resistance of the first resistor R1 is set to 51KΩ, and the capacitance of the first capacitor C1 is set to 22uF, so that the charging current to the first capacitor C1 is at the nanoampere level, and when the charging time of the first capacitor C1 is controlled to reach 10 minutes, the voltage of the first capacitor C1 reaches the threshold voltage of the first transistor Q1 being turned off. In another optional implementation, the charging unit may also be an RC charging circuit, namely, composed of a first resistor R1 and a first capacitor C1, but the resistance value of the first resistor R1 needs to be readjusted.

[0038] In an optional embodiment, a switch S1 and a second resistor R2 are further provided in the circuit; the control end of the first transistor Q1 is also connected to one end of the second resistor R2; the other end of the second resistor R2 is connected to one end of the switch S1; the other end of the switch S1 is grounded; wherein S1 is a light-touch non-self-locking switch S1; that is, when the switch S1 is pressed, the switch S1 is in the on state, but when the hand is released, the switch S1 is in the off state.

[0039] The circuit further includes a diode D1 and a third resistor R3; the cathode of the diode D1 is connected to the input end of the first transistor Q1; the control end of the first transistor Q1 is also connected to the anode of the diode D1; it is used to quickly discharge the first capacitor C1 through the diode D1 when the power is removed, so that when the power is plugged in next time, the level of the first capacitor C1 is nearly 0V, that is, the first transistor Q1 is turned on to supply power. One end of the third resistor R3 is used to be connected to the communication pin; the other end of the third resistor R3 is connected to the control end of the second transistor Q2, and is used to provide a stable voltage input for the second transistor Q2.

[0040] The working principle of the above circuit for reducing peripheral power consumption is as follows:

[0041] Connect the peripheral device to the terminal, and the RS232 serial port of the peripheral device enters the initial state, that is, receives the logic signal "1", so that the NPN transistor remains in the off state; at this time, the charging unit 1 charges the first capacitor C1. When the charging time of the first capacitor C1 reaches 10 minutes, the voltage of the first capacitor C1 reaches the threshold voltage of the first transistor Q1, and the first transistor Q1 is turned off, so that the peripheral device is powered off. When the peripheral device needs to be powered, the first capacitor C1 is discharged to the ground through the second resistor R2 by touching the switch S1, so that the voltage of the first capacitor C1 is close to 0V, and the first transistor Q1 is turned on again to power the peripheral device.

[0042] If during the charging process of the first capacitor C1, the terminal issues an operation instruction to the RS232 serial port of the peripheral device; that is, the RS232 serial port of the peripheral device receives the logic signal "0", the voltage loaded on the third resistor R3 is 3~15V to turn on the NPN transistor; because the NPN transistor is turned on, the first capacitor C1 is discharged to the ground through the collector and emitter of the NPN transistor in sequence, so that the voltage of the first capacitor C1 is close to 0V; therefore, the voltage of the first capacitor C1 cannot reach the threshold voltage of the first transistor Q1 being turned off, so that the first transistor Q1 is continuously turned on to supply power to the peripheral device. At the same time, during the RS232 communication process, the RS232 TX signal will also have a "0" state, and at this time, the first capacitor C1 will also be discharged through the NPN transistor.

[0043] That is, the above circuit realizes: when the terminal does not issue instructions to the peripherals for 10 consecutive minutes, the peripherals will be automatically powered off; when the peripherals need to be powered on, they can be powered on by touching switch S1. If the terminal issues instructions within 10 minutes, the 10-minute timing will be restarted after the RS232 communication returns to the stop bit "1".

[0044] At the same time, the above circuit is built with discrete components, which is low-cost and easy to debug; and there is no need for MCU (microcontroller unit) to intervene in the power-down control circuit, reducing the workload of program development.

[0045] The above description is only an embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent transformations made using the contents of the specification and drawings of the present invention, or directly or indirectly applied in the relevant technical field, are also included in the patent protection scope of the present invention.

Claims

1. A circuit for reducing power consumption of a peripheral device, characterized in that: comprising a first transistor, a second transistor, a charging unit and a first capacitor; The input end of the first transistor is connected to the input end of the charging unit and the input power supply respectively; The output end of the first transistor is used to connect to the output load; the control end of the first transistor is respectively connected to the input end of the second transistor, the control end of the charging unit and one end of the first capacitor; The other end of the first capacitor is grounded; The control end of the second transistor is used to be connected to the communication pin, and is cut off according to the charging signal generated by the communication pin, and is turned on according to the communication signal generated by the communication pin; the output end of the second transistor is grounded.

2. A circuit for reducing power consumption of peripheral devices according to claim 1, characterized in that: The charging unit includes a first resistor and a PNP transistor; One end of the first resistor serves as an input end of the charging unit; The other end of the first resistor is connected to the emitter of the PNP transistor; The base of the PNP transistor serves as the control terminal of the charging unit; The collector of the PNP transistor is grounded.

3. A circuit for reducing power consumption of peripheral devices according to claim 1, characterized in that: Also includes a switch and a second resistor; The control terminal of the first transistor is also connected to one end of the second resistor; The other end of the second resistor is connected to one end of the switch; The other end of the switch is grounded.

4. A circuit for reducing power consumption of peripheral devices according to claim 1, characterized in that: Also includes diodes; The cathode of the diode is connected to the input terminal of the first transistor; The control terminal of the first transistor is also connected to the anode of the diode.

5. A circuit for reducing power consumption of peripheral devices according to claim 1, characterized in that: Also including a third resistor; One end of the third resistor is used to be connected to the communication pin; The other end of the third resistor is connected to the control end of the second transistor.

6. A circuit for reducing power consumption of peripheral devices according to claim 1, characterized in that: The first transistor is a PMOS tube; The input end of the first transistor is the source of the PMOS tube, the control end is the gate of the PMOS tube, and the output end is the drain of the PMOS tube.

7. A circuit for reducing power consumption of peripheral devices according to claim 1, characterized in that: The second transistor is a triode; The input end of the second transistor is the collector of the transistor, the control end is the base of the transistor, and the output end is the emitter of the transistor.

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