Power level circuit and bootstrap circuit
By designing a precharge circuit for the bootstrap capacitor in the discontinuous conduction mode of the power stage module, maintaining the voltage difference at the preset limit value, the problem of excessive discharge of the bootstrap capacitor is solved, and the high-side switch cannot be turned on, improving the stability of the circuit.
Patent Information
- Application Number
- CN202421747717.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-23
- Publication Date
- 2025-05-06
- Estimated Expiration
- 2034-07-23
AI Technical Summary
In the discontinuous conduction mode of the power stage module, excessive discharge of the bootstrap capacitor causes the high-side switch to fail to conduct.
A bootstrap circuit including a bootstrap capacitor and a precharge circuit is designed. By charging the bootstrap capacitor during the period when both the low-side switch and the high-side switch are turned off, the voltage difference is maintained at the preset limit voltage value and preventing excessive discharge.
It effectively prevents excessive discharge of the bootstrap capacitor, ensures that the high-side switch can be turned on normally when needed, and improves the stability of the power stage circuit.
Smart Images
Figure CN222839563U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a power level circuit and a bootstrap circuit, in particular to a power level circuit and a bootstrap circuit suitable for a power converter circuit. Background Art
[0002] In the related art of power stage modules, when the power stage module operates in discontinuous-conduction mode (DCM) for too long, the bootstrap capacitor in the power stage module is often over-discharged, causing the high-side switch in the power stage module to fail to turn on when it is subsequently required to turn on. Therefore, it is necessary to propose a new circuit and / or method to solve the above problem. Utility Model Content
[0003] One aspect of the utility model is a power stage circuit. The power stage circuit comprises a switch circuit, a drive circuit and a bootstrap circuit. The switch circuit comprises a low-side switch and a high-side switch, wherein the low-side switch and the high-side switch are coupled to a switching node of the power stage circuit. The drive circuit is coupled to the low-side switch and the high-side switch, and is used to drive the low-side switch and the high-side switch to be alternately turned on according to a control signal. The bootstrap circuit is coupled to the switch circuit and the drive circuit, and includes a bootstrap capacitor and a first pre-charging circuit, wherein the bootstrap capacitor is coupled to the switching node and the bootstrap node of the power stage circuit, and the first pre-charging circuit includes a charging switch circuit and a voltage source, the voltage source is coupled to the switching node, and the charging switch circuit is coupled to the voltage source and the bootstrap node, wherein during the period when both the low-side switch and the high-side switch are turned off, the first pre-charging circuit is used to charge the bootstrap capacitor when the voltage difference across the bootstrap capacitor decreases from a preset voltage value to a preset limit voltage value, so that the voltage difference is maintained at the preset limit voltage value, and wherein the preset limit voltage value is determined according to the constant voltage of the voltage source and the conduction critical voltage of the charging switch circuit.
[0004] In some embodiments, the charging switch circuit includes a charging switch and a unidirectional conduction switch, and the charging switch and the unidirectional conduction switch are coupled between the voltage source, the power signal and the bootstrap node. During the period when the low-side switch and the high-side switch are both turned off, the bootstrap capacitor discharges to the bootstrap node until the voltage difference decreases from the preset voltage value to the preset limit voltage value, and the charging switch and the unidirectional conduction switch are switched from the off state to the on state when the voltage difference decreases to the preset limit voltage value, so that the bootstrap capacitor is charged. The turn-on critical voltage is determined by the critical voltage of the charging switch and the turn-on voltage of the unidirectional conduction switch, and the preset limit voltage value is equal to the constant voltage of the voltage source minus the turn-on critical voltage of the charging switch circuit.
[0005] In some embodiments, the preset limit voltage value is equal to the constant voltage of the voltage source minus the conduction threshold voltage of the charging switch circuit.
[0006] In some embodiments, the bootstrap circuit further includes a second pre-charging circuit, and the second pre-charging circuit is coupled to the bootstrap node and used to charge the bootstrap capacitor during the period when the low-side switch is turned on to increase the voltage difference to the preset voltage value. The first pre-charging circuit and the second pre-charging circuit are used to stop charging the bootstrap capacitor during the period when the high-side switch is turned on.
[0007] In some embodiments, the bootstrap circuit further includes a first unidirectional conduction switch, and the first unidirectional conduction switch is coupled to the first power signal and the bootstrap node. During the period when the low-side switch is turned on, the switching node is switched to the ground voltage level, and the first unidirectional conduction switch is switched from the off state to the on state to switch the bootstrap node to the first voltage level, and the bootstrap capacitor is charged according to the first voltage level and the ground voltage level, so that the voltage difference increases to the preset voltage value.
[0008] In some embodiments, the charging switch circuit further includes a charging switch and a second unidirectional conduction switch, the voltage source is coupled to the switching node and the charging switch, the charging switch is coupled to a second power signal, and the second unidirectional conduction switch is coupled to the charging switch and the bootstrap node. During the period when both the low-side switch and the high-side switch are turned off, the switching node is switched to the output voltage level, the bootstrap node is switched to a second voltage level generated according to the output voltage level and the preset voltage value, the bootstrap capacitor discharges to the bootstrap node so that the bootstrap node is reduced from the second voltage level to a third voltage level, and the charging switch and the second unidirectional conduction switch are switched from the off state to the on state when the bootstrap node is reduced to the third voltage level, so as to maintain the bootstrap node at the third voltage level. The conduction threshold voltage is determined by the critical voltage of the charging switch and the conduction voltage of the second unidirectional conduction switch, and the preset limit voltage value is equal to the constant voltage of the voltage source minus the conduction threshold voltage of the charging switch circuit.
[0009] In some embodiments, while the high-side switch is turned on, the switching node is switched to the input voltage level, and the bootstrap node is switched to a fourth voltage level generated based on the input voltage level and the preset voltage value, so that the first unidirectional conduction switch, the charging switch, and the second unidirectional conduction switch are all switched to the off state, and the bootstrap capacitor discharges to the bootstrap node.
[0010] In some embodiments, the drive circuit includes a driver, a low-side buffer circuit and a high-side buffer circuit. The driver is used to receive the control signal and to output a low-side drive signal and a high-side drive signal according to the control signal. The signal input end of the low-side buffer circuit is coupled to the driver to receive the low-side drive signal, the signal output end of the low-side buffer circuit is coupled to the low-side switch, the power supply end of the low-side buffer circuit is coupled to the first power supply signal, and the ground end of the low-side buffer circuit is coupled to the ground signal. The signal input end of the high-side buffer circuit is coupled to the driver to receive the high-side drive signal, the signal output end of the high-side buffer circuit is coupled to the high-side switch, the power supply end of the high-side buffer circuit is coupled to the bootstrap node, and the ground end of the high-side buffer circuit is coupled to the switching node. The high-side switch is also coupled to the input signal, the low-side switch is also coupled to the ground signal, the switching node is coupled to the load node through an inductor element, and the driver circuit drives the switch circuit to generate an output signal at the load node. During the period when the low-side switch is on, the switching node switches to the voltage level of the ground signal, during the period when the high-side switch is on, the switching node switches to the voltage level of the input signal, and during the period when both the low-side switch and the high-side switch are off, the switching node switches to the voltage level of the output signal.
[0011] Another aspect of the utility model is a bootstrap circuit. The bootstrap circuit is applicable to a power stage circuit including a driving circuit, a high-side switch and a low-side switch, and includes a bootstrap capacitor, a first pre-charge circuit and a second pre-charge circuit. The bootstrap capacitor is coupled to a switching node and a bootstrap node of the power stage circuit, wherein the high-side switch and the low-side switch are coupled to the switching node, and the driving circuit is coupled to the switching node and the bootstrap node. The first pre-charge circuit is coupled to the bootstrap node, and is used to charge the bootstrap capacitor during the period when the low-side switch is turned on, so as to increase the voltage difference across the bootstrap capacitor to a preset voltage value. The second pre-charging circuit is coupled to the switching node and the bootstrap node, and is used to charge the bootstrap capacitor when the voltage difference decreases from the preset voltage value to the preset limit voltage value during the period when both the low-side switch and the high-side switch are turned off, so as to maintain the voltage difference at the preset limit voltage value, wherein the second pre-charging circuit includes a voltage source and a charging switch circuit, the voltage source is coupled to the switching node, the charging switch circuit is coupled to the voltage source and the bootstrap node, and wherein the preset limit voltage value is determined according to the constant voltage of the voltage source and the conduction critical voltage of the charging switch circuit.
[0012] In summary, by maintaining the voltage difference between the two ends of the bootstrap capacitor at a preset limit voltage value in the discontinuous conduction mode, the driving circuit can drive the high-side switch to switch to the on state through the high-side driving signal of the enable level when the high-side switch needs to be turned on later, without encountering the problem that the high-side switch cannot be turned on due to excessive discharge of the bootstrap capacitor. Therefore, the power stage circuit and the bootstrap circuit of the utility model have advantages such as high stability. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 The invention is a block diagram of a power stage circuit and a control circuit thereof according to some embodiments of the invention.
[0014] Figure 2A The following is a timing diagram of some signals related to the power stage circuit according to some embodiments of the present invention.
[0015] Figure 2B for Figure 2A Zoomed in timing diagram of some signals in .
[0016] Figure 3 The present invention is a flowchart of a method for driving a bootstrap circuit in a power stage circuit according to some embodiments of the present invention.
[0017] Figure 4 It is a circuit diagram of a second pre-charging circuit according to some embodiments of the present utility model.
[0018] Figure 5 It is a circuit diagram of a second pre-charging circuit according to some embodiments of the present utility model. DETAILED DESCRIPTION
[0019] The following embodiments are described in detail with reference to the accompanying drawings, but the specific embodiments described are only used to explain the present invention and are not used to limit the present invention. The description of the structural operation is not used to limit the order of its execution. Any structure recombined by the elements to produce a device with equal functions is within the scope of the present invention.
[0020] The terms used throughout the specification and claims generally have the ordinary meanings of each term used in the art, in the context of this disclosure, and in the specific context, unless otherwise noted.
[0021] As used herein, “coupled” or “connected” may refer to direct physical or electrical contact between two or more elements, or indirect physical or electrical contact between two or more elements, or may refer to mutual operation or action between two or more elements.
[0022] See also Figure 1 , Figure 1The power stage circuit 100 and the control circuit 20 are circuit block diagrams according to some embodiments of the present invention. In some embodiments, the power stage circuit 100 and the control circuit 20 may constitute a power converter circuit, such as a DC / DC converter, a single-phase or multi-phase buck converter, etc. The power stage circuit 100 may be coupled to a load node NL via an inductor element L, and the load node NL may be electrically coupled to a load device (not shown), such as a central processing unit (CPU), etc. In this way, the power converter circuit composed of the power stage circuit 100 and the control circuit 20 may supply power to the load device.
[0023] In some embodiments, such as Figure 1 As shown, the power stage circuit 100 includes a switch circuit 11, a drive circuit 13 and a bootstrap circuit 15. The switch circuit 11 includes a high-side switch QH and a low-side switch QL. The high-side switch QH is coupled to the input signal VIN and the switching node SW of the power stage circuit 100, and the low-side switch QL is coupled to the switching node SW and the ground signal GND. In addition, the switching node SW is coupled to the load node NL through the inductor element L. Specifically, the high-side switch QH and the low-side switch QL can each be implemented by a transistor (e.g., an N-type metal oxide semiconductor transistor, etc.), but the utility model is not limited thereto.
[0024] like Figure 1 As shown, the driving circuit 13 includes a driver 131, a high-side buffer circuit BH and a low-side buffer circuit BL. The driver 131 is coupled to the control circuit 20, and is used to receive the control signal PWM output by the control circuit 20, and is used to output the high-side driving signal GH and the low-side driving signal GL according to the control signal PWM. The signal input end of the high-side buffer circuit BH is coupled to the driver 131 to receive the high-side driving signal GH, and the signal output end of the high-side buffer circuit BH is coupled to the high-side switch QH. The signal input end of the low-side buffer circuit BL is coupled to the driver 131 to receive the low-side driving signal GL, and the signal output end of the low-side buffer circuit BL is coupled to the low-side switch QL. It can be seen from the description of the driving circuit 13 above that in some embodiments, the driving circuit 13 is coupled to the high-side switch QH and the low-side switch QL, and is coupled to the control circuit 20.
[0025] In the above embodiment, the driver 131 can be implemented by one or more gate drivers, and the high-side buffer circuit BH and the low-side buffer circuit BL can each be implemented by one or more buffer amplifiers. In other words, the high-side drive signal GH and the low-side drive signal GL can be buffered to the gate terminal of the transistor in the high-side switch QH and the gate terminal of the transistor in the low-side switch QL, respectively.
[0026] In some embodiments, the driving circuit 13 is used to drive the low-side switch QL and the high-side switch QH to be turned on alternately according to the control signal PWM. Specifically, the control signal PWM may be a periodic signal, such as a pulse width modulation signal. Figure 2A The operation of the driving circuit 13 driving the switch circuit 11 is further described. Figure 2A It is a timing diagram of some signals related to the power stage circuit 100 according to some embodiments of the present invention.
[0027] In some embodiments, such as Figure 2A As shown, during the period when the power stage circuit 100 operates in a continuous-conduction mode (CCM) (eg, Figure 2A During the periods P1-P2 and P4-P5), the high-side drive signal GH and the low-side drive signal GL output according to the control signal PWM are also periodic signals. The high-side drive signal GH and the control signal PWM are substantially in phase with each other. For example, when the high-side drive signal GH is at the enable level (e.g. Figure 2A , the control signal PWM may also be at the enable level. The high-side drive signal GH (or the control signal PWM) and the low-side drive signal GL are substantially inversely proportional to each other. For example, when the high-side drive signal GH is at the disable level (e.g. Figure 2A When the high-side drive signal GH and the low-side drive signal GL are at the low voltage level shown in the figure), the low-side drive signal GL may be at the enable level. Specifically, the enable level is a voltage level that can turn on the high-side switch QH or the low-side switch QL, and the disable level is a voltage level that can turn off the high-side switch QH or the low-side switch QL. As can be seen from the above description, the high-side switch QH and the low-side switch QL will be turned on alternately by the high-side drive signal GH and the low-side drive signal GL.
[0028] When the high-side switch QH and the low-side switch QL are turned on alternately, a voltage signal SSW is generated at the switching node SW. Figure 2A It can be seen that the voltage level of the voltage signal SSW switches between the voltage level of the input signal VIN and the voltage level of the ground signal GND according to the timing. Figure 1 In the embodiment of the present invention, the capacitor element COUT is coupled between the load node NL and the ground signal GND to form a circuit with the inductor element L, such as a low-pass filter circuit. This circuit can be used to process the voltage signal SSW to generate an output signal VOUT at the load node NL. In short, the drive circuit 13 can be used to drive the switch circuit 11 to generate an output signal VOUT at the load node NL. It should be understood that the power converter circuit composed of the power stage circuit 100 and the control circuit 20 can supply power to the load device through the output signal VOUT.
[0029] It is noted that the driving circuit 13 is not limited to driving the high-side switch QH and the low-side switch QL to be turned on alternately. In some embodiments, the power stage circuit 100 can be controlled by the control circuit 20 to operate in a discontinuous conduction mode (DCM). During the discontinuous conduction mode (e.g., period P3), the driving circuit 13 switches both the high-side driving signal GH and the low-side driving signal GL to a disable level to turn off both the high-side switch QH and the low-side switch QL.
[0030] According to the description of the driving circuit 13, the power terminal of the low-side buffer circuit BL is coupled to the power signal VCC, and the ground terminal of the low-side buffer circuit BL is coupled to the ground signal GND. Since the voltage level of the power signal VCC and the voltage level of the ground signal GND are stable, the low-side buffer circuit BL can stably buffer the low-side driving signal GL to the low-side switch QL to ensure that the low-side switch QL is turned on or off at a preset time.
[0031] The power supply terminal of the high-side buffer circuit BH is coupled to the bootstrap node BT of the power stage circuit 100, and the ground terminal of the high-side buffer circuit BH is coupled to the switch node SW. It is noted that the power supply terminal of the high-side buffer circuit BH cannot be directly coupled to the power supply signal VCC like the low-side buffer circuit BL. If the power supply terminal of the high-side buffer circuit BH is directly coupled to the power supply signal VCC, then because the voltage signal SSW at the switch node SW (i.e., the ground terminal of the high-side buffer circuit BH) will switch to the voltage level of the input signal VIN when the high-side switch QH is turned on, the high-side buffer circuit BH will not be able to buffer the high-side drive signal GH to the high-side switch QH, and the high-side switch QH will be turned off. In view of this, the power stage circuit 100 needs the help of the bootstrap circuit 15 to control the voltage difference between the bootstrap node BT and the switch node SW to ensure that the high-side buffer circuit BH can buffer the high-side drive signal GH to the high-side switch QH at a preset time (i.e., ensure that the high-side switch QH is turned on at a preset time).
[0032] Please refer again Figure 1 , the bootstrap circuit 15 includes a bootstrap capacitor CBT, a precharge circuit 151, and a precharge circuit 153. The bootstrap capacitor CBT is coupled to the switching node SW and the bootstrap node BT. The precharge circuit 151 is coupled to the bootstrap node BT. In addition, the precharge circuit 153 is also coupled to the switching node SW and the bootstrap node BT. From the above description of the bootstrap circuit 15, the high-side buffer circuit BH, and the low-side buffer circuit BL, it can be seen that in some embodiments, the bootstrap circuit 15 is coupled to the switch circuit 11 and the drive circuit 13.
[0033] In some further embodiments, the pre-charging circuit 151 includes a unidirectional conduction switch D1. Specifically, the unidirectional conduction switch D1 can be implemented by a diode. A first end of the unidirectional conduction switch D1 (e.g., an anode end of the diode) is coupled to the power signal VCC, and a second end of the unidirectional conduction switch D1 (e.g., a cathode end of the diode) is coupled to the bootstrap node BT.
[0034] When operated in forward bias, the unidirectional conduction switch D1 is switched to the on state, so that the voltage difference across the unidirectional conduction switch D1 becomes the on-state voltage V of the unidirectional conduction switch D1. OND1 In this embodiment, the unidirectional conduction switch D1 is implemented by a Schottky diode, and its conduction voltage V OND1 For example, 0.2 V. When the unidirectional conduction switch D1 is in the on state, current can flow from the first end of the unidirectional conduction switch D1 to the second end of the unidirectional conduction switch D1. When operating with a reverse bias, the unidirectional conduction switch D1 is switched to the off state, which causes the current to be unable to flow from the first end of the unidirectional conduction switch D1 to the second end of the unidirectional conduction switch D1.
[0035] Furthermore, the pre-charge circuit 153 includes a voltage source SV and a charging switch circuit 531, wherein the charging switch circuit 531 includes a charging switch QA and a unidirectional conduction switch D2. Specifically, the unidirectional conduction switch D2 can be implemented by a diode, and the charging switch QA can be implemented by a transistor (such as an N-type metal oxide semiconductor transistor). In this embodiment, the unidirectional conduction switch D2 is implemented by a Schottky diode, and its conduction voltage V OND2 For example, it is 0.2 volts. In addition, in one embodiment, when the charging switch QA is implemented by an N-type metal oxide semiconductor transistor, its threshold voltage V THQA For example, 0.7 volts. The voltage source SV is coupled to the switching node SW, and is coupled to the control end of the charging switch QA (for example, the gate end of the transistor) at the node NG. The first end of the charging switch QA (for example, the drain end of the transistor) is coupled to the power signal VEE. The first end of the unidirectional conduction switch D2 (for example, the anode end of the diode) and the second end of the charging switch QA (for example, the source end of the transistor) are coupled to the node NS, and the second end of the unidirectional conduction switch D2 (for example, the cathode end of the diode) is coupled to the bootstrap node BT. As can be seen from the above description, in some embodiments, the voltage source SV is coupled to the switching node SW, the charging switch circuit 531 is coupled to the voltage source SV at the node NG and coupled to the power signal VEE and the bootstrap node BT, and the charging switch QA is coupled between the voltage source SV, the power signal VEE and the bootstrap node BT. In an embodiment of the present invention, the conduction threshold voltage of the charging switch circuit 531 is determined by the threshold voltage V THQA With the on-state voltage V OND2In one embodiment, the charge switch circuit 531 has a threshold voltage equal to the threshold voltage V THQA Add the on-state voltage V OND2 , for example 0.9 volts.
[0036] In some embodiments, the voltage level of the power signal VEE is greater than the voltage level of the power signal VCC. In other embodiments, the voltage level of the power signal VEE is greater than the sum of the voltage level of the output signal VOUT and the preset limit voltage value VLIM. For example, the voltage level of the power signal VEE can be the same as the voltage level of the input signal VIN. In an embodiment of the present invention, the preset limit voltage value VLIM is determined by the constant voltage VBS of the voltage source SV, the threshold voltage V THQA And the conduction voltage V of the unidirectional conduction switch D2 OND2 In one embodiment, the preset limit voltage value VLIM is determined by the constant voltage VBS of the voltage source SV and the threshold voltage V THQA With the on-state voltage V OND2 (i.e., the conduction threshold voltage of the charging switch circuit 531, for example, 0.9 volts). Figure 2A As shown, the preset limit voltage value VLIM is equal to the constant voltage VBS minus the conduction threshold voltage of the charging switch circuit 531. For example, when the constant voltage VBS is 5V, the preset limit voltage value VLIM is 4.1V.
[0037] Similarly, when operated in a forward bias, the unidirectional conduction switch D2 is switched to an on state. In this case, current can flow from the first end of the unidirectional conduction switch D2 to the second end of the unidirectional conduction switch D2. When operated in a reverse bias, the unidirectional conduction switch D2 is switched to an off state, which causes the current to be unable to flow from the first end of the unidirectional conduction switch D2 to the second end of the unidirectional conduction switch D2.
[0038] When the voltage drop between the node NG and the bootstrap node BT is greater than or equal to the turn-on threshold voltage of the charging switch circuit 531 (which is equal to the threshold voltage V THQA Add the on-state voltage V OND2 , for example, 0.9V), the charging switch QA and the unidirectional conduction switch D2 are switched to the on state, so that current can flow between the first end of the charging switch QA and the bootstrap node BT. When the voltage drop between the node NG and the bootstrap node BT is less than the turn-on threshold voltage, the charging switch QA and the unidirectional conduction switch D2 are switched to the off state, so that current cannot flow between the first end of the charging switch QA and the bootstrap node BT.
[0039] Then match Figure 2A , Figure 2B and Figure 3The operation of the bootstrap circuit 15 will be further described. Figure 2B for Figure 2A An enlarged diagram of the voltage signal SBT at the bootstrap node BT and the voltage difference ΔVBT across the bootstrap capacitor CBT. Figure 3 FIG. 3 is a flow chart of a driving method 300 according to some embodiments of the present invention. In some embodiments, Figure 3 As shown, the driving method 300 includes a plurality of operations S301 - S303 , but the present invention is not limited thereto.
[0040] In operation S301 , during the period P1 when the low-side switch QL is turned on, the bootstrap capacitor CBT is charged by the pre-charging circuit 151 to increase the voltage difference ΔVBT across the bootstrap capacitor CBT (ie, the voltage difference between the bootstrap node BT and the switching node SW) to a preset voltage value VPS1 .
[0041] During period P1, if Figure 2A As shown, the voltage level of the voltage signal SSW at the switching node SW (i.e., the voltage level of the switching node SW) is switched to the voltage level of the ground signal GND (i.e., the ground voltage level). At the beginning of the period P1, the voltage level of the voltage signal SBT at the bootstrap node BT (i.e., the voltage level of the bootstrap node BT) is the voltage level of the ground signal GND plus the voltage difference ΔVBT, and is less than the voltage level of the power signal VCC, so that the unidirectional conduction switch D1 is operated in a forward bias. In this way, the voltage level of the voltage signal SBT is switched to the voltage level of the power signal VCC minus the conduction voltage V of the unidirectional conduction switch D1. OND1 (Right now, Figure 2A As shown in Figure 1, the voltage level V1 is Figure 2B As shown, since the voltage difference ΔVBT does not reach the voltage level V1 minus the voltage level of the ground signal GND (i.e., the preset voltage value VPS1), the pre-charging circuit 151 charges the bootstrap capacitor CBT to increase the voltage difference ΔVBT to the preset voltage value VPS1. It should be understood that when the voltage level of the ground signal GND is substantially 0 volts, the preset voltage value VPS1 is equivalent to the voltage level of the power signal VCC minus the turn-on voltage VPS1 of the unidirectional conduction switch D1. OND1 , that is, the preset voltage value VPS1 is equal to the voltage level V1.
[0042] In addition, from Figure 1 and Figure 2AIt can be seen that during period P1, the voltage level of node NG is the voltage level of ground signal GND (i.e., the voltage level of voltage signal SSW at switching node SW) plus constant voltage VBS. In some embodiments, constant voltage VBS is equal to or close to the voltage level of power signal VCC (e.g., 5V). Also, as described above, the voltage level of voltage signal SBT is voltage level V1. That is, the difference between the voltage level of node NG and the voltage level of voltage signal SBT (which is approximately equal to the on-state voltage V OND1 ) is less than the turn-on threshold voltage, therefore, the charging switch QA and the unidirectional conduction switch D2 in the pre-charging circuit 153 are both turned off, so that the pre-charging circuit 153 stops charging the bootstrap capacitor CBT during the period P1.
[0043] In some practical applications, during period P1 , the voltage level of the voltage signal SSW at the switching node SW is 0V, the voltage level of the voltage signal SBT at the bootstrap node BT is 4.8V, the preset voltage value VPS1 is 4.8V, and the voltage level of the node NG is 5V.
[0044] In operation S302 , during the period P2 when the high-side switch QH is turned on, the bootstrap node BT is discharged through the bootstrap capacitor CBT.
[0045] During period P2, if Figure 2A As shown, the voltage signal SSW at the switching node SW (i.e., the voltage level of the switching node SW) switches to the voltage level of the input signal VIN (i.e., the input voltage level). Figure 2B As shown, the voltage level of the voltage signal SBT at the bootstrap node BT (i.e., the voltage level of the bootstrap node BT) is switched to the voltage level of the input signal VIN (e.g., 12V) plus the voltage difference ΔVBT (i.e., Figure 2B Therefore, the voltage level of the voltage signal SBT is greater than the voltage level of the power signal VCC, so that the unidirectional conduction switch D1 is reverse biased and switched to the off state.
[0046] In addition, during the period P2, the voltage level of the node NG is the voltage level of the input signal VIN (i.e., the voltage level of the voltage signal SSW at the switching node SW) plus the constant voltage VBS. Moreover, as described above, the voltage level of the voltage signal SBT at the bootstrap node BT is the voltage level V2, and is slightly lower than the voltage level of the node NG. In other words, the difference between the voltage level of the node NG and the voltage level of the voltage signal SBT is still lower than the turn-on threshold voltage. Therefore, the charging switch QA and the unidirectional conduction switch D2 in the pre-charging circuit 153 are both turned off.
[0047] In short, during the period P2, the voltage signal SBT at the bootstrap node BT is switched to the voltage level V2, so that the unidirectional conduction switch D1, the charging switch QA and the unidirectional conduction switch D2 are all switched to the off state. In other words, the pre-charging circuit 151 and the pre-charging circuit 153 stop charging the bootstrap capacitor CBT during the period P2. In this way, the bootstrap capacitor CBT discharges to the bootstrap node BT (the voltage difference ΔVBT is correspondingly reduced) to supply power to the high-side buffer circuit BH in the driving circuit 13.
[0048] In some practical applications, during the period P2 , the voltage level of the voltage signal SSW at the switching node SW is 12V, the voltage level of the voltage signal SBT at the bootstrap node BT is 16.8V, and the voltage level of the node NG is 17V.
[0049] In some embodiments, the control circuit 20 controls the power stage circuit 100 to operate in the discontinuous conduction mode. Therefore, operation S303 is performed.
[0050] In operation S303, during period P3 when both the low-side switch QL and the high-side switch QH are turned off, when the voltage difference ΔVBT across the bootstrap capacitor CBT decreases from the preset voltage value VPS1 to the preset limit voltage value VLIM, the bootstrap capacitor CBT is charged by the pre-charging circuit 153 to maintain the voltage difference ΔVBT across the bootstrap capacitor CBT at the preset limit voltage value VLIM.
[0051] During period P3, if Figure 2A As shown, the voltage level of the voltage signal SSW at the switching node SW (i.e., the voltage level of the switching node SW) is switched to the voltage level of the output signal VOUT (i.e., the output voltage level). Figure 2B As shown, the voltage level of the voltage signal SBT at the bootstrap node BT (i.e., the voltage level of the bootstrap node BT) is switched to the voltage level of the output signal VOUT (e.g., 3.3V) plus the voltage difference ΔVBT (i.e., Figure 2B Therefore, the voltage level of the voltage signal SBT is greater than the voltage level of the power signal VCC, so that the unidirectional conducting switch D1 is operated in reverse bias.
[0052] In addition, at the beginning of period P3, the voltage level of node NG is the voltage level of output signal VOUT (i.e., the voltage level of voltage signal SSW at switching node SW) plus constant voltage VBS. Also, as described above, the voltage level of voltage signal SBT at bootstrap node BT is the voltage level of output signal VOUT plus preset voltage value VPS1 (i.e., Figure 2BThe voltage level V3 shown in FIG. 1 is slightly lower than the voltage level of the node NG. That is, the difference between the voltage level of the node NG and the voltage level of the voltage signal SBT is still lower than the turn-on threshold voltage. Therefore, the charging switch QA and the unidirectional conduction switch D2 in the pre-charging circuit 153 are both turned off.
[0053] In short, at the beginning of period P3, the voltage signal SBT at the bootstrap node BT is switched to the voltage level V3, so that the unidirectional conduction switch D1, the charging switch QA and the unidirectional conduction switch D2 are all switched to the off state. In this way, the bootstrap capacitor CBT discharges to the bootstrap node BT (the voltage difference ΔVBT decreases accordingly), so that the voltage level of the voltage signal SBT starts to decrease from the voltage level V3.
[0054] In some practical applications, at the beginning of the period P3, the voltage level of the voltage signal SSW at the switching node SW is 3.3V, the voltage level of the voltage signal SBT at the bootstrap node BT is 8.1V, and the voltage level of the node NG is 8.3V.
[0055] Based on the above description, when the bootstrap capacitor CBT continues to discharge to the bootstrap node BT, Figure 2B As shown in FIG. 1 , the voltage difference ΔVBT gradually decreases, and the voltage level of the voltage signal SBT gradually decreases. When the voltage difference ΔVBT decreases to the preset limit voltage value VLIM (e.g. Figure 2A and Figure 2B At the time point T1 shown in FIG. 1 , the voltage level of the voltage signal SBT at the bootstrap node BT drops to the voltage level of the output signal VOUT plus the voltage difference ΔVBT which is substantially the preset limit voltage value VLIM (ie, Figure 2B , the voltage level V4 shown). Also, as described above, the voltage level of the node NG is the voltage level of the output signal VOUT plus the constant voltage VBS. Therefore, the difference between the voltage level of the node NG and the voltage level of the voltage signal SBT is substantially equal to the turn-on threshold voltage. At this time, the charging switch QA and the unidirectional conduction switch D2 in the pre-charging circuit 153 are both switched from the off state to the on state. In other words, the pre-charging circuit 153 can start charging the bootstrap capacitor CBT (the voltage difference ΔVBT stops decreasing correspondingly), so that the voltage level of the voltage signal SBT is maintained at the voltage level V4. It should be understood that the voltage difference ΔVBT also drops from the preset voltage value VPS1 to the preset limit voltage value VLIM, and then maintains at the preset limit voltage value VLIM. In addition, during period P3, the bootstrap capacitor CBT discharges to the bootstrap node BT until the voltage difference ΔVBT drops from the preset voltage value VPS1 to the preset limit voltage value VLIM.
[0056] Based on the description of the above period P3 and Figure 2BIt can be seen that the difference between the preset voltage value VPS1 and the preset limit voltage value VLIM is substantially the critical voltage V THQA Therefore, the voltage level of the voltage signal SBT at the bootstrap node BT is reduced from the voltage level V3 to the voltage level V4, which is equivalent to reducing the threshold voltage V of the charging switch QA. THQA That is, the voltage level V4 is equal to the voltage level V3 minus the threshold voltage V of the charging switch QA. THQA In addition, the charging switch QA and the unidirectional conduction switch D2 reduce the critical voltage V at the bootstrap node BT. THQA Switches from the off state to the on state.
[0057] In some practical applications, during period P3, when the charging switch QA and the unidirectional conduction switch D2 are both turned on, the voltage level of the voltage signal SSW at the switching node SW is 3.3 volts, the voltage level of the voltage signal SBT at the bootstrap node BT is 7.4 volts, the preset limit voltage value VLIM is 4.1 volts, and the voltage level of the node NG is 8.3 volts.
[0058] It is worth noting that by maintaining the voltage difference ΔVBT across the bootstrap capacitor CBT at the preset limit voltage value VLIM in the discontinuous conduction mode, the driving circuit 13 can be turned on when the high-side switch QH needs to be turned on later (for example, Figure 2A and Figure 2B The period P4 immediately following the period P3 is shown as driving the high-side switch QH to switch to the on state through the high-side driving signal GH at the enable level, and the problem of the high-side switch QH failing to turn on due to excessive discharge of the bootstrap capacitor CBT will not be encountered. Therefore, the power stage circuit 100, the bootstrap circuit 15 and the driving method 300 of the utility model have advantages such as high stability.
[0059] During period P4, the pre-charging circuit 151 and the pre-charging circuit 153 do not charge the bootstrap capacitor CBT (similar to the description of period P2), and the bootstrap capacitor CBT is discharged to the bootstrap node BT. Figure 2B As shown, the voltage difference ΔVBT across the bootstrap capacitor CBT decreases from the preset limit voltage value VLIM. Then, in the period P5 immediately following the period P4, the pre-charge circuit 151 charges the bootstrap capacitor CBT (similar to the description of the period P1). Figure 2B As shown, the voltage difference ΔVBT across the bootstrap capacitor CBT increases toward the preset voltage value VPS1. It should be understood that at the end of period P5, the voltage difference ΔVBT begins to decrease again before reaching the preset voltage value VPS1 because the high-side switch QH is switched to the on state.
[0060] In the above embodiment, during the period P2 or the period P4, the voltage level of the voltage signal SBT at the bootstrap node BT (i.e., the voltage level of the bootstrap node BT) may be higher than the voltage level of the power signal VEE (in some embodiments, the voltage level of the power signal VEE is equal to the voltage level of the input signal VIN). At this time, the unidirectional conduction switch D2 in the pre-charging circuit 153 may be reverse biased to prevent current from flowing from the bootstrap node BT to the power signal VEE.
[0061] In the above embodiment, the charging switch QA and the unidirectional conduction switch D2 are controlled by the voltage source SV to be turned on or off in order to avoid the bootstrap capacitor CBT being directly charged by the power signal VEE. If the bootstrap capacitor CBT is directly charged by the power signal VEE, the high-side buffer circuit BH may be burned due to the excessive voltage difference ΔVBT.
[0062] Then match Figure 4 and Figure 5 The circuit structure of the precharge circuit 153 in the bootstrap circuit 15 is further described. Figure 4 and Figure 5 2 are schematic circuit diagrams of the pre-charging circuit 153 according to some embodiments of the present invention.
[0063] In some embodiments, such as Figure 4 As shown, Figure 1 The voltage source SV of the pre-charge circuit 153 is realized by a current source 41 and a resistor element 43. Specifically, the current source 41 is coupled to the power signal VEE and the node NG, and the resistor element 43 is coupled to the node NG and the switch node SW. The current source 41 is used to provide a constant current IB1 to the node NG. The constant current IB1 passes through the node NG, the resistor element 43 and the switch node SW in sequence to form a constant voltage VBS between the two ends of the resistor element 43. In this embodiment, the voltage level of the power signal VEE is greater than the sum of the voltage level of the output signal VOUT and the constant voltage VBS.
[0064] In some embodiments, such as Figure 5 As shown, Figure 1 The voltage source SV of the pre-charge circuit 153 is realized by a current source 51 and a transistor circuit 53. Specifically, the current source 51 is coupled to the power signal VEE and the node NG, and the transistor circuit 53 is coupled to the node NG and the switching node SW, and includes n transistors QB. The drain terminal and the gate terminal of each transistor QB are coupled to each other, and the n transistors QB are cascaded to each other. The current source 51 is used to provide a constant current IB2 to bias the n transistors QB, so that a constant voltage VBS is formed between the node NG and the switching node SW. It should be understood that Figure 5The constant voltage VBS in is n times the critical voltage of transistor QB.
[0065] Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Those skilled in the art may make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the definition of the attached claims.
[0066]
Explanation of symbols
[0067] 11: Switching circuit
[0068] 13: Driving circuit
[0069] 15: Bootstrap Circuit
[0070] 20: Control circuit
[0071] 41,51: Current source
[0072] 43:Resistor
[0073] 53: Transistor Circuit
[0074] 100: Power stage circuit
[0075] 131:Drive
[0076] 151: Pre-charge circuit
[0077] 153: Pre-charge circuit
[0078] 300: Driving method
[0079] 531: Charging switch circuit
[0080] BH: High-side buffer circuit
[0081] BL: Low-side buffer circuit
[0082] BT: Bootstrap Node
[0083] CBT: Bootstrap Capacitor
[0084] COUT: Capacitor element
[0085] D1: One-way conduction switch
[0086] D2: One-way conduction switch
[0087] GH: High side drive signal
[0088] GL: low side drive signal
[0089] GND: Ground signal
[0090] IB1, IB2: Constant current
[0091] L: Inductor
[0092] NG,NS: Node
[0093] NL: Load Node
[0094] P1,P2,P3,P4,P5: Period
[0095] PWM: control signal
[0096] QA: Charging switch
[0097] QB: Transistor
[0098] QH: High-side switch
[0099] QL: Low-side switch
[0100] S301~S303: Operation
[0101] SBT,SSW: voltage signal
[0102] SV: Voltage Source
[0103] SW: Switch Node
[0104] T1: Time point
[0105] V1, V2, V3, V4: voltage level
[0106] VBS: Constant voltage
[0107] ΔVBT: Voltage difference
[0108] VCC: power signal
[0109] VEE: power signal
[0110] VIN: Input signal
[0111] VLIM: preset limit voltage value
[0112] VOUT: output signal
[0113] V OND1 ,V OND2 : On-state voltage
[0114] VPS1: Preset voltage value
[0115] V THQA : critical voltage.
Claims
1. A power stage circuit, characterized in that: Include: A switch circuit, comprising a low-side switch and a high-side switch, wherein the low-side switch and the high-side switch are coupled to a switching node of the power stage circuit; A driving circuit coupled to the low-side switch and the high-side switch and used for driving the low-side switch and the high-side switch to be turned on alternately according to a control signal; as well as A bootstrap circuit is coupled to the switch circuit and the drive circuit, and includes a bootstrap capacitor and a first pre-charging circuit, wherein the bootstrap capacitor is coupled to the switch node and the bootstrap node of the power stage circuit, wherein the first pre-charging circuit includes a charging switch circuit and a voltage source, the voltage source is coupled to the switch node, and the charging switch circuit is coupled to the voltage source and the bootstrap node, wherein during the period when both the low-side switch and the high-side switch are turned off, the first pre-charging circuit is used to charge the bootstrap capacitor when the voltage difference across the bootstrap capacitor decreases from a preset voltage value to a preset limit voltage value, so that the voltage difference is maintained at the preset limit voltage value, and The preset limiting voltage value is determined according to the constant voltage of the voltage source and the conduction critical voltage of the charging switch circuit.
2. The power stage circuit according to claim 1, characterized in that: The charging switch circuit includes a charging switch and a unidirectional conduction switch, wherein the charging switch and the unidirectional conduction switch are coupled between the voltage source, the power signal and the bootstrap node. wherein during the period when both the low-side switch and the high-side switch are turned off, the bootstrap capacitor discharges to the bootstrap node until the voltage difference decreases from the preset voltage value to the preset limit voltage value, and the charging switch and the unidirectional conduction switch are switched from the off state to the on state when the voltage difference decreases to the preset limit voltage value, so that the bootstrap capacitor is charged, The conduction threshold voltage is determined by the threshold voltage of the charging switch and the conduction voltage of the unidirectional conduction switch, and the preset limit voltage value is equal to the constant voltage of the voltage source minus the conduction threshold voltage of the charging switch circuit.
3. The power stage circuit according to claim 1, characterized in that: The preset limiting voltage value is equal to the constant voltage of the voltage source minus the conduction critical voltage of the charging switch circuit.
4. The power stage circuit according to claim 1, characterized in that: The bootstrap circuit further comprises a second pre-charging circuit, and the second pre-charging circuit is coupled to the bootstrap node and is used to charge the bootstrap capacitor during the period when the low-side switch is turned on, so as to increase the voltage difference to the preset voltage value. The first pre-charging circuit and the second pre-charging circuit are used to stop charging the bootstrap capacitor when the high-side switch is turned on.
5. The power stage circuit according to claim 1, characterized in that: The bootstrap circuit further includes a first unidirectional conduction switch, and the first unidirectional conduction switch is coupled to the first power signal and the bootstrap node. During the period when the low-side switch is turned on, the switching node is switched to the ground voltage level, the first unidirectional conductive switch is switched from the off state to the on state to switch the bootstrap node to the first voltage level, and the bootstrap capacitor is charged according to the first voltage level and the ground voltage level to increase the voltage difference to the preset voltage value.
6. The power stage circuit according to claim 5, characterized in that: The charging switch circuit further includes a charging switch and a second unidirectional conduction switch, the voltage source is coupled to the switching node and the charging switch, the charging switch is coupled to a second power signal, and the second unidirectional conduction switch is coupled to the charging switch and the bootstrap node. During the period when both the low-side switch and the high-side switch are turned off, the switching node is switched to the output voltage level, the bootstrap node is switched to a second voltage level generated according to the output voltage level and the preset voltage value, the bootstrap capacitor discharges to the bootstrap node so that the bootstrap node decreases from the second voltage level to a third voltage level, and the charging switch and the second unidirectional conduction switch are switched from the off state to the on state when the bootstrap node decreases to the third voltage level so as to maintain the bootstrap node at the third voltage level, The conduction threshold voltage is determined by the threshold voltage of the charging switch and the conduction voltage of the second unidirectional conduction switch, and the preset limit voltage value is equal to the constant voltage of the voltage source minus the conduction threshold voltage of the charging switch circuit.
7. The power stage circuit according to claim 6, characterized in that: During the period when the high-side switch is turned on, the switching node is switched to the input voltage level, and the bootstrap node is switched to a fourth voltage level generated according to the input voltage level and the preset voltage value, so that the first unidirectional conduction switch, the charging switch and the second unidirectional conduction switch are all switched to the off state, and the bootstrap capacitor discharges to the bootstrap node.
8. The power stage circuit according to claim 1, characterized in that: The drive circuit includes: A driver, used for receiving the control signal, and for outputting a low-side driving signal and a high-side driving signal according to the control signal; A low-side buffer circuit, wherein a signal input terminal of the low-side buffer circuit is coupled to the driver to receive the low-side drive signal, a signal output terminal of the low-side buffer circuit is coupled to the low-side switch, a power terminal of the low-side buffer circuit is coupled to a first power signal, and a ground terminal of the low-side buffer circuit is coupled to a ground signal; as well as a high-side buffer circuit, wherein a signal input terminal of the high-side buffer circuit is coupled to the driver to receive the high-side drive signal, a signal output terminal of the high-side buffer circuit is coupled to the high-side switch, a power supply terminal of the high-side buffer circuit is coupled to the bootstrap node, and a ground terminal of the high-side buffer circuit is coupled to the switch node, The high-side switch is also coupled to the input signal, the low-side switch is also coupled to the ground signal, the switching node is coupled to the load node through the inductor element, and the driving circuit drives the switch circuit to generate an output signal at the load node. During the period when the low-side switch is on, the switching node switches to the voltage level of the ground signal, during the period when the high-side switch is on, the switching node switches to the voltage level of the input signal, and during the period when both the low-side switch and the high-side switch are off, the switching node switches to the voltage level of the output signal.
9. A bootstrap circuit, characterized in that: Applicable to power stage circuits including driver circuits, high-side switches and low-side switches, and include: a bootstrap capacitor coupled to a switching node and a bootstrap node of the power stage circuit, wherein the high-side switch and the low-side switch are coupled to the switching node, and the driving circuit is coupled to the switching node and the bootstrap node; A first pre-charging circuit is coupled to the bootstrap node and is used to charge the bootstrap capacitor during the period when the low-side switch is turned on, so as to increase the voltage difference between the two ends of the bootstrap capacitor to a preset voltage value; as well as a second pre-charging circuit coupled to the switching node and the bootstrap node, and configured to charge the bootstrap capacitor when the voltage difference decreases from the preset voltage value to a preset limit voltage value during a period when both the low-side switch and the high-side switch are turned off, so as to maintain the voltage difference at the preset limit voltage value; The second pre-charging circuit includes a voltage source and a charging switch circuit, wherein the voltage source is coupled to the switching node, and the charging switch circuit is coupled to the voltage source and the bootstrap node, and The preset limiting voltage value is determined according to the constant voltage of the voltage source and the conduction critical voltage of the charging switch circuit.
10. The bootstrap circuit according to claim 9, characterized in that: The preset limiting voltage value is equal to the constant voltage of the voltage source minus the conduction critical voltage of the charging switch circuit.