Driving circuit with automatic turn-off function

Abstract

The utility model discloses a drive circuit with an automatic turn-off function. The drive circuit comprises a timer, an oscillating circuit, a logic control circuit, a pre-drive circuit, an H-bridge circuit, a single-chip microcomputer chip, a load, a first input pin, a second input pin, a third input pin, a fourth input pin, a first output pin and a second output pin. The first input pin, the second input pin, the third input pin and the fourth input pin are connected with the single-chip microcomputer chip, and the first output pin and the second output pin are connected with a load; the output end of the logic control circuit is connected with the input end of the pre-drive circuit, and the output end of the pre-drive circuit is connected with the input end of the H-bridge circuit; when the output of the single-chip microcomputer chip is abnormal, the timer overflows to clear data in the logic control circuit, the logic control circuit turns off the output of the pre-drive circuit, and the output of the first output pin and the second output pin is low level. According to the utility model, when the single-chip microcomputer chip outputs abnormally, the driving output is cut off, and the load operation is stopped.

Description

Technical Field

[0001] The utility model relates to the technical field of driver integrated circuits, in particular to a driver circuit with automatic shutdown. Background Art

[0002] The drive circuit is an electronic circuit used to control and drive the operation of other electronic devices or components. The drive circuit is responsible for providing the required voltage, current and signal to the driven device so that it can work in a predetermined manner. In the prior art, coils, relays and brushed motors are mostly driven by MCU and H-bridge circuits or MCU pre-drive circuits and MOS tubes. The above circuits are simple to drive and widely used. However, in the above circuits, the drive output signal is overly dependent on the output signal of the MCU. When the MCU crashes, the program runs away, etc., it will cause the drive circuit output error, which will cause the coils, relays, motors and other loads to perform incorrect actions, resulting in uncontrollable loads. Utility Model Content

[0003] In view of the deficiencies in the prior art, the purpose of the utility model is to provide a driving circuit with automatic shutdown, which is used to shut down the driving output and stop the load operation when the output of the single-chip microcomputer chip is abnormal.

[0004] To achieve the above-mentioned purpose, the utility model provides the following technical solutions: a driving circuit with automatic shutdown, comprising a timer, an oscillation circuit, a logic control circuit, a pre-driving circuit, an H-bridge circuit, a single-chip microcomputer chip, a load, a first input pin, a second input pin, a third input pin, a fourth input pin, a first output pin and a second output pin;

[0005] The first input pin, the second input pin, the third input pin and the fourth input pin are connected to the single-chip microcomputer chip, the first output pin and the second output pin are connected to the load, the first input pin is connected to the input end of the timer, and the second input pin, the third input pin and the fourth input pin are connected to the single-chip microcomputer chip;

[0006] The output end of the oscillation circuit is respectively connected to the input end of the timer and the input end of the logic control circuit, the output end of the timer is connected to the input end of the logic control circuit, the output end of the logic control circuit is connected to the input end of the pre-drive circuit, the output end of the pre-drive circuit is connected to the input end of the H-bridge circuit, and the output end of the H-bridge circuit is respectively connected to the first output pin and the second output pin;

[0007] When the output of the single-chip microcomputer chip is abnormal, the timer overflows to clear the data in the logic control circuit, the logic control circuit turns off the output of the pre-drive circuit, the outputs of the first output pin and the second output pin are low level, and the load stops running.

[0008] Furthermore, the load includes a drive coil, a relay and a brushed motor.

[0009] Further, the H-bridge circuit includes a first MOS tube, a second MOS tube, a third MOS tube and a fourth MOS tube, the gates of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are all connected to the output end of the pre-drive circuit, the source of the first MOS tube is connected to the power supply, the drain of the first MOS tube is connected to the source of the second MOS tube, a first output node is provided between the drain of the first MOS tube and the source of the second MOS tube, the first output node is connected to the first output pin, the drain of the second MOS tube and the drain of the fourth MOS tube are grounded, the source of the third MOS tube is connected to the power supply, the drain of the third MOS tube is connected to the source of the fourth MOS tube, a second output node is provided between the drain of the third MOS tube and the source of the fourth MOS tube, and the second output node is connected to the second output pin.

[0010] Furthermore, the input modes of the first input pin include floating input, pull-down input and pull-up input, and a pull-down resistor is provided inside the first input pin.

[0011] Furthermore, the input modes of the second input pin include floating input, pull-down input and pull-up input, and a pull-down resistor is provided inside the second input pin.

[0012] Furthermore, the input modes of the third input pin include floating input, pull-down input and pull-up input, and a pull-down resistor is provided inside the third input pin.

[0013] Furthermore, the input modes of the fourth input pin include floating input, pull-down input and pull-up input, and a pull-down resistor is provided inside the fourth input pin.

[0014] Beneficial effects of the utility model:

[0015] When the output of the single-chip microcomputer chip is abnormal, the utility model causes the timer to overflow to clear the data in the logic control circuit, thereby causing the logic control circuit to shut down the output of the pre-drive circuit. At this time, the outputs of the first output pin and the second output pin are both low level, so that the load stops running. Therefore, when the single-chip microcomputer chip fails, the drive output is shut down in time to avoid the load from continuing to run, causing the load to be uncontrollable, thereby improving the driving safety of the drive circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a circuit structure diagram of a driving circuit with automatic shutoff in the utility model;

[0017] Figure numerals: 1. timer; 2. oscillation circuit; 3. logic control circuit; 4. pre-drive circuit; 5. H-bridge circuit; 6. single-chip microcomputer chip; 7. load. DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0019] It should be noted that when a component is referred to as being "fixed to" another component, it may be directly on the other component or there may also be a component centered. When a component is considered to be "connected to" another component, it may be directly connected to the other component or there may also be a component centered. When a component is considered to be "set on" another component, it may be directly set on the other component or there may also be a component centered. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art in the technical field of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0021] Please also see Figure 1, this embodiment provides an automatic shutdown driving circuit, including a timer 1, an oscillation circuit 2, a logic control circuit 3, a pre-driving circuit 4, an H-bridge circuit 5, a single-chip microcomputer chip 6, a load 7, a first input pin WD IN, a second input pin INA, a third input pin INB, a fourth input pin WDEN, a first output pin OUTA and a second output pin OUTB;

[0022] The first input pin WD IN, the second input pin INA, the third input pin INB and the fourth input pin WD EN are connected to the single-chip microcomputer chip 6, the first output pin and the second output pin are connected to the load 7, the first input pin WD IN is connected to the input end of the timer 1, the second input pin INA, the third input pin INB and the fourth input pin WD EN are connected to the single-chip microcomputer chip 6;

[0023] The output end of the oscillation circuit 2 is respectively connected to the input end of the timer 1 and the input end of the logic control circuit 3, the output end of the timer 1 is connected to the input end of the logic control circuit 3, the output end of the logic control circuit 3 is connected to the input end of the pre-drive circuit 4, the output end of the pre-drive circuit 4 is connected to the input end of the H-bridge circuit 5, and the output end of the H-bridge circuit 5 is respectively connected to the first output pin OUTA and the second output pin OUTB;

[0024] When the output of the single-chip microcomputer chip 6 is abnormal, the timer 1 overflows to clear the data in the logic control circuit 3, the logic control circuit 3 turns off the output of the pre-drive circuit 4, the outputs of the first output pin OUTA and the second output pin OUTB are low level, and the load 7 stops running.

[0025] Specifically, in this embodiment, the oscillation circuit 2 is used to oscillate and generate a clock signal, and provide a clock signal for the timer 1 and the logic control circuit 3. The timer 1 is used for autonomous timing, and resets the logic control circuit 3 when the timing ends. When the output of the single-chip microcomputer chip 6 is normal, the first input pin WD IN will input a string of data to the timer 1 to clear the timer 1, so that the timer 1 starts timing again from 0. The first input pin WD IN is used to enable the timer 1, and the fourth input pin WD EN is used to enable the logic control chip. The second input pin INA and the third input pin INB are used to input the logic control signal. The pre-drive circuit 4 is used to drive the H-bridge circuit 5, and the H-bridge circuit 5 is used to realize power amplification and provide a large current to the load 7.

[0026]

[0027]

[0028] The level states on each input pin and output pin are shown in the above table. When a low level is input to the fourth input pin WD EN, the logic input from timer 1 to the logic control circuit 3 is invalid, and the signal input from the first input pin WD IN is ignored. When different high and low levels are input to the second input pin INA and the third input pin INB, the output levels of the first output pin OUTA and the second output pin OUTB follow the input levels of the second input pin INA and the third input pin INB. When the second input pin INA and the third input pin INB are simultaneously input with a low level, the outputs of the first output pin OUTA and the second output pin OUTB are both low levels. When the second input pin INA and the third input pin INB are simultaneously input with a high level, the outputs of the first output pin OUTA and the second output pin OUTB are both in a high impedance state.

[0029] When the fourth input pin WD EN inputs a high level, the logic input by the timer 1 to the logic control circuit 3 is valid, the first input pin WD IN inputs the same serial data within a fixed time, and the two half bridges inside the H-bridge circuit 5 are independent, so the output level of the first output pin OUTA follows the input level of the second input pin INA, and the output level of the second output pin OUTB follows the input level of the third input pin INB. When the first input pin WD IN inputs the same serial data and times out, the first output pin OUTA and the second output pin OUTB do not rely on the input signal, and their outputs are low levels.

[0030] In the technical solution, when the output of the single-chip microcomputer chip 6 is abnormal, the first input pin WD IN cannot receive normal serial data. At this time, the timer 1 cannot be reset, and the timer 1 overflows to clear the data in the logic control circuit 3. At this time, the inputs of the second input pin INA and the third input pin INB are invalid, and the logic control circuit 3 turns off the output of the pre-drive circuit 4. At this time, the outputs of the first output pin OUTA and the second output pin OUTB are both low levels, so that the load 7 stops running. Therefore, it is realized that the drive output is turned off in time when the single-chip microcomputer chip 6 fails, so as to avoid the load 7 from continuing to run, causing the load 7 to be uncontrollable, thereby improving the driving safety of the driving circuit.

[0031] Preferably, the load 7 includes a drive coil, a relay and a brushed motor.

[0032] Preferably, the H-bridge circuit 5 includes a first MOS transistor Q1, a second MOS transistor Q2, a third MOS transistor Q3 and a fourth MOS transistor Q4, the gates of the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3 and the fourth MOS transistor Q4 are all connected to the output end of the pre-drive circuit 4, the source of the first MOS transistor Q1 is connected to the power supply, the drain of the first MOS transistor Q1 is connected to the source of the second MOS transistor Q2, a first output node is provided between the drain of the first MOS transistor Q1 and the source of the second MOS transistor Q2, the first output node is connected to the first output pin OUTA, the drain of the second MOS transistor Q2 and the drain of the fourth MOS transistor Q4 are grounded, the source of the third MOS transistor Q3 is connected to the power supply, the drain of the third MOS transistor Q3 is connected to the source of the fourth MOS transistor Q4, a second output node is provided between the drain of the third MOS transistor Q3 and the source of the fourth MOS transistor Q4, and the second output node is connected to the second output pin OUTB.

[0033] Preferably, the input modes of the first input pin WD IN include floating input, pull-down input and pull-up input, and a pull-down resistor is provided inside the first input pin WD IN.

[0034] Preferably, the input modes of the second input pin INA include floating input, pull-down input and pull-up input, and a pull-down resistor is provided inside the second input pin INA.

[0035] Preferably, the input modes of the third input pin INB include floating input, pull-down input and pull-up input, and a pull-down resistor is provided inside the third input pin INB.

[0036] Preferably, input modes of the fourth input pin WD EN include floating input, pull-down input and pull-up input, and a pull-down resistor is provided inside the fourth input pin WD EN.

[0037] The above are only preferred implementations of the utility model. The protection scope of the utility model is not limited to the above embodiments. All technical solutions under the idea of ​​the utility model belong to the protection scope of the utility model. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the utility model should also be regarded as the protection scope of the utility model.

Claims

1. A driving circuit with automatic shutdown, characterized in that: It comprises a timer (1), an oscillating circuit (2), a logic control circuit (3), a pre-driving circuit (4), an H-bridge circuit (5), a single-chip microcomputer chip (6), a load (7), a first input pin, a second input pin, a third input pin, a fourth input pin, a first output pin, and a second output pin; The first input pin, the second input pin, the third input pin and the fourth input pin are connected to the single-chip microcomputer chip (6), the first output pin and the second output pin are connected to the load (7), the first input pin is connected to the input end of the timer (1), and the second input pin, the third input pin and the fourth input pin are connected to the single-chip microcomputer chip (6); The output end of the oscillation circuit (2) is respectively connected to the input end of the timer (1) and the input end of the logic control circuit (3); the output end of the timer (1) is connected to the input end of the logic control circuit (3); the output end of the logic control circuit (3) is connected to the input end of the pre-drive circuit (4); the output end of the pre-drive circuit (4) is connected to the input end of the H-bridge circuit (5); and the output end of the H-bridge circuit (5) is respectively connected to the first output pin and the second output pin; When the output of the single-chip microcomputer chip (6) is abnormal, the timer (1) overflows to clear the data in the logic control circuit (3), the logic control circuit (3) turns off the output of the pre-drive circuit (4), the outputs of the first output pin and the second output pin are at a low level, and the load (7) stops running.

2. The driving circuit with automatic shutdown according to claim 1, characterized in that: The load (7) includes a driving coil, a relay and a brushed motor.

3. The driving circuit with automatic shutdown according to claim 1, characterized in that: The H-bridge circuit (5) comprises a first MOS tube, a second MOS tube, a third MOS tube and a fourth MOS tube, the gates of the first MOS tube, the second MOS tube, the third MOS tube and the fourth MOS tube are all connected to the output end of the pre-drive circuit (4), the source of the first MOS tube is connected to a power supply, the drain of the first MOS tube is connected to the source of the second MOS tube, a first output node is provided between the drain of the first MOS tube and the source of the second MOS tube, the first output node is connected to the first output pin, the drain of the second MOS tube and the drain of the fourth MOS tube are grounded, the source of the third MOS tube is connected to the power supply, the drain of the third MOS tube is connected to the source of the fourth MOS tube, a second output node is provided between the drain of the third MOS tube and the source of the fourth MOS tube, and the second output node is connected to the second output pin.

4. The driving circuit with automatic shutdown according to claim 1, characterized in that: The input modes of the first input pin include floating input, pull-down input and pull-up input, and a pull-down resistor is provided inside the first input pin.

5. The driving circuit with automatic shutdown according to claim 1, characterized in that: The input modes of the second input pin include floating input, pull-down input and pull-up input, and a pull-down resistor is provided inside the second input pin.

6. The driving circuit with automatic shutdown according to claim 1, characterized in that: The input modes of the third input pin include floating input, pull-down input and pull-up input, and a pull-down resistor is provided inside the third input pin.

7. The driving circuit with automatic shutdown according to claim 1, characterized in that: The input modes of the fourth input pin include floating input, pull-down input and pull-up input, and a pull-down resistor is provided inside the fourth input pin.

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