High-temperature electrical aging test system

Abstract

The utility model discloses a high-temperature electrical aging test system, which comprises a high-temperature box and a test board, the high-temperature box comprises a plurality of inlet and outlet grooves formed in the side edge of the high-temperature box and a supporting structure arranged in a box body. The test board comprises a heat-resistant board, at least one mother board fixed on the heat-resistant board, a plurality of test daughter boards fixed on the mother board and used for being connected with a chip to be tested, and at least one control board fixed on the mother board and used for being connected with a microcontroller. The microcontroller is connected to the test daughter board through a plurality of array slots in the mother board so as to send a test signal to a chip to be tested. According to the technical scheme, the inlet and outlet groove is formed in the side edge of the high-temperature box for the test board to enter and exit integrally, the signal quality and frequency are effectively improved through the overall assembly mode of the test board, the high-temperature box is shared by different items and different time without mutual interference, the operation of the high-temperature box does not need to be stopped when the test items are switched quickly, and the test efficiency is improved. The test cost is effectively reduced, and the test efficiency is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of integrated circuit chip testing, in particular to a high-temperature electrical aging testing system. Background Art

[0002] In the automated testing of integrated circuit chips, in order to detect the stability of the chips, the integrated circuit chips need to be strictly inspected and screened. Among them, in order to measure the ability of the integrated circuit chip to store electrons, the chip to be tested needs to be placed in a high-temperature test box at a certain temperature (usually up to 105° to 125°) and continuously baked for more than 1,000 hours. During this process, the baked chips need to be taken out at intervals to measure the ability of the chips to store electrons, that is, to perform aging tests on the chips. Since the aging test requires a certain batch of chips to obtain reliable data, multiple chips need to be powered on for testing.

[0003] In the prior art, testing is generally performed using a dedicated high-temperature box or a traditional Magnum2 machine. The high-temperature box is connected to the chip to be tested inside the box by connecting wires passing through the box, and transmits the test signal to the chip to be tested. However, this high-temperature box is not only expensive, but also some of the connecting wires located in the box are more prone to aging, resulting in poor contact and affecting the test results; at the same time, it is necessary to frequently open the high-temperature box to take out the chip to be tested and read the data, which is inconvenient and cumbersome to operate. The traditional Magnum2 machine can only test a single chip at a time, and cannot complete long-term high-temperature power-on testing. It has the disadvantages of long test cycles, high costs, and large manpower investment. Utility Model Content

[0004] The main purpose of the utility model is to provide a high-temperature electrical aging test system, aiming to effectively reduce the test cost and improve the test efficiency.

[0005] To achieve the above-mentioned purpose, the utility model provides a high-temperature electrical aging test system, including a high-temperature box and a test board, the high-temperature box including a plurality of entry and exit slots opened on its side and a support structure arranged inside the box for supporting the test board; the test board includes a heat-resistant board, at least one motherboard fixed on the heat-resistant board, a plurality of test sub-boards fixed on the motherboard and used to connect to the chip to be tested, and at least one control board fixed on the motherboard and used to connect to a microcontroller, the microcontroller is connected to the test sub-board through a plurality of array slots in the motherboard to send a test signal to the chip to be tested on the test sub-board.

[0006] Preferably, the test sub-board is loaded with multiple chips to be tested, and a backplane for transmitting and distributing test signals is provided between the test sub-board and the motherboard, and multiple backplane slots are provided under the backplane. The microcontroller sends the test signal to the multiple chips to be tested through the backplane slots.

[0007] Preferably, the motherboard is an integrated structure, including a signal connection area inserted into the high-temperature box body and used to fix the test sub-board, a monitoring area located outside the high-temperature box body and used to connect the microcontroller, and an insulation area located between the signal connection area and the monitoring area and used to reduce heat transfer between the two areas.

[0008] Preferably, the thermal insulation area is provided with a plurality of slot-shaped thermal insulation holes for reducing the direct heat transfer capability of the motherboard.

[0009] Preferably, the thermal insulation holes are arranged at intervals along the thermal insulation area and are perpendicular to the heat transfer direction.

[0010] Preferably, the high temperature electrical aging test system further comprises a heat insulating pad for sealing the inlet and outlet slots, and the heat insulating pad is detachably fixed to the inlet and outlet slots of the high temperature box and the heat insulating area.

[0011] Preferably, the thermal insulation pad is a thermal insulation pad made of high temperature resistant foam rubber.

[0012] Preferably, the motherboard is fixed to the heat-resistant plate by a plurality of positioning screws, and the control board is fixed to the motherboard by a plurality of positioning screws.

[0013] Preferably, each of the motherboards is provided with a connection line interface for receiving test instructions on the side close to the control board, and the connection line interface includes a power interface for connecting to a power source, a ground interface for connecting to a ground, and a USB transmission interface for transmitting data information of the chip to be tested.

[0014] Preferably, the entry and exit grooves are transversely opened on the same side of the high temperature box, with a width equivalent to that of the test board and a height higher than that of the test board loaded with the chip to be tested.

[0015] The technical solution of the utility model provides a plurality of entry and exit slots on the side of the high-temperature box for the test board to enter and exit as a whole. When the high-temperature electrical aging test is performed, the chip to be tested is located inside the high-temperature box, and the control board is located outside the high-temperature box. Under the condition of ensuring the high-temperature test, the exposure time of the control board and connecting wires to high temperature is greatly reduced, and the service life of the line is effectively increased. The overall assembly mode of the test board effectively improves the quality and frequency of the test signal, and also supports different projects and different times to share a high-temperature box without interfering with each other. When the test project is quickly switched, there is no need to stop the operation of the high-temperature box. It is suitable for batch testing, effectively reducing the test cost and improving the test efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a structural schematic diagram of a high temperature box in a high temperature electrical aging test system according to an embodiment of the utility model;

[0017] Figure 2 It is a structural schematic diagram of a test board in a high-temperature electrical aging test system of an embodiment of the utility model;

[0018] Figure 3 It is a structural schematic diagram of a high-temperature electrical aging test system with a heat insulation pad in an embodiment of the utility model.

[0019] Reference numerals: high temperature box 1, inlet and outlet slot 11, temperature adjustment window 12;

[0020] Test board 2, heat-resistant board 21, motherboard 22, test sub-board 23, control board 24, backboard 25;

[0021] Connection line interface 26, power interface 261, ground interface 262, USB transmission interface 263;

[0022] Positioning screw 211; signal connection area 221, monitoring area 222, heat insulation area 223, heat insulation hole 224;

[0023] Chip to be tested 3, microcontroller 4, thermal insulation pad 5. Implementation

[0024] It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0025] The utility model is further described below in conjunction with the accompanying drawings.

[0026] The embodiment of the utility model provides a high-temperature electrical aging test system, which is used for performing aging test on semiconductor chips, so as to reduce test cost and improve test efficiency.

[0027] like Figure 1 , Figure 2As shown, the high temperature electrical aging test system of this embodiment includes: a high temperature box 1, at least one test board 2 for fixing the chip to be tested, and the chip to be tested 3, wherein the high temperature box 1 includes a plurality of inlet and outlet slots 11 provided on its side for the test board 2 to enter and exit the high temperature box 1, and a support structure provided inside the box for supporting the test board 2. The test board 2 includes a heat-resistant board 21, at least one motherboard 22 fixed on the heat-resistant board 21, a plurality of test sub-boards 23 fixed on the motherboard 22 and used to connect the chip to be tested 3, and at least one control board 24 fixed on the motherboard 22 and used to connect the microcontroller 4. The microcontroller 4 is connected to the test sub-board 23 through a plurality of array slots in the motherboard 22 to send a test signal to the chip to be tested 3 on the test sub-board 23.

[0028] The technical solution of the utility model is to open a plurality of entry and exit slots 11 on the side of the high temperature box 1 for the test board 2 to enter and exit as a whole. When the high temperature electrical aging test is performed, the chip 3 to be tested is located inside the high temperature box 1, and the control board 24 is located outside the high temperature box 1. Under the condition of ensuring the high temperature test, the time that the control board 24 and components such as connecting wires are exposed to high temperature is greatly reduced, and the service life of the control board 24 and the circuit is effectively increased. In addition, the overall assembly mode of the test board 2, that is, at least one motherboard 22 is provided on a heat-resistant board 21, at least one control board 24 and multiple test sub-boards 23 are provided on a motherboard 22, and multiple chips to be tested 3 are fixed on the test sub-board 23, effectively improves the quality and frequency of the test signal, and also supports different projects and different times to share a high temperature box 1 without interfering with each other. When the test project is quickly switched, it is not necessary to stop the operation of the high temperature box 1, which is suitable for batch testing, effectively reducing the test cost and improving the test efficiency.

[0029] In a specific embodiment, the heat-resistant plate 21 is used to load and fix the motherboard 22. In this embodiment, the heat-resistant plate 21 is an aluminum plate, and the heat-resistant temperature of the aluminum plate can meet the test conditions and the cost is low. In other embodiments, the heat-resistant plate 21 can also be made of other heat-resistant materials, such as heat-resistant steel plate, asbestos plate, silicone plate, etc.

[0030] In a specific embodiment, Figure 2 , Figure 3 As shown, the motherboard 22 is fixed to the heat-resistant board 21 by a plurality of positioning screws 211, and the control board 24 is fixed to the motherboard 22 by a plurality of positioning screws 211. The motherboard 22 and the control board 24 are fixed by positioning screws 211 to prevent deformation and loosening at high temperature, resulting in poor contact and affecting the test results.

[0031] In a specific embodiment, the control board 24 is composed of a microcontroller 4 and its peripheral circuits. Specifically, the microcontroller 4 is STM32.

[0032] In this embodiment, if Figure 2 , Figure 3As shown, two motherboards 22 are arranged on a heat-resistant board 21, and eight test sub-boards 23 and two control boards 24 are arranged on each motherboard 22. Six chips 3 to be tested are fixed on one test sub-board 23. The test sub-board 23 and the control board 24 are fixed on the motherboard 22. The microcontroller 4 sends a test signal to the chip 3 to be tested on the test sub-board 23 through a plurality of array slots in the motherboard 22. The microcontroller 4 collects data information of the chip 3 to be tested by monitoring and measuring the real-time status and electrical parameter indicators of the chip 3 to be tested. Among them, the real-time status of the chip 3 to be tested can determine whether the chip is working normally, and the electrical parameter indicators can determine whether the chip data is correct.

[0033] In a specific embodiment, when a high temperature test is required, the chip 3 to be tested is placed inside the high temperature box 1, the high temperature box 1 is turned on and the set temperature is set. After the control board 24 is powered on, the host computer sends a test instruction to the microcontroller 4. After the preset baking time is reached, the test board 2 is taken out, and after collecting the data of the chip 3 to be tested, the chip 3 to be tested is placed in the high temperature box 1 again for baking or the high temperature test is ended.

[0034] In other embodiments, two to eight motherboards 22 may be arranged on a heat-resistant board 21, two to eight test sub-boards 23 and one to two control boards 24 may be arranged on a motherboard 22, and four to ten chips 3 to be tested may be fixed on a test sub-board 23, which is more convenient for batch testing of chips. Designers may design the size of the heat-resistant board 21 according to the size of the high-temperature box 1, and design the number and size of the motherboard 22 and the test sub-board 23 according to the size of the heat-resistant board 21, and then design the number of control boards 24 and the number of chips 3 to be tested according to the size of the motherboard 22 and the test sub-board 23. In principle, more test sub-boards 23 and chips 3 to be tested may be designed as much as possible to facilitate low-cost batch testing.

[0035] Specifically, Figure 2 , Figure 3 As shown, a plurality of chips to be tested 3 are loaded on the test sub-board 23, and a backplane 25 for transmitting and distributing test signals is provided between the test sub-board 23 and the motherboard 22. The backplane 25 is provided with a plurality of backplane slots, and the microcontroller 4 sends the test signals to the plurality of chips to be tested 3 through the backplane slots. In a specific embodiment, the backplane slots are connected to the array slots in the motherboard 22 to realize the connection between the microcontroller 4 and the chips to be tested 3.

[0036] In this embodiment, if Figure 2As shown, the motherboard 22 is designed as an integrated structure, including three areas, namely, a signal connection area 221 inserted into the body of the high-temperature box 1, a monitoring area 222 located outside the body of the high-temperature box 1, and an insulation area 223 located therebetween. The signal connection area 221 is used to fix the test sub-board 23, the monitoring area 222 is used to fix the control board 24, and the insulation area 223 is used to reduce heat transfer between the signal connection area 221 and the monitoring area 222.

[0037] The test sub-board 23 is connected to the test signal from the control board 24 through the backplane slot fixed on the motherboard 22. The control board 24 is fixed on the motherboard 22 outside the high temperature box 1, and is located in the insulation area 223 between the test sub-board 23 and the control board 24. The insulation area 223 is provided with a plurality of slot-shaped insulation holes 224 perpendicular to the heat transfer direction, which are used to reduce the ability of direct heat transfer from the inside of the high temperature box 1 to the outside through the motherboard 22. When the test work is carried out, the part of the motherboard 22 where the test sub-board 23 is fixed is located inside the high temperature box 1 (that is, the signal connection area 221 is located inside the high temperature box 1), and the part where the control board 24 is fixed is located outside the high temperature box 1 (that is, the monitoring area 222 is located outside the high temperature box 1), and the insulation area 223 is located between the test sub-board 23 and the control board 24.

[0038] In a specific embodiment, Figure 3 As shown, the high temperature electrical aging test system also includes a heat insulating pad 5 for closing the inlet and outlet slots 11, and the heat insulating pad 5 is detachably fixed to the inlet and outlet slots 11 and the heat insulating area 223 of the high temperature box 1. When the test is in progress, the heat insulating pad 5 is fixed to the inlet and outlet slots 11 and the heat insulating area 223 of the high temperature box 1, separating the test sub-board 23 and the control board 24 and closing the high temperature box 1, preventing the heat inside the high temperature box 1 from escaping to the outside, and preventing the control board 24 from being exposed to the heat of the high temperature box 1; after the test is completed, the heat insulating pad 5 is removed, and the test board 2 can be taken out to collect data information of the chip 3 to be tested.

[0039] Specifically, the thermal insulation pad 5 can be made of common thermal insulation materials on the market, such as foam materials, fiber materials, etc. The thermal insulation pad 5 of this embodiment is high-temperature resistant foam rubber.

[0040] In a specific embodiment, Figure 2 , Figure 3 As shown, a connection line interface 26 for receiving test instructions is provided on the side of each motherboard 22 near the control board 24. Specifically, the connection line interface 26 is located on the side away from the body of the high temperature box 1. When the test is in progress, the connection line for connecting the host computer is located outside the high temperature box 1, which can reduce line aging and poor contact.

[0041] Specifically, Figure 2 , Figure 3As shown, the connection line interface 26 includes a power interface 261 for connecting to a power source, a ground interface 262 for connecting to a ground, and a USB transmission interface 263 for transmitting data information of the chip 3 to be tested. In some embodiments, a control board 24 is provided on a motherboard 22, and each motherboard 22 is provided with a power interface 261, a ground interface 262, and a USB transmission interface 263. In other embodiments, two control boards 24 are provided on a motherboard 22, and each motherboard 22 is provided with a power interface 261, a ground interface 262, and two USB transmission interfaces 263. The two control boards 24 share the power / ground interface 262, and transmit data information through different USB transmission interfaces 263 respectively; specifically, the power interface 261 and the ground interface 262 are located on the side of the motherboard 22 between the two control boards 24, which makes it more convenient for the two control boards 24 to share power and ground. In actual work, designers can design according to the sizes of the high temperature box 1, the motherboard 22, and the control board 24.

[0042] The working principle of the utility model high temperature electrical aging test system is as follows:

[0043] Before the test work begins, multiple chips 3 to be tested are mounted on the test sub-board 23, and then multiple test sub-boards 23 are plugged into the backboard 25 of the motherboard 22, and then multiple motherboards 22 with control boards 24 fixed thereon are fixed on a heat-resistant board 21 to form a test board 2;

[0044] Put multiple test boards 2 into the high temperature box 1 through the inlet and outlet slots 11, so that the chip 3 to be tested on the test sub-board 23 is completely located inside the high temperature box 1, and the microcontroller 4 on the control board 24 is located outside the high temperature box 1, and then fix the heat insulation pad 5 in the inlet and outlet slots 11 of the high temperature box 1 to isolate the high temperature inside the high temperature box 1;

[0045] The high temperature box 1 is turned on and set to a temperature, and the chip to be tested 3 is baked. When the preset temperature is reached, the control board 24 is powered on, and the host computer sends a test instruction to the microcontroller 4;

[0046] After the preset time is reached, the test board 2 is taken out, and the data information of the chip to be tested 3 is collected, and the next round of baking is performed until the high temperature aging test is completed.

[0047] In a specific embodiment, Figure 1 As shown, the inlet and outlet slots 11 are transversely opened on the same side of the high temperature box 1, and the width thereof is equivalent to the width of the test board 2, and the height thereof is higher than the height of the test board 2 loaded with the chip to be tested 3, so as to facilitate the entry and exit of the test board 2 loaded with the chip to be tested 3. When testing the chip to be tested 3, the chip to be tested 3 is loaded and placed on the test board, and the chip to be tested 3 on the test board 2 is sent into the high temperature box 1 through the inlet and outlet slots 11, and the test board 2 located inside the high temperature box 1 is fixed by the support structure inside the high temperature box 1.

[0048] In a specific embodiment, Figure 1 As shown, there are five inlet and outlet slots 11, which are parallelly distributed on the side of the high temperature box 1. Specifically, in the actual working process, the designer can design the number of the inlet and outlet slots 11 according to the height of the high temperature box 1, the number of chips during testing, etc.

[0049] In some embodiments, the support structure inside the high temperature box 1 is a multi-layer high temperature resistant bracket, and the test board 2 is placed on the high temperature resistant bracket for high temperature testing. In other embodiments, a plurality of support bars are provided on the side of the high temperature box 1 opposite to the inlet and outlet slots 11, and one end of the test board 2 is fixed to the notch of the inlet and outlet slots 11 of the high temperature box 1, and the other end is fixed to the support bar for high temperature testing. In other embodiments, designers can also use other support structures in the prior art to fix the test board 2.

[0050] In a specific embodiment, Figure 1 As shown, a temperature regulating window 12 is provided on the outer side of the high temperature box 1 for adjusting the temperature of the high temperature box 1 to adapt to different test conditions.

[0051] The technical solution of the utility model provides a plurality of entry and exit slots 11 on the side of the high-temperature box 1 for the test board 2 to enter and exit as a whole. When the high-temperature electrical aging test is performed, the chip 3 to be tested is located inside the high-temperature box 1, and the control board 4 is located outside the high-temperature box 1. Under the condition of ensuring the high-temperature test, the exposure time of the control board 4 and the connecting wires to the high temperature is greatly reduced, and the service life of the line is effectively increased; the overall assembly mode of the test board 2 effectively improves the quality and frequency of the test signal, and also supports different projects and different times to share a high-temperature box 1 without interfering with each other. When the test project is quickly switched, there is no need to stop the operation of the high-temperature box 1, which is suitable for batch testing, effectively reducing the test cost and improving the test efficiency.

[0052] It should be understood that the above are only preferred embodiments of the present invention, and the patent scope of the present invention cannot be limited therefrom. Any equivalent structural transformations made using the contents of the specification and drawings of the present invention, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A high temperature electrical aging test system, comprising a high temperature box and a test board, characterized in that: The high temperature box includes a plurality of entry and exit slots opened on its side and a support structure arranged inside the box for supporting the test board; the test board includes a heat-resistant board, at least one motherboard fixed on the heat-resistant board, a plurality of test sub-boards fixed on the motherboard and used to connect to the chip to be tested, and at least one control board fixed on the motherboard and used to connect to the microcontroller, the microcontroller is connected to the test sub-board through a plurality of array slots in the motherboard to send a test signal to the chip to be tested on the test sub-board.

2. The high temperature electrical aging test system according to claim 1, characterized in that: The test sub-board is loaded with multiple chips to be tested. A backplane for transmitting and distributing test signals is provided between the test sub-board and the motherboard. Multiple backplane slots are provided under the backplane. The microcontroller sends the test signals to the multiple chips to be tested through the backplane slots.

3. The high temperature electrical aging test system according to claim 1, characterized in that: The motherboard is an integrated structure, including a signal connection area inserted into the high-temperature box body and used to fix the test daughter board, a monitoring area located outside the high-temperature box body and used to connect the microcontroller, and an insulation area located between the signal connection area and the monitoring area and used to reduce heat transfer between the two areas.

4. The high temperature electrical aging test system according to claim 3, characterized in that: The heat insulation area is provided with a plurality of slot-shaped heat insulation holes for reducing the direct heat transfer capability of the motherboard.

5. The high temperature electrical aging test system according to claim 4, characterized in that: The heat insulation holes are arranged at intervals along the heat insulation area and are perpendicular to the heat transfer direction.

6. The high temperature electrical aging test system according to claim 3, characterized in that: The high temperature electrical aging test system further comprises a heat insulating pad for closing the inlet and outlet slots, and the heat insulating pad is detachably fixed to the inlet and outlet slots of the high temperature box and the heat insulating area.

7. The high temperature electrical aging test system according to claim 6, characterized in that: The thermal insulation pad is a thermal insulation pad made of high temperature resistant foam rubber.

8. The high temperature electrical aging test system according to claim 1, characterized in that: The motherboard is fixed on the heat-resistant plate by a plurality of positioning screws, and the control board is fixed on the motherboard by a plurality of positioning screws.

9. The high temperature electrical aging test system according to claim 1, characterized in that: A connection line interface for receiving test instructions is provided on the side of each motherboard close to the control board. The connection line interface includes a power interface for connecting to a power source, a ground interface for connecting to a ground, and a USB transmission interface for transmitting data information of the chip to be tested.

10. The high temperature electrical aging test system according to claim 1, characterized in that: The inlet and outlet grooves are transversely opened on the same side of the high temperature box, and the width thereof is equivalent to the width of the test board, and the height thereof is higher than the height of the test board loaded with the chip to be tested.

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