Delay control circuit and electronic product

Abstract

The utility model discloses a delay control circuit and an electronic product, and relates to the technical field of power electronics, and the circuit comprises a delay trigger module, an optocoupler driving chip and an inversion module. The inversion module comprises one or more IGBT (Insulated Gate Bipolar Translator) tubes; the inversion module is connected between a power supply and electric equipment; the input end of the delay trigger module is connected with an input voltage VIN, and the output end of the delay trigger module is connected with the input end of the optocoupler driving chip; the output end of the optocoupler driving chip is connected with the control end of the inversion module; and the delay trigger module is configured to conduct a connection path between the input voltage VIN and the optocoupler driving chip when the input voltage VIN is higher than a preset voltage threshold value, so that the optocoupler driving chip drives an IGBT tube in the inversion module to be switched on and switched off. According to the invention, the problem that the voltage of the input end of the optocoupler driving chip has more burrs in the power-on process of the system, so that the IGBT tube is triggered by mistake is solved.

Description

Technical Field

[0001] The present application relates to the field of power electronics technology, and in particular to a delay control circuit and an electronic product. Background Art

[0002] In the IGBT drive circuit, 316J and other optocoupler drive chips are usually used as the main components to drive the IGBT. It can convert the electrical signal at the input end into an optical signal, and then convert the optical signal into an electrical signal at the output end through a photosensitive device, thereby achieving electrical isolation between the input and output ends while driving the IGBT, and has good safety performance. Therefore, optocoupler drive circuits are widely used in many fields such as motor drive, power management, and signal processing.

[0003] When the system is powered on, the input of the optocoupler driver chip is connected to the power supply, and the voltage at its input starts to increase from 0 and eventually stabilizes. Since the optocoupler driver chip controls the on-off of the subsequent IGBT tube based on the voltage at the input, when the voltage at the input of the optocoupler driver chip reaches a certain value, the optocoupler driver chip will operate and begin to control the on-off of the subsequent IGBT tube.

[0004] However, in actual use, the voltage at the input end of the optocoupler driver chip is usually generated by a switching power supply. When the switching power supply is started, the noise interference is relatively large and the coupling is relatively strong. Therefore, at the moment when the system is powered on, that is, when the voltage at the input end of the optocoupler driver chip is established from 0 to 5V, the voltage provided by the switching power supply is relatively dirty and the glitch noise is serious, which may cause the optocoupler driver chip to malfunction and cause the IGBT tube to be mistriggered, thereby affecting the normal use of the system. Utility Model Content

[0005] In order to solve the problem that during the system power-on process, there are many glitches in the voltage at the input end of the optocoupler driver chip, which leads to false triggering of the IGBT tube, the present application provides a delay control circuit and an electronic product.

[0006] In a first aspect, the present application provides a delay control circuit, which adopts the following technical solution:

[0007] The delay control circuit includes a delay trigger module, an optocoupler drive chip and an inverter module; the inverter module includes one or more IGBT tubes;

[0008] The inverter module is connected between the power supply and the power-consuming device; the input end of the delay trigger module is connected to the input voltage VIN, and the output end is connected to the input end of the optocoupler driver chip; the output end of the optocoupler driver chip is connected to the control end of the inverter module;

[0009] The delay trigger module is configured to switch on a connection path between the input voltage VIN and the optocoupler driver chip when the input voltage VIN is higher than a preset voltage threshold, so that the optocoupler driver chip drives the IGBT tube in the inverter module to switch on and off.

[0010] By adopting the above technical solution, when the system is powered on, the input voltage VIN is connected to the power supply, and the input voltage VIN starts to rise from 0 until it is higher than the preset voltage threshold. The delay trigger module is turned on, so that the input voltage VIN is input to the optocoupler driver chip. At this time, the optocoupler driver chip senses that the input voltage is pulled up, and controls the corresponding IGBT tube in the inverter module to be turned on and off, so that the power supply supplies power to the electrical equipment; by adding a delay trigger module between the input voltage VIN and the optocoupler driver chip, the optocoupler driver chip does not act temporarily when there is a voltage fluctuation stage when the system is powered on, and the on-off control of the inverter module is delayed, which can effectively solve the problem of more glitches in the process of increasing the input voltage VIN, thereby causing the optocoupler driver chip to malfunction and cause the IGBT tube to malfunction.

[0011] In a specific implementation scheme, the delay trigger module includes a resistor R1, a resistor R2, a resistor R3, a voltage stabilizing diode D1, a capacitor C1 and a switch tube Q7;

[0012] The first end of the resistor R1 is connected to the input voltage VIN, and the second end of the resistor R1 is connected in series with the resistor R2 and the voltage stabilizing diode D1 in sequence and then grounded; the first end of the switch tube Q7 is connected to the input voltage VIN, and the second end of the switch tube Q7 is connected in series with the resistor R3 and then grounded, and the second end of the switch tube Q7 is also connected to the input end of the optical coupler driver chip (2), and the control end of the switch tube Q7 is connected to the middle node between the resistor R1 and the resistor R2.

[0013] By adopting the above technical solution, the starting voltage point of the switch tube Q7 is set by the voltage stabilization value of the voltage stabilizing diode D1 and the voltage division ratio of the resistors R1 and R2, so that the switch tube Q7 is turned on when the voltage VIN is higher than the preset voltage threshold, and the input voltage VIN can be input into the optocoupler driver chip. At the same time, the resistor R3 is used as a pull-down resistor to prevent the switch tube Q7 from being suspended.

[0014] In a specific implementation scheme, the delay trigger module further includes a capacitor C1; the capacitor C1 is connected in parallel across the resistor R3.

[0015] By adopting the above technical solution, a capacitor C1 is added to the delay trigger module, and the capacitor C1 plays a filtering role, thereby improving circuit reliability.

[0016] In a specific implementation scheme, the delay control circuit further includes a shaping module; the shaping module is connected between the delay trigger module and the optocoupler driver chip.

[0017] By adopting the above technical solution, a shaping module is added between the delay trigger module and the optocoupler driver chip, the voltage waveform input to the optocoupler driver chip is shaped, the interference of the voltage during the transmission process is eliminated, and an ideal rectangular pulse is obtained.

[0018] In a specific implementation scheme, the shaping module includes a Schmitt trigger, a resistor R4, a capacitor C2 and a capacitor C3;

[0019] The first end of the resistor R4 is connected to the output end of the Schmitt trigger, the second end of the resistor R4 is connected to the power supply end of the Schmitt trigger, and the power supply end of the Schmitt trigger is connected to the input voltage VIN; the first end of the capacitor C2 is connected to the power supply end of the Schmitt trigger, and the second end of the capacitor C2 is grounded;

[0020] The first end of the capacitor C3 is connected to the output end of the Schmitt trigger, and the second end of the capacitor C3 is grounded; the output end of the Schmitt trigger is connected to the input end of the optocoupler driver chip.

[0021] By adopting the above technical solution, capacitor C2 is used as the power decoupling capacitor of the Schmitt trigger, and resistor R4 is used as the output pull-up resistor, which can prevent the Schmitt trigger from erroneously outputting a fault low-level signal. Capacitor C3 is used as a filter capacitor at the output end of the Schmitt trigger, making the voltage input to the optocoupler driver chip purer, and the Schmitt trigger is powered by the input voltage VIN, without the need to add an additional power supply source.

[0022] In a specific implementation scheme, the inverter module includes a first bridge arm, a second bridge arm and a third bridge arm connected in parallel; the first bridge arm includes an IGBT tube Q1 and an IGBT tube Q2 connected in series, the second bridge arm includes an IGBT tube Q3 and an IGBT tube Q4 connected in series, and the third bridge arm includes an IGBT tube Q5 and an IGBT tube Q6 connected in series;

[0023] The middle node between the IGBT tube Q1 and the IGBT tube Q2, the middle node between the IGBT tube Q3 and the IGBT tube Q4, and the middle node between the IGBT tube Q5 and the IGBT tube Q6 are all connected to electrical equipment.

[0024] In a specific implementation scheme, the switch tube Q7 is a PNP transistor.

[0025] In a second aspect, the present application provides an electronic product, comprising the delay control circuit described in the above-mentioned first aspect or any possible implementation scheme of the first aspect.

[0026] One or more technical solutions provided by this application have at least the following technical effects or advantages:

[0027] 1. By adding a delay trigger module between the input voltage VIN and the optocoupler driver chip, the optocoupler driver chip will not operate when the system is powered on and there is a voltage fluctuation stage, delaying the on-off control of the inverter module. This can effectively solve the problem of more burrs during the increase of the input voltage VIN, which may cause the optocoupler driver chip to malfunction and cause the IGBT tube to malfunction.

[0028] 2. Add a shaping module between the delay trigger module and the optocoupler driver chip to shape the voltage waveform input to the optocoupler driver chip, eliminate voltage interference during transmission, and obtain an ideal rectangular pulse. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 is a schematic diagram of the overall structure of the delay control circuit in an embodiment of the present application;

[0030] Figure 2 It is a schematic diagram of voltage changes at the output end of the delay trigger module in an embodiment of the present application.

[0031] Description of reference numerals:

[0032] 1. Delay trigger module; 2. Optocoupler driver chip; 3. Inverter module; 4. Shaping module; 41. Schmitt trigger. DETAILED DESCRIPTION

[0033] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0034] The present application embodiment provides a delay control circuit, such as Figure 1 As shown, it includes a delay trigger module 1, an optical coupler driver chip 2 and an inverter module 3; the inverter module 3 includes one or more IGBT tubes;

[0035] The inverter module 3 is connected between the power supply and the electrical equipment; the input end of the delay trigger module 1 is connected to the input voltage VIN, and the output end is connected to the input end of the optocoupler driver chip 2; the output end of the optocoupler driver chip 2 is connected to the control end of the inverter module 3;

[0036] The delay trigger module 1 is configured to connect the input voltage VIN to the optocoupler driver chip 2 when the input voltage VIN is higher than a preset voltage threshold, so that the optocoupler driver chip 2 drives the IGBT tube in the inverter module 3 to turn on and off.

[0037] When the system is powered on, the input voltage VIN is connected to the power supply, and the input voltage VIN starts to rise from 0 until it is higher than the preset voltage threshold. The delay trigger module 1 is turned on, so that the input voltage VIN is input to the optocoupler driver chip 2. At this time, the optocoupler driver chip 2 senses that the input voltage is pulled up, and controls the corresponding IGBT tube in the inverter module 3 to be turned on and off, so that the power supply supplies power to the electrical equipment; the present application adds a delay trigger module 1 between the input voltage VIN and the optocoupler driver chip 2, so that the optocoupler driver chip 2 does not operate temporarily when there is a voltage fluctuation stage when the system is powered on, and delays the on-off control of the inverter module 3, which can effectively solve the problem of more glitches during the increase of the input voltage VIN, thereby causing the optocoupler driver chip 2 to malfunction and cause the IGBT tube to be mistriggered.

[0038] In a possible implementation, Figure 1 As shown, the delay trigger module 1 includes a resistor R1, a resistor R2, a resistor R3, a voltage stabilizing diode D1, a capacitor C1 and a switch tube Q7;

[0039] The first end of the resistor R1 is connected to the input voltage VIN, and the second end of the resistor R1 is connected in series with the resistor R2 and the voltage regulator diode D1 in sequence and then grounded; the first end of the switch tube Q7 is connected to the input voltage VIN, and the second end of the switch tube Q7 is connected in series with the resistor R3 and then grounded, and the second end of the switch tube Q7 is also connected to the input end of the optocoupler driver chip 2, and the control end of the switch tube Q7 is connected to the middle node of the resistor R1 and the resistor R2.

[0040] The working principle of the delay trigger module 1 is described in detail below: when the input voltage VIN is lower than the preset voltage threshold, the Zener diode D1 is not conducting, and the voltage at the control end of the switch tube Q7 is at a low level, and the switch tube Q7 is not conducting. At this time, the connection path between the input voltage VIN and the optocoupler driver chip 2 is disconnected, and the voltage at the input end of the optocoupler driver chip 2 is at a low level; when the input voltage VIN is higher than the preset voltage threshold, the Zener diode D1 reversely breaks down, and the voltage at the control end of the switch tube Q7 is at a high level, and the switch tube Q7 is conducting. At this time, the connection path between the input voltage VIN and the optocoupler driver chip 2 is conducting, and the input voltage VIN enters the optocoupler driver chip 2 through the switch tube Q7. The voltage at the input end of the optocoupler driver chip 2 is pulled up, and the optocoupler driver chip 2 starts to act, triggering the on-off control of the IGBT tube in the inverter module 3, so that the power supply can supply power to the electrical equipment through the inverter module 3.

[0041] Furthermore, the switch tube Q7 is a PNP type transistor.

[0042] The starting voltage point of the switch tube Q7 is set by the voltage stabilization value of the voltage stabilizing diode D1 and the voltage division ratio of the resistors R1 and R2, so that the switch tube Q7 is turned on when the voltage VIN is higher than the preset voltage threshold, and the input voltage VIN can be input into the optocoupler driver chip 2. At the same time, the resistor R3 is used as a pull-down resistor to prevent the switch tube Q7 from being suspended.

[0043] For example, Figure 2 As shown, a delay trigger module 1 is added and the voltage threshold is set to 4.3V. When the input voltage VIN increases from 0V, the voltage at the output of the delay trigger module 1 changes. That is, before time t0, the voltage at the output of the delay trigger module 1 is 0. At time t0, the switch tube Q7 is turned on. During the time t0-t1, the voltage at the output of the delay trigger module 1 increases to 5V, and basically remains stable after time t1. Those skilled in the art can flexibly adjust the value of the voltage threshold, and this application does not make specific limitations on this.

[0044] In a possible implementation, Figure 1 As shown, the delay trigger module 1 further includes a capacitor C1; the capacitor C1 is connected in parallel to both ends of the resistor R3.

[0045] A capacitor C1 is added to the delay trigger module 1, and the capacitor C1 plays a filtering role to improve the circuit reliability.

[0046] In a possible implementation, Figure 1 As shown, the delay control circuit further includes a shaping module 4 ; the shaping module 4 is connected between the delay trigger module 1 and the optocoupler driving chip 2 .

[0047] By adding the shaping module 4, the voltage waveform input to the optical coupling driver chip 2 is shaped to eliminate the interference of the voltage during the transmission process and obtain an ideal rectangular pulse.

[0048] In a possible implementation, Figure 1 As shown, the shaping module 4 includes a Schmitt trigger 41, a resistor R4, a capacitor C2 and a capacitor C3;

[0049] The first end of the resistor R4 is connected to the output end of the Schmitt trigger 41, the second end of the resistor R4 is connected to the power supply end of the Schmitt trigger 41, and the power supply end of the Schmitt trigger 41 is connected to the input voltage VIN; the first end of the capacitor C2 is connected to the power supply end of the Schmitt trigger 41, and the second end of the capacitor C2 is grounded;

[0050] The first end of the capacitor C3 is connected to the output end of the Schmitt trigger 41 , and the second end of the capacitor C3 is grounded; the output end of the Schmitt trigger 41 is connected to the input end of the optical coupler driver chip 2 .

[0051] In the specific design of the shaping module 4, capacitor C2 serves as the power decoupling capacitor of the Schmitt trigger 41, and resistor R4 serves as the output pull-up resistor to prevent the Schmitt trigger 41 from mistakenly outputting a faulty low-level signal. Capacitor C3 serves as a filter capacitor at the output end of the Schmitt trigger 41, making the voltage input to the optocoupler driver chip 2 purer, and the Schmitt trigger 41 is powered by the input voltage VIN, without the need to add an additional power source.

[0052] In a possible implementation, Figure 1 As shown, the inverter module 3 includes a first bridge arm, a second bridge arm and a third bridge arm connected in parallel; the first bridge arm includes an IGBT tube Q1 and an IGBT tube Q2 connected in series, the second bridge arm includes an IGBT tube Q3 and an IGBT tube Q4 connected in series, and the third bridge arm includes an IGBT tube Q5 and an IGBT tube Q6 connected in series;

[0053] The middle node between the IGBT tube Q1 and the IGBT tube Q2, the middle node between the IGBT tube Q3 and the IGBT tube Q4, and the middle node between the IGBT tube Q5 and the IGBT tube Q6 are all connected to electrical equipment.

[0054] An embodiment of the present application provides an electronic product, comprising the delay control circuit described in the above embodiment.

[0055] The above are all preferred embodiments of the present application, and the protection scope of the present application is not limited thereto. Therefore, any equivalent changes made according to the structure, shape, and principle of the present application should be included in the protection scope of the present application.

Claims

1. A delay control circuit, characterized in that: It comprises a time-delay trigger module (1), an optical coupler drive chip (2) and an inverter module (3); the inverter module (3) comprises one or more IGBT tubes; The inverter module (3) is connected between a power source and an electrical device; the input end of the delay trigger module (1) is connected to an input voltage VIN, and the output end is connected to the input end of the optocoupler drive chip (2); the output end of the optocoupler drive chip (2) is connected to the control end of the inverter module (3); The delay trigger module (1) is configured to, when the input voltage VIN is higher than a preset voltage threshold, switch on a connection path between the input voltage VIN and the optocoupler driver chip (2), so that the optocoupler driver chip (2) drives the IGBT tube in the inverter module (3) to switch on and off.

2. The delay control circuit according to claim 1, characterized in that: The delay trigger module (1) comprises a resistor R1, a resistor R2, a resistor R3, a voltage stabilizing diode D1, a capacitor C1 and a switch tube Q7; The first end of the resistor R1 is connected to the input voltage VIN, and the second end of the resistor R1 is connected in series with the resistor R2 and the voltage stabilizing diode D1 in sequence and then grounded; the first end of the switch tube Q7 is connected to the input voltage VIN, and the second end of the switch tube Q7 is connected in series with the resistor R3 and then grounded, and the second end of the switch tube Q7 is also connected to the input end of the optical coupler driver chip (2), and the control end of the switch tube Q7 is connected to the middle node between the resistor R1 and the resistor R2.

3. The delay control circuit according to claim 2, characterized in that: The delay trigger module (1) further comprises a capacitor C1; the capacitor C1 is connected in parallel to both ends of the resistor R3.

4. The delay control circuit according to claim 1, characterized in that: It also comprises a shaping module (4); the shaping module (4) is connected between the delay trigger module (1) and the optical coupler drive chip (2).

5. The delay control circuit according to claim 4, characterized in that: The shaping module (4) comprises a Schmitt trigger (41), a resistor R4, a capacitor C2 and a capacitor C3; The first end of the resistor R4 is connected to the output end of the Schmitt trigger (41), the second end of the resistor R4 is connected to the power supply end of the Schmitt trigger (41), and the power supply end of the Schmitt trigger (41) is connected to the input voltage VIN; the first end of the capacitor C2 is connected to the power supply end of the Schmitt trigger (41), and the second end of the capacitor C2 is grounded; The first end of the capacitor C3 is connected to the output end of the Schmitt trigger (41), and the second end of the capacitor C3 is grounded; the output end of the Schmitt trigger (41) is connected to the input end of the optical coupler driver chip (2).

6. The delay control circuit according to claim 1, characterized in that: The inverter module (3) comprises a first bridge arm, a second bridge arm and a third bridge arm connected in parallel; the first bridge arm comprises an IGBT tube Q1 and an IGBT tube Q2 connected in series, the second bridge arm comprises an IGBT tube Q3 and an IGBT tube Q4 connected in series, and the third bridge arm comprises an IGBT tube Q5 and an IGBT tube Q6 connected in series; The middle node between the IGBT tube Q1 and the IGBT tube Q2, the middle node between the IGBT tube Q3 and the IGBT tube Q4, and the middle node between the IGBT tube Q5 and the IGBT tube Q6 are all connected to electrical equipment.

7. The delay control circuit according to claim 2, characterized in that: The switch tube Q7 is a PNP type transistor.

8. An electronic product, characterized in that: It comprises the delay control circuit as described in any one of claims 1 to 7.

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