Control circuit of composite power switch

Abstract

The utility model relates to the technical field of power switch control circuits, in particular to a control circuit of a composite power switch, which comprises a power input end, a power output end, a main control circuit, a first metal oxide semiconductor (MOS) switching circuit, a second MOS switching circuit, a toggle switch, a release loop and a logic control circuit. One end of the first MOS switch circuit is electrically connected with the power supply input end, the other end of the first MOS switch circuit is electrically connected with the power supply output end, and the power supply output end is electrically connected with the input end of the main control circuit. The power supply is not turned off immediately, and the control signal is output to cut off the power supply after the system completes the normal shutdown process, so that the complete shutdown process of the system can be guaranteed, and the stability of the system is improved. The circuit not only has more flexible circuit characteristics, but also can meet the requirements of different equipment and application scenes.

Description

Technical Field

[0001] The utility model relates to the technical field of power switch control circuits, in particular to a control circuit for a composite power switch. Background Art

[0002] The traditional toggle switch control circuit directly cuts off the power supply when the switch is switched. This method will instantly cut off the power supply source of the device main control. The main control will lose power before completing the normal shutdown process, which may cause system abnormalities, data loss and other problems. Utility Model Content

[0003] The utility model provides a control circuit of a composite power switch with a simple circuit structure to solve the defects and shortcomings of the prior art.

[0004] To achieve the above-mentioned purpose, the technical solution adopted by the utility model is a control circuit of a composite power switch, including a power input end, a power output end, a main control circuit, a first MOS switch circuit, a second MOS switch circuit, a toggle switch, a release loop and a logic control circuit; one end of the first MOS switch circuit is electrically connected to the power input end, and the other end is electrically connected to the power output end; the power output end is electrically connected to the input end of the main control circuit, the output end of the main control circuit is electrically connected to the input end of the logic control circuit, and the output end of the logic control circuit is electrically connected to the first MOS switch circuit; one end of the second MOS switch circuit is electrically connected to the input end of the main control circuit, and the other end is electrically connected to the logic control circuit; the toggle switch is connected to the common end of the second MOS switch circuit and the logic control circuit; one end of the release loop is electrically connected to the power output end, and the other end is electrically connected to the logic control circuit.

[0005] Further; the main control circuit includes a main control chip, an electrolytic capacitor, a first filter capacitor, a second filter capacitor, a third filter capacitor, a first capacitor, a second capacitor and a third capacitor; the second pin of the main control chip is electrically connected to the drain of the second MOS switch circuit, the third pin of the main control chip is electrically connected to the logic control circuit, the twenty-ninth pin of the main control chip is electrically connected to the power output end, the thirty-sixth pin and the thirty-seventh pin of the main control chip are connected, the common end of the thirty-sixth pin and the thirty-seventh pin of the main control chip is electrically connected to the power output end, and the first pin of the main control chip is electrically connected to the power output end. Pin 30, pin 35 and pin 38 are all grounded; one end of the first capacitor is grounded, and the other end is connected to the common end of pin 29 of the main control chip and the power output end; one end of the second capacitor is grounded, and the other end is connected to the first capacitor; one end of the third capacitor is grounded, and the other end is connected to pin 29 of the main control chip; one end of the electrolytic capacitor is grounded, and the other end is electrically connected to the power output end; one end of the first filter capacitor is grounded, and the other end is connected to the power output end; one end of the second filter capacitor is grounded, and the other end is connected to the power output end; one end of the third filter capacitor is grounded, and the other end is connected to the power output end.

[0006] Further; the logic control circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first transistor, a second transistor and a third transistor; one end of the first resistor is connected to the power input end, and the other end is electrically connected to the first MOS switch circuit; one end of the second resistor is electrically connected to the first resistor, and the other end is electrically connected to the collector of the first transistor; one end of the third resistor is electrically connected to the toggle switch, and the other end is electrically connected to the base of the first transistor; the emitter of the first transistor is grounded; one end of the fourth resistor is connected to the common end where the second resistor and the collector of the first transistor are electrically connected, and the other end is connected to the base of the second transistor; the emitter of the second transistor is grounded, and the collector of the second transistor is connected to the first resistor; one end of the fifth resistor is connected to the third pin of the main control chip, and the other end is connected to the collector of the third transistor; the emitter of the third transistor is grounded, and the collector of the third transistor is electrically connected to the collector of the second transistor.

[0007] Further, the first MOS switch circuit includes a first MOS tube, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a fourth capacitor and a fifth capacitor; the sixth resistor and the seventh resistor are connected in series, one end of which is connected to the power input end and the other end is grounded; the common end of the sixth resistor and the seventh resistor is connected to the toggle switch; the fourth capacitor and the eighth resistor are connected in parallel, one end of which is connected to the power input end and the other end is connected to the gate of the first MOS tube; the source of the first MOS tube is connected to the power input end, and the drain of the first MOS tube is connected to the power output end; one end of the fifth capacitor is connected to the drain of the first MOS tube and the other end is grounded; one end of the ninth resistor is connected to the gate of the first MOS tube and the other end is connected to the common end of the second MOS switch circuit and the release loop.

[0008] Furthermore, the release loop includes a second MOS tube and a tenth resistor, one end of the tenth resistor is connected to the power output end, and the other end is connected to the drain of the second MOS tube, the gate of the second MOS tube is connected to the third pin of the main control chip, and the source of the second MOS tube is grounded.

[0009] Furthermore, the model of the main control chip is EC600G.

[0010] Beneficial effects of the utility model:

[0011] The utility model provides a control circuit of a composite power switch. The application increases linkage control with the main control circuit through a first MOS switch circuit, a second MOS switch circuit, a release loop and a logic control circuit. After the toggle switch is turned off, the power supply will not be turned off immediately, but the system will wait for the system to complete the normal shutdown process before outputting a control signal to cut off the power supply. This not only provides protection for the complete shutdown process of the system, but also improves the stability of the system. The circuit not only has more flexible circuit characteristics, but also can meet the needs of different devices and application scenarios. The application is not only simple in structure, strong in practicality, but also low in cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is a working principle block diagram of a control circuit of a composite power switch of the utility model;

[0013] Figure 2 This is a circuit schematic diagram of a main control circuit in a control circuit of a composite power switch of the utility model;

[0014] Figure 3 The utility model discloses a circuit schematic diagram of a first MOS switch circuit, a second MOS switch circuit, a toggle switch, a release loop and a logic control circuit in a control circuit of a composite power switch. DETAILED DESCRIPTION

[0015] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0016] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back...) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0017] In addition, the descriptions of "first", "second", etc. in the present utility model are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in this field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present utility model.

[0018] The utility model provides a control circuit of a composite power switch.

[0019] In the embodiment of the present utility model, Figure 1-3 As shown, a control circuit of a composite power switch is applied to intelligent devices, including a power input terminal, a power output terminal, a main control circuit, a first MOS switch circuit, a second MOS switch circuit, a toggle switch, a release loop and a logic control circuit; one end of the first MOS switch circuit is electrically connected to the power input terminal, and the other end is electrically connected to the power output terminal; the power output terminal is electrically connected to the input terminal of the main control circuit, the output terminal of the main control circuit is electrically connected to the input terminal of the logic control circuit, and the output terminal of the logic control circuit is electrically connected to the first MOS switch circuit; one end of the second MOS switch circuit is electrically connected to the input terminal of the main control circuit, and the other end is electrically connected to the logic control circuit; the toggle switch is connected to the common end of the second MOS switch circuit and the logic control circuit; one end of the release loop is electrically connected to the power output terminal, and the other end is electrically connected to the logic control circuit.

[0020] In this embodiment, the main control circuit includes a main control chip, an electrolytic capacitor, a first filter capacitor, a second filter capacitor, a third filter capacitor, a first capacitor, a second capacitor and a third capacitor; the second pin of the main control chip is electrically connected to the drain of the second MOS switch circuit, the third pin of the main control chip is electrically connected to the logic control circuit, the twenty-ninth pin of the main control chip is electrically connected to the power output end, the thirty-sixth pin and the thirty-seventh pin of the main control chip are connected, the common end of the thirty-sixth pin and the thirty-seventh pin of the main control chip is electrically connected to the power output end, and the The 30th pin, the 35th pin and the 38th pin are all grounded; one end of the first capacitor is grounded, and the other end is connected to the common end of the 29th pin of the main control chip and the power output end; one end of the second capacitor is grounded, and the other end is connected to the first capacitor; one end of the third capacitor is grounded, and the other end is connected to the 29th pin of the main control chip; one end of the electrolytic capacitor is grounded, and the other end is electrically connected to the power output end; one end of the first filter capacitor is grounded, and the other end is connected to the power output end; one end of the second filter capacitor is grounded, and the other end is connected to the power output end; one end of the third filter capacitor is grounded, and the other end is connected to the power output end.

[0021] In this embodiment, the logic control circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first transistor, a second transistor and a third transistor; one end of the first resistor is connected to the power input end, and the other end is electrically connected to the first MOS switch circuit; one end of the second resistor is electrically connected to the first resistor, and the other end is electrically connected to the collector of the first transistor; one end of the third resistor is electrically connected to the toggle switch, and the other end is electrically connected to the base of the first transistor; the emitter of the first transistor is grounded; one end of the fourth resistor is connected to the common end where the second resistor and the collector of the first transistor are electrically connected, and the other end is connected to the base of the second transistor; the emitter of the second transistor is grounded, and the collector of the second transistor is connected to the first resistor; one end of the fifth resistor is connected to the third pin of the main control chip, and the other end is connected to the collector of the third transistor; the emitter of the third transistor is grounded, and the collector of the third transistor is electrically connected to the collector of the second transistor.

[0022] In this embodiment, the first MOS switch circuit includes a first MOS tube, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a fourth capacitor and a fifth capacitor; the sixth resistor and the seventh resistor are connected in series, one end of which is connected to the power input end, and the other end is grounded; a common end of the sixth resistor and the seventh resistor is connected to the toggle switch; the fourth capacitor and the eighth resistor are connected in parallel, one end of which is connected to the power input end, and the other end is connected to the gate of the first MOS tube; the source of the first MOS tube is connected to the power input end, and the drain of the first MOS tube is connected to the power output end; one end of the fifth capacitor is connected to the drain of the first MOS tube, and the other end is grounded; one end of the ninth resistor is connected to the gate of the first MOS tube, and the other end is connected to the common end of the second MOS switch circuit and the release loop.

[0023] In this embodiment, the release loop includes a second MOS tube and a tenth resistor, one end of the tenth resistor is connected to the power output end, and the other end is connected to the drain of the second MOS tube, the gate of the second MOS tube is connected to the third pin of the main control chip, and the source of the second MOS tube is grounded.

[0024] In this embodiment, the model of the main control chip is EC600G.

[0025] Specifically, the working principle of the control circuit of the composite power switch in this application is as follows:

[0026] The control circuit of the composite power switch controls the on / off between the power input terminal VBAT and the power output terminal SYS, where S1 is a toggle switch. POWER_KG is the control signal of the toggle switch, POWER_SW_IN is the control signal input to the main control chip, POWER_SW_OUT is the control signal output by the main control chip, and POWER_SW is the control signal that directly controls the on / off between the power input terminal VBAT and the power output terminal SYS.

[0027] When the toggle switch S1 is switched to off, the main control chip is notified through POWER_SW_IN to output a POWER_SW_OUT signal after completing the shutdown process, and the state of POWER_SW is changed to control the shutdown of the first MOS tube between the power input terminal VBAT and the power output terminal SYS, thereby shutting off the power output to the power output terminal SYS of the main control chip.

[0028] U1A is the main control chip, which is used to control the power supply and input and output control logic. The 29th pin of the main control chip U1A is the power detection pin, the 36th and 37th pins are the power input pins of the main control chip, and the 2nd and 3rd pins are GPIO, which can be used as signal input and output pins. The power supply of the power output terminal SYS is stabilized by the electrolytic capacitor C3 in sequence, and then filtered by the first filter capacitor C4, the second filter capacitor C5 and the third filter capacitor C6 before flowing into the 36th and 37th pins of the main control chip U1A to provide power supply for the main control chip U1A; the power supply of the source output terminal SYS is filtered by the first capacitor C7, the second capacitor C8 and the third capacitor C9 in sequence before flowing into the 29th pin of the main control chip U1A. The main control chip U1A detects that this pin has electricity to indicate that the power-on state can be indicated; the 30th, 35th and 38th pins of the main control chip U1A are GND pins to provide a reference level for the main control chip U1A; the second MOS switch circuit Q3 outputs a POWER_SW_IN signal to the second pin of the main control chip U1A, notifying the main control chip to output a POWER_SW_OUT signal through the third pin after completing the shutdown process and giving it to the base of the third transistor Q6 through the fifth resistor R10.

[0029] The third pin of the toggle switch S1 is connected to the sixth pin, and the ground GND is connected to the resistor R1 to provide a low-level signal for the switch. When the toggle switch is turned to the third pin and the sixth pin, POWER_KG is at a low level; the first pin of the switch is connected to the fourth pin, and the sixth resistor R2 and the seventh resistor R3 are voltage-dividing resistors, which divide the voltage passing through the sixth resistor R2 and the seventh resistor R3 to provide a high-level signal for the toggle switch. When the toggle switch is turned to the first pin and the fourth pin, POWER_KG is at a high level.

[0030] The logic control circuit includes a two-stage triode control circuit and a first-stage triode circuit, wherein the two-stage triode circuit is composed of a first triode Q4, a second triode Q5, a first resistor R8, a second resistor R7, a third resistor R6 and a fourth resistor R9. When POWER_KG changes, POWER_SW changes synchronously. When POWER_KG is high, POWER_SW is high; when POWER_KG is low, POWER_SW is low. The first-stage triode circuit is composed of a third triode Q6 and a fifth resistor R10. POWER_SW and POWER_SW_OUT are in an opposite relationship. When POWER_SW_OUT is low, POWER_SW is high when the third triode Q6 is not turned on. When POWER_SW_OUT is high, POWER_SW is low when the third triode Q6 is turned on.

[0031] The above two-stage transistor control circuit has an AND logic relationship with the first-stage transistor circuit. As long as POWER_KG is at a low level or POWER_SW_OUT is at a high level, POWER_SW is at a low level.

[0032] The first MOS switch circuit is composed of a first MOS transistor Q1, a fourth capacitor C1, an eighth resistor R4 and a ninth resistor R5, and is used to directly control the opening and closing of the power input terminal VBAT and the power output terminal SYS; when POWER_SW is at a low level, the first MOS transistor Q1 is turned on, and the power flows from the power input terminal VBAT to the power output terminal SYS via the MOS transistor Q1 and the fifth capacitor C2; when POWER_SW is at a high level, Q1 is turned off, and CHG_SYS and VBAT are not conducting.

[0033] The source side POWER_KG of the second MOS switch circuit Q3 is input, and the drain side POWER_SW_IN is output. The input and output have the same level. When POWER_SW is high, that is, when there is no power at the power output terminal SYS, the input of POWER_KG is isolated to prevent power from flowing back from the power output terminal SYS through POWER_SW_IN to the main control circuit.

[0034] A release loop is formed by the second MOS tube Q2 and the tenth resistor R7. When POWER_SW is at a low level, the second MOS tube Q2 is not turned on, and the power supply of the power output terminal SYS will not flow to GND through the tenth resistor R7 and the second MOS tube Q2. When POWER_SW is at a high level, there is no conduction between the power output terminal SYS and the power input terminal VBAT, the second MOS tube Q2 is turned on, and the power output terminal SYS will flow to GND through the tenth resistor R7 and the second MOS tube Q2, so that the residual voltage of the power output terminal SYS is consumed and released.

[0035] It should be noted that the model of the main control chip in this application is not limited to EC600G.

[0036] Compared with the traditional toggle switch control circuit, the control logic of this application is better and more complete, which can not only provide guarantee for the complete shutdown process of the system, but also improve the stability of the system. This circuit not only has more flexible circuit characteristics, but also can meet the needs of different devices and application scenarios.

[0037] The above description is only a preferred embodiment of the utility model, and does not limit the patent scope of the utility model. All equivalent structural changes made by using the contents of the utility model specification and drawings under the utility model concept, or directly / indirectly used in other related technical fields are included in the patent protection scope of the utility model.

Claims

1. A control circuit of a composite power switch, characterized in that: It includes a power input terminal, a power output terminal, a main control circuit, a first MOS switch circuit, a second MOS switch circuit, a toggle switch, a release loop and a logic control circuit; one end of the first MOS switch circuit is electrically connected to the power input terminal, and the other end is electrically connected to the power output terminal; the power output terminal is electrically connected to the input terminal of the main control circuit, the output terminal of the main control circuit is electrically connected to the input terminal of the logic control circuit, and the output terminal of the logic control circuit is electrically connected to the first MOS switch circuit; one end of the second MOS switch circuit is electrically connected to the input terminal of the main control circuit, and the other end is electrically connected to the logic control circuit; the toggle switch is connected to the common end of the second MOS switch circuit and the logic control circuit; one end of the release loop is electrically connected to the power output terminal, and the other end is electrically connected to the logic control circuit.

2. The control circuit of the composite power switch according to claim 1, characterized in that: The main control circuit includes a main control chip, an electrolytic capacitor, a first filter capacitor, a second filter capacitor, a third filter capacitor, a first capacitor, a second capacitor and a third capacitor; the second pin of the main control chip is electrically connected to the drain of the second MOS switch circuit, the third pin of the main control chip is electrically connected to the logic control circuit, the twenty-ninth pin of the main control chip is electrically connected to the power output end, the thirty-sixth pin and the thirty-seventh pin of the main control chip are connected, the common end of the thirty-sixth pin and the thirty-seventh pin of the main control chip is electrically connected to the power output end, and the 30th pin of the main control chip is electrically connected to the power output end. The 35th pin, the 38th pin and the 38th pin are all grounded; one end of the first capacitor is grounded, and the other end is connected to the common end of the 29th pin of the main control chip and the power output end; one end of the second capacitor is grounded, and the other end is connected to the first capacitor; one end of the third capacitor is grounded, and the other end is connected to the 29th pin of the main control chip; one end of the electrolytic capacitor is grounded, and the other end is electrically connected to the power output end; one end of the first filter capacitor is grounded, and the other end is connected to the power output end; one end of the second filter capacitor is grounded, and the other end is connected to the power output end; one end of the third filter capacitor is grounded, and the other end is connected to the power output end.

3. The control circuit of the composite power switch according to claim 2, characterized in that: The logic control circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first transistor, a second transistor and a third transistor; one end of the first resistor is connected to the power input end, and the other end is electrically connected to the first MOS switch circuit; one end of the second resistor is electrically connected to the first resistor, and the other end is electrically connected to the collector of the first transistor; one end of the third resistor is electrically connected to the toggle switch, and the other end is electrically connected to the base of the first transistor; the emitter of the first transistor is grounded; one end of the fourth resistor is connected to the common end where the second resistor and the collector of the first transistor are electrically connected, and the other end is connected to the base of the second transistor; the emitter of the second transistor is grounded, and the collector of the second transistor is connected to the first resistor; one end of the fifth resistor is connected to the third pin of the main control chip, and the other end is connected to the collector of the third transistor; the emitter of the third transistor is grounded, and the collector of the third transistor is electrically connected to the collector of the second transistor.

4. The control circuit of the composite power switch according to claim 3, characterized in that: The first MOS switch circuit includes a first MOS tube, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a fourth capacitor and a fifth capacitor; the sixth resistor and the seventh resistor are connected in series, one end of which is connected to a power input terminal and the other end is grounded; a common end of the sixth resistor and the seventh resistor is connected to the toggle switch; the fourth capacitor and the eighth resistor are connected in parallel, one end of which is connected to the power input terminal and the other end is connected to the gate of the first MOS tube; the source of the first MOS tube is connected to the power input terminal, and the drain of the first MOS tube is connected to the power output terminal; one end of the fifth capacitor is connected to the drain of the first MOS tube and the other end is grounded; one end of the ninth resistor is connected to the gate of the first MOS tube and the other end is connected to the common end of the second MOS switch circuit and the release loop.

5. The control circuit of the composite power switch according to claim 4, characterized in that: The release loop includes a second MOS tube and a tenth resistor, one end of the tenth resistor is connected to the power output end, and the other end is connected to the drain of the second MOS tube, the gate of the second MOS tube is connected to the third pin of the main control chip, and the source of the second MOS tube is grounded.

6. The control circuit of the composite power switch according to claim 5, characterized in that: The model of the main control chip is EC600G.

Images