Local erasing liquid crystal writing device with reliable connection
By using an FPC with a pad in the liquid crystal writing device to conduct conductive area leads, and connecting adjacent FPCs through spot welding, and directly installing a driver chip on the FPC, the problem of loose connections in the prior art is solved, and the quality of local erasing and product reliability are improved.
Patent Information
- Application Number
- CN202421699054.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-17
- Publication Date
- 2025-05-16
- Estimated Expiration
- 2034-07-17
AI Technical Summary
During the assembly, production and handling, logistics and transportation or installation of existing LCD writing devices, the connection between the FPC cable and the socket and the soft cable and socket connection between adjacent PCB boards are easily loosened, resulting in unreliable line connections and affecting the local erasing effect.
The conductive area leads are used to connect adjacent FPCs through spot welding. The driver chip is directly installed on the FPC to apply voltage to the conductive area, saving the PCB board and socket to ensure the reliability of the connection.
Through this method, the problem of loose connections is avoided, the quality of local erasing and product reliability are improved, the production process is simplified, and the cost is reduced.
Smart Images
Figure CN222882929U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of liquid crystal writing, in particular to a reliable connected local erasing liquid crystal writing device. Background Art
[0002] The statements in this section merely provide background technical information related to the present invention and do not necessarily constitute prior art.
[0003] At present, liquid crystal writing devices have been widely used in many fields such as education and office, and have very good development prospects; at the same time, higher and higher requirements are also put forward for the stability and practicality of liquid crystal writing devices.
[0004] The structure of the liquid crystal writing device includes a first substrate layer, a first conductive layer, a bistable liquid crystal layer, a second conductive layer and a second substrate layer which are arranged in sequence from top to bottom; in order to realize the local erasing function of the liquid crystal writing device, the prior art divides the upper and lower conductive layers of the liquid crystal writing device into a plurality of mutually insulated strip-shaped conductive areas, applies a certain voltage to each conductive area, so that a predetermined voltage difference is formed between the upper and lower conductive areas, thereby realizing local erasing by using the voltage difference.
[0005] In order to apply voltage to each conductive area, it is necessary to lead out wires at the edge of each conductive area through FPC cables, and then connect the wires led out of the FPC cables to the PCB board through sockets and to the driver chip set in the PCB board. The driver chip applies corresponding voltage to each conductive area.
[0006] Due to the large number of conductive areas, multiple FPC cables are often required in actual applications. The wires led out of each FPC cable are connected to the PCB board through a socket. The adjacent two PCB boards are connected by a flexible cable and a socket. A driver chip is provided on one of the PCB boards, and the driver chip provides driving voltage for the FPC cables on each PCB board.
[0007] However, during the assembly, production handling, logistics transportation or installation of the LCD writing device, the connection between the FPC cable and the socket, as well as the connection between the FPC cable and the socket between adjacent PCB boards, are very easy to loosen, resulting in unreliable line connection, which may affect the effect of local erasing.
[0008] In addition, due to the size limitations of FPC production equipment and the heating uniformity limitations of FPC binding equipment, it is impossible to connect all outputs of the driver chip to the LCD writing film with only one FPC. Designing FPCs of multiple specifications will cause inconvenience in procurement and affect binding efficiency. Utility Model Content
[0009] In order to solve the above problems, the utility model proposes a locally erasable liquid crystal writing device with reliable connection, which eliminates the PCB board and the socket. Each conductive area on the first conductive layer and the second conductive layer uses FPC for lead wires. The FPC is provided with a welding pad. Adjacent FPCs are connected by spot welding, so that the connection of the wires will not become loose due to the movement of the device, thereby ensuring the reliability of the line connection.
[0010] In some embodiments, the following technical solutions are adopted:
[0011] A reliable connected partial erasing liquid crystal writing device comprises a first substrate layer, a first conductive layer, a bistable liquid crystal layer, a second conductive layer and a second substrate layer arranged in sequence; the first conductive layer and the second conductive layer are respectively divided into a plurality of conductive areas parallel to each other; and further comprises:
[0012] At least one group of FPC units are respectively used to connect the conductive areas on the first conductive layer and the second conductive layer, each group of FPC units includes a set number of FPCs, each FPC is connected to the set number of conductive areas on the corresponding conductive layer through a gold finger, and two adjacent FPCs are correspondingly welded; a driving chip is connected to one FPC in each group of FPC units, and the driving chip is used to apply voltage to all conductive areas connected to the corresponding group of FPC units.
[0013] As an optional solution, each FPC includes N gold finger connection terminals, m*N input terminal pads, power and control signal input terminal pads, m*N output terminal pads and power and control signal output terminal pads; wherein, the N gold finger connection terminals and (m-1)*N input terminal pads are respectively connected to the m*N output terminal pads through wires, and the power and control signal input terminal pads are correspondingly connected to the power and control signal output terminal pads through wires; wherein N and m are both positive integers, m>1.
[0014] The power supply and control signal input terminals include VH, VCC, GND, CLK and DAT; wherein, for the FPC with a driver chip in each group of FPC units, the driver chip is connected between its DAT input terminal pad and its DAT output terminal pad; for other FPCs in each group of FPC units, their DAT input terminal pad and their DAT output terminal pad are connected via a short-circuit resistor.
[0015] The driving chip is respectively connected to the N-way gold finger connection terminal, the m*N-way input terminal pad, and the power supply and control signal input terminal pad of the corresponding FPC.
[0016] The m*N output terminal pads of the previous FPC are correspondingly welded to the m*N input terminal pads of the next FPC; the power supply and control signal output terminal pads of the previous FPC are correspondingly welded to the power supply and control signal input terminal pads of the next FPC.
[0017] Further, N=16, m=3.
[0018] As an optional solution, each FPC includes K-way gold finger connection terminals, K-way input terminal pads, power and control signal input terminal pads, K-way output terminal pads and power and control signal output terminal pads; wherein, the K-way gold finger connection terminals are connected to the K-way output terminal pads through wires, and the power and control signal input terminal pads are correspondingly connected to the power and control signal output terminal pads through wires; K is a positive integer.
[0019] The control signal input terminal includes VH, VCC, GND, CLK and DAT; wherein, for the FPC with a driving chip in each group of FPC units, the driving chip is connected between its DAT input terminal pad and DAT output terminal pad; for other FPCs in each group of FPC units, their DAT input terminal pad and DAT output terminal pad are connected through a short-circuit resistor.
[0020] The driving chip is respectively connected to the K-way gold finger connection terminal, the K-way input terminal pad, and the power supply and control signal input terminal pad of the corresponding FPC.
[0021] The K-way output terminal pad of the previous FPC is welded correspondingly to the K-way input terminal pad of the next FPC; the power supply and control signal output terminal pad of the previous FPC is welded correspondingly to the power supply and control signal input terminal pad of the next FPC.
[0022] Furthermore, K=32.
[0023] As an optional solution, the number of FPCs included in each group of FPC units is related to the length of the FPC and the number of driving paths of the driving chip.
[0024] Compared with the prior art, the beneficial effects of the utility model are:
[0025] (1) In the present invention, each conductive area on the first conductive layer and the second conductive layer is respectively wired using an FPC with a solder pad, and adjacent FPCs are connected by spot welding. A driver chip is directly arranged in the FPC to apply voltage to the conductive areas of the set number of paths, thereby eliminating the need for a PCB board and avoiding the problem of loose connections caused by the use of flexible cables and sockets between the FPC and the PCB board and between adjacent PCB boards; the quality of local erasure is ensured, the reliability of the product is improved, the production efficiency is improved, and the cost is reduced.
[0026] (2) The utility model designs PFCs that can connect 16 and 32 conductive areas respectively. The FPC structure in each group of FPC units is exactly the same, which is convenient for mass production or procurement. The output of the previous PFC is welded correspondingly to the input of the next PFC. This wiring method greatly reduces the difficulty of wiring, avoids the problem of wiring errors that are easy to occur between PFCs with different structures, simplifies the production process, and reduces production costs.
[0027] Other features and additional advantages of the present invention will be partly given in the following description, and partly become apparent from the following description, or be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 This is a schematic diagram of the division of the first conductive layer and the second conductive layer in an embodiment of the utility model;
[0029] FIG2( a ) is a schematic diagram of the internal wiring of an FPC without a driver chip in Embodiment 1 of the present invention;
[0030] FIG2( b ) is a schematic diagram of the internal wiring of the FPC with a driver chip in the first embodiment of the present utility model;
[0031] Figure 3 A schematic diagram of the transmission principle of a group of FPC units in the first embodiment of the utility model;
[0032] FIG4( a ) is a schematic diagram of the internal wiring of an FPC without a driver chip in the second embodiment of the present utility model;
[0033] FIG4( b ) is a schematic diagram of the internal wiring of the FPC with the driver chip in the second embodiment of the present utility model;
[0034] Figure 5 This is a schematic diagram of the transmission principle of a group of FPC units in the second embodiment of the present utility model. DETAILED DESCRIPTION
[0035] It should be noted that the following detailed descriptions are illustrative and are intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used in the present invention have the same meanings as those commonly understood by those skilled in the art to which the present application belongs.
[0036] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.
[0037] Embodiment 1
[0038] In one or more embodiments, a reliably connected partial erasure liquid crystal writing device is disclosed, comprising a first substrate layer, a first conductive layer, a bistable liquid crystal layer, a second conductive layer, and a second substrate layer arranged in sequence; wherein the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually parallel conductive regions; Figure 1 A specific example of segmentation of the first conductive layer and the second conductive layer is given, where the conductive regions on each conductive layer are parallel strip-shaped conductive regions, and the conductive regions on the two conductive layers are perpendicular to each other in space. The conductive regions on the first conductive layer overlap with the conductive regions on the second conductive layer in space, and the overlapping portion and the bistable liquid crystal layer region corresponding to the portion together form a local erasure region.
[0039] By applying a set voltage to each conductive area, partial erasure can be achieved. The specific principle of partial erasure is a prior art and will not be described in detail in this embodiment. Of course, the structure of this embodiment can also achieve full erasure.
[0040] In this embodiment, the reliably connected partial erasing liquid crystal writing device further includes:
[0041] At least one group of FPC units for connecting the conductive areas on the first conductive layer, each group of FPC units includes a set number of FPCs, each FPC is connected to a set number of conductive areas on the first conductive layer through a gold finger (with conductive microspheres, the same below), and two adjacent FPCs are correspondingly welded; one FPC in each group of FPC units is connected to a driving chip, and the driving chip is used to apply voltage to all the conductive areas connected to the corresponding group of FPC units;
[0042] At least one group of FPC units is used to connect the conductive areas on the second conductive layer, each group of FPC units includes a set number of FPCs, each FPC is connected to a set number of conductive areas on the second conductive layer through a gold finger, and two adjacent FPCs are correspondingly welded; a driving chip is connected to one FPC in each group of FPC units, and the driving chip is used to apply voltage to all conductive areas connected to the corresponding group of FPC units respectively; thereby partial erasure or full erasure can be achieved.
[0043] In this embodiment, each FPC includes N gold finger connection terminals, m*N input terminal pads, power and control signal input terminal pads, m*N output terminal pads and power and control signal output terminal pads; wherein, the N gold finger connection terminals and (m-1)*N input terminal pads are respectively connected to the m*N output terminal pads through wires, and the power and control signal input terminal pads are correspondingly connected to the power and control signal output terminal pads through wires; wherein N and m are both positive integers, m>1.
[0044] Specifically, each group of FPC units in this embodiment includes 4 FPCs, each FPC includes 16 gold finger connection terminals, 48 input terminal pads, power and control signal input terminal pads, 48 output terminal pads and power and control signal output terminal pads; each FPC is connected to 16 conductive areas on the corresponding conductive layer through gold fingers, and the corresponding driver chip in each group of FPC units is a 64-channel driver chip, such as: PT6392.
[0045] In this embodiment, the first or last FPC in each group of FPC units is connected to the driver chip; the working principles of the two are the same, but the connection order is changed. The following description takes the last FPC as an example to connect the driver chip.
[0046] Combination Figure 2(a)-Figure 2(b) , the FPC of this embodiment includes: 16-way gold finger connection terminals, 48-way input terminal pads, power and control signal input terminal pads, 48-way output terminal pads, and power and control signal output terminal pads; wherein, the 16-way gold finger connection terminals and the 32-way input terminal pads are respectively connected to the 48-way output terminal pads, and the power and control signal input terminal pads are correspondingly connected to the power and control signal output terminal pads. The remaining 16-way input terminal pads are not connected to the output terminal pads; when there is no driver chip in the FPC, the remaining 16-way input terminal pads are floating; when a driver chip is connected to the FPC, the 16-way gold finger connection terminals, the 48-way input terminal pads, and the power and control signal input terminal pads are all connected to the driver chip.
[0047] It is understandable that some connection lines are omitted in FIG. 2( a ) and FIG. 2( b ) due to too many lines; the same is true in FIG. 4( a ) and FIG. 4( b ).
[0048] The power supply and control signal input terminals of this embodiment include VH, VCC, GND, CLK and DAT; wherein VCC and GND are logic power supplies, VH is an erase voltage, and CLK and DAT are shift control signals; these signals are all prior art. For the last FPC in each group of FPC units, a driving chip is connected between its DAT input terminal pad and its DAT output terminal pad, as shown in FIG2(a); for other FPCs in each group of FPC units, a short-circuit resistor (0Ω resistor) is connected between its DAT input terminal pad and its DAT output terminal pad, as shown in FIG2(b).
[0049] The purpose of this design is to achieve wiring consistency for each FPC. You only need to choose to attach chips or short-circuit resistors in the later stage, which is convenient for the unified production or procurement of FPC.
[0050] In this embodiment, the 48-way output terminal pads of the previous FPC are welded to the 48-way input terminal pads of the next FPC; the control signal output terminal pads of the previous FPC are welded to the control signal input terminal pads of the next FPC. The welding method of all FPCs is the same, and there is no need to find the wiring separately, which simplifies the wiring process and avoids wiring errors.
[0051] Combination Figure 3 , take a group of FPC units as an example, a group of FPC units includes 4 FPCs, each FPC is connected to 16 conductive areas on the corresponding conductive layer through gold fingers. To simplify the description, Figure 3 In the figure, the pads are shown as short lines, the power supply and control signal lines are simplified into one line, and in the remaining lines, each line represents 16 connection lines (for example, I1 represents 16 input lines); a black short line indicates no input, and short lines of the same color indicate the same transmission content.
[0052] The input of the 16-way gold finger connection end of the first FPC is output from the output end pad O1, and the input end pads I1-I3 have no input; the output end pad O1 of the first FPC is connected to the input end pad I1 of the second FPC, and is output from the output end pad O2 of the second FPC, and the input of the 16-way gold finger connection end of the second FPC is output from the output end pad O1 of the second FPC; the output end pad O3 of the second FPC has no output; the output end pad O1 of the second FPC is connected to the input end pad I1 of the third FPC, and is output from the output end pad O2 of the third FPC, and the output end pad O2 of the second FPC is connected to the input end pad I1 of the third FPC pad I2, and output from the output terminal pad O3 of the third FPC; the input of the 16-way gold finger connection terminal of the third FPC is output from the output terminal pad O1 of the third FPC; the input terminal pads O1-O3 of the third FPC are connected to the input terminal pads I1-I3 of the fourth FPC, and are connected to the 64-way driver chip, and the input of the 16-way gold finger connection terminal and the control signal input of the fourth FPC are also connected to the 64-way driver chip; in this way, all the conductive areas connected by this group of FPC units can be connected to the 64-way driver chip, and the driver chip can apply a set voltage to each conductive area according to the received control signal to achieve local erasure or one-key erasure.
[0053] It should be noted that the power supply and control signal input of each FPC are output from the corresponding power supply and control signal output terminal pads and connected to the next FPC.
[0054] It should also be noted that for the next group of FPC units, the wiring method and working principle are the same as above, and the connection method of the FPCs of two adjacent FPC units is also that the 48-way output terminal pads of the previous FPC are welded to the 48-way input terminal pads of the next FPC; the power supply and control signal output terminal pads of the previous FPC are welded to the power supply and control signal input terminal pads of the next FPC. The next group of FPC units will continuously discard the input of the previous group of FPC units, and finally connect all the conductive areas corresponding to this group of FPC units with the driver chips corresponding to this group of FPC units.
[0055] In this embodiment, all FPC structures are consistent, the connection method is simple and convenient, and it is easy to mass produce or purchase, which greatly reduces the difficulty of wiring, avoids the problem of wiring errors that are easy to occur between PFCs of different structures, and can simplify the production process and reduce production costs.
[0056] Embodiment 2
[0057] In one or more embodiments, a reliably connected partial erasure liquid crystal writing device is disclosed, comprising a first substrate layer, a first conductive layer, a bistable liquid crystal layer, a second conductive layer, and a second substrate layer arranged in sequence; the division method of the first conductive layer and the second conductive layer and the principle of partial erasure are the same as those in Example 1 and will not be described in detail.
[0058] In this embodiment, the reliably connected partial erasing liquid crystal writing device further includes:
[0059] At least one group of FPC units for connecting the conductive areas on the first conductive layer, each group of FPC units includes a set number of FPCs, each FPC is connected to a set number of conductive areas on the first conductive layer through a gold finger (with conductive microspheres, the same below), and two adjacent FPCs are correspondingly welded; one FPC in each group of FPC units is connected to a driving chip, and the driving chip is used to apply voltage to all the conductive areas connected to the corresponding group of FPC units;
[0060] At least one group of FPC units is used to connect the conductive areas on the second conductive layer, each group of FPC units includes a set number of FPCs, each FPC is connected to a set number of conductive areas on the second conductive layer through a gold finger, and two adjacent FPCs are correspondingly welded; a driving chip is connected to one FPC in each group of FPC units, and the driving chip is used to apply voltage to all conductive areas connected to the corresponding group of FPC units respectively; thereby partial erasure or full erasure can be achieved.
[0061] In this embodiment, each FPC includes K-way gold finger connection terminals, K-way input terminal pads, power and control signal input terminal pads, K-way output terminal pads and power and control signal output terminal pads; wherein the K-way gold finger connection terminals are connected to the K-way output terminal pads through wires, and the power and control signal input terminal pads are correspondingly connected to the power and control signal output terminal pads through wires; K is a positive integer.
[0062] Specifically, each group of FPC units in this embodiment includes 2 FPCs, each FPC includes 32 gold finger connection terminals, 32 input terminal pads, power and control signal input terminal pads, 32 output terminal pads and power and control signal output terminal pads; each FPC is connected to 32 conductive areas on the corresponding conductive layer through gold fingers, and the corresponding driver chip in each group of FPC units is a 64-channel driver chip.
[0063] Combination Figure 4(a)-Figure 4(b), the FPC of this embodiment includes: 32-way gold finger connection terminals, 32-way input terminal pads, power and control signal input terminal pads, 32-way output terminal pads and power and control signal output terminal pads; wherein, the 32-way gold finger connection terminals are connected to the 32-way output terminal pads, and the power and control signal input terminal pads are correspondingly connected to the power and control signal output terminal pads. The 32-way input terminal pads are not connected to the output terminal pads; when there is no driver chip in the FPC, the 32-way input terminal pads are floating; when a driver chip is connected to the FPC, the 32-way gold finger connection terminals, the 32-way input terminal pads and the power and control signal input terminal pads are all connected to the driver chip.
[0064] All FPCs are soldered in the same way, eliminating the need to look up wiring individually, simplifying the wiring process and avoiding wiring errors.
[0065] The connection method of the power supply and control signal input terminal and the power supply and control signal output terminal of this embodiment is the same as that in the first embodiment and will not be described in detail.
[0066] In this embodiment, the first or last FPC in each group of FPC units is connected to the driver chip; the working principles of the two are the same, but the connection order is changed. The following description takes the last FPC as an example to connect the driver chip.
[0067] Combination Figure 5 , take a set of FPC units as an example, a set of FPC units includes 2 FPCs, each FPC is connected to 32 conductive areas on the corresponding conductive layer through a gold finger. To simplify the description, Figure 5 In the figure, the pads are shown as short lines, the control signal line is simplified to one line, and each line in the remaining lines represents 32 connection lines; a black short line indicates no input, and short lines of the same color indicate the same content of the transmission.
[0068] The input of the 32-way gold finger connection end of the first FPC is output from the output end pad O1, and the input end pad I1 has no input; the output end pad O1 of the first FPC is connected to the input end pad I1 of the second FPC, and connected to the driver chip of the second FPC; the input of the 32-way gold finger connection end of the second FPC is also connected to the driver chip of the second FPC.
[0069] The control signal input of each FPC is output from the corresponding control signal output terminal pad and connected to the next FPC; the driver chip can apply a set voltage to each conductive area according to the received control signal to achieve partial erasure or full erasure.
[0070] It should be noted that for the next group of FPC units, the wiring method and working principle are the same as above, and the connection method of the FPCs of two adjacent FPC units is also that the 32-way output terminal pads of the previous FPC are welded to the 32-way input terminal pads of the next FPC; the power supply and control signal output terminal pads of the previous FPC are welded to the power supply and control signal input terminal pads of the next FPC. The next group of FPC units will discard the input of the previous group of FPC units, and finally connect all the conductive areas corresponding to this group of FPC units to the driver chips corresponding to this group of FPC units.
[0071] It should be noted that the number of FPCs included in each group of FPC units is related to the length of the FPC and the number of driving paths of the driver chip. Since the common FPC length is about 40 cm, one FPC can be connected to a maximum of 40 gold fingers, based on one gold finger per 1 cm. Considering the number of driving chips and product costs, this embodiment selects two solutions of connecting 16 gold fingers and 32 gold fingers on an FPC. Of course, those skilled in the art can also select FPCs with other connection paths based on the design ideas of this embodiment according to actual needs.
[0072] Although the above describes the specific implementation methods of the utility model in combination with the accompanying drawings, it is not intended to limit the scope of protection of the utility model. Technical personnel in the relevant field should understand that on the basis of the technical solution of the utility model, various modifications or deformations that can be made by technical personnel in this field without creative work are still within the scope of protection of the utility model.
Claims
1. A reliable connected partial erasure liquid crystal writing device, comprising a first substrate layer, a first conductive layer, a bistable liquid crystal layer, a second conductive layer and a second substrate layer arranged in sequence; the first conductive layer and the second conductive layer are respectively divided into a plurality of mutually parallel conductive regions; characterized in that: Also includes: At least one group of FPC units are respectively used to connect the conductive areas on the first conductive layer and the second conductive layer, each group of FPC units includes a set number of FPCs, each FPC is connected to the set number of conductive areas on the corresponding conductive layer through a gold finger, and two adjacent FPCs are correspondingly welded; a driving chip is connected to one FPC in each group of FPC units, and the driving chip is used to apply voltage to all conductive areas connected to the corresponding group of FPC units.
2. A reliable connected partial erasure liquid crystal writing device as claimed in claim 1, characterized in that: Each FPC includes N-way gold finger connection terminals, m*N-way input terminal pads, power supply and control signal input terminal pads, m*N-way output terminal pads and power supply and control signal output terminal pads; wherein, the N-way gold finger connection terminals and (m-1)*N-way input terminal pads are respectively connected to the m*N-way output terminal pads through wires, and the power supply and control signal input terminal pads are correspondingly connected to the power supply and control signal output terminal pads through wires; wherein N and m are both positive integers, and m>1.
3. A reliable connected partial erasure liquid crystal writing device as claimed in claim 2, characterized in that: The power supply and control signal input terminals include VH, VCC, GND, CLK and DAT; wherein, for the FPC with a driver chip in each group of FPC units, the driver chip is connected between its DAT input terminal pad and its DAT output terminal pad; for other FPCs in each group of FPC units, their DAT input terminal pad and their DAT output terminal pad are connected via a short-circuit resistor.
4. A reliable connected partial erasure liquid crystal writing device as claimed in claim 2, characterized in that: The driving chip is respectively connected to the N-way gold finger connection terminal, the m*N-way input terminal pad, and the power supply and control signal input terminal pad of the corresponding FPC.
5. A reliable connected partial erasure liquid crystal writing device as claimed in claim 2, characterized in that: The m*N output terminal pads of the previous FPC are correspondingly welded to the m*N input terminal pads of the next FPC; the power supply and control signal output terminal pads of the previous FPC are correspondingly welded to the power supply and control signal input terminal pads of the next FPC.
6. A reliable connected partial erasure liquid crystal writing device as claimed in claim 1, characterized in that: N=16, m=3.
7. A reliable connected partial erasure liquid crystal writing device as claimed in claim 1, characterized in that: Each FPC includes K-way gold finger connection terminals, K-way input terminal pads, power and control signal input terminal pads, K-way output terminal pads and power and control signal output terminal pads; wherein, the K-way gold finger connection terminals are connected to the K-way output terminal pads through wires, and the power and control signal input terminal pads are correspondingly connected to the power and control signal output terminal pads through wires; K is a positive integer.
8. A reliable connected partial erasure liquid crystal writing device as claimed in claim 7, characterized in that: The control signal input terminal includes VH, VCC, GND, CLK and DAT; wherein, for the FPC with a driving chip in each group of FPC units, the driving chip is connected between its DAT input terminal pad and DAT output terminal pad; for other FPCs in each group of FPC units, their DAT input terminal pad and DAT output terminal pad are connected through a short-circuit resistor.
9. A reliable connected partial erasure liquid crystal writing device as claimed in claim 7, characterized in that: The driving chip is respectively connected to the K-way gold finger connection terminal, the K-way input terminal pad, and the power supply and control signal input terminal pad of the corresponding FPC.
10. A reliable connected partial erasure liquid crystal writing device as claimed in claim 7, characterized in that: The K-way output terminal pad of the previous FPC is welded correspondingly to the K-way input terminal pad of the next FPC; the power supply and control signal output terminal pad of the previous FPC is welded correspondingly to the power supply and control signal input terminal pad of the next FPC.
11. A reliable connected partial erasing liquid crystal writing device as claimed in claim 7, characterized in that: K＝32。 12. A reliable connected partial erasing liquid crystal writing device as claimed in any one of claims 1 to 11, characterized in that: The number of FPCs included in each group of FPC units is related to the length of the FPC and the number of driving paths of the driving chip.