Wire structure

Abstract

Some embodiments of the present application provide a conductive line structure comprising: a first dielectric layer; a trace on the first dielectric layer; a first protective layer over the trace; and a second protective layer covering the first protective layer and sidewalls of the traces. The wire structure provided by the utility model has relatively good warping resistance and capability of preventing the trace from being broken.

Description

Technical Field

[0001] Embodiments of the present application relate to a wire structure. Background Art

[0002] In the existing wire structure 10, as Figures 1A to 1C shown, in the fan-out process, after forming traces 13 on a seed layer 12 (formed on a layer 11 such as a dielectric layer), the portion of the seed layer 12 disposed outside the traces 13 is removed by wet etching E commonly used in the art to avoid short circuits of the traces 13. However, in wet etching E, while removing part of the seed layer 12 by the etchant, the traces 13 on the seed layer 12 are also etched simultaneously, thinning the traces 13, thereby forming thinned traces 13'. However, with the improvement of packaging technology, products pursue thin, light, short, and small, so the number of I / Os needs to be increased, which requires reducing the line width and distance. At the same time, the traces 13 need to be thinned again. And in the case of line reduction, after etching in subsequent processes, the lines will become very weak. But in the case of fine line setting, the thinned traces 13' need to be resistant to warping. However, since the strength of the traces 13' decreases, it is easy to cause disconnection C due to the inability to withstand the warping of the package, so it will be found through reliability testing that there is a problem of disconnection C, resulting in the failure of the trace function.

[0003] Specifically, referring to Figures 1D to 1G , the width of the traces 13 (refer to Figure 1D ) in the conventional wire structure 10 is usually in the range of 100 μm - 25 μm. However, with the increase in the number of I / Os, it is necessary to reduce the line width and distance, thereby forming traces 13f with a width of about 2 μm as Figure 1F shown. But in the case of line reduction and then etching in subsequent processes (such as wet etching E), the traces 13f' will become very weak. Through reliability, it will be found that there is a problem of disconnection C' (refer to Figure 1H ), resulting in function failure, and the reliability failure rate of the traces 13f' > 80%, the defect rate of generating disconnection C' > 80%, and the defect escape rate of AOI (chip appearance defect detection equipment) > 20%. This is because the top 13ft' of the fine traces 13f is in contact with the etchant for a longer time, while the bottom 13fd' is in contact for a shorter time. Therefore, the etching difference between the top and bottom (top and bottom) of the traces 13f made of, for example, copper is too large, so that the profile of the fine traces 13f' presents a trapezoid, resulting in the structure of the fine traces 13f' not being strong enough, thus generating disconnection C' as Figure 1H shown.

[0004] In summary, in the fan-out process, the etchant removes the seed layer 12 while also etching the traces 13 / 13f on the seed layer 12, thinning the traces 13 / 13f. This leads to a decrease in the metal amount of the thinned traces 13’ / 13f’, resulting in a decrease in their warpage resistance strength and thus causing the problem of broken wires C / C’. SUMMARY OF THE UTILITY MODEL

[0005] To solve the above problems, the wire structure provided in this application provides a corresponding protective layer for the corresponding traces. Further, the protective layer can isolate the traces from the etchant to solve the problem of broken wires caused by the decrease in the warpage resistance strength of the thinned traces.

[0006] Some embodiments of this application provide a wire structure, including: a first dielectric layer; a trace located on the first dielectric layer; a first protective layer located above the trace; and a second protective layer covering the sidewalls of the first protective layer and the trace.

[0007] In some embodiments, the hardness of the first protective layer is the same as that of the trace.

[0008] In some embodiments, the wire structure further includes: a second dielectric layer covering the trace, the first protective layer, and the second protective layer.

[0009] In some embodiments, a part of the second dielectric layer extends above the first protective layer.

[0010] In some embodiments, the second dielectric layer contacts the upper surface of the first protective layer.

[0011] In some embodiments, the wire structure further includes: a seed layer disposed between the first dielectric layer and the trace.

[0012] In some embodiments, the side surface of the seed layer is retracted from the side surface of the second protective layer.

[0013] In some embodiments, the upper surface of the seed layer is not aligned with the bottom surface of the second protective layer.

[0014] In some embodiments, the bottom surface of the second protective layer is higher than the upper surface of the seed layer.

[0015] In some embodiments, the side surface of the seed layer is retracted from the side surface of the first protective layer.

[0016] In some embodiments, the second dielectric layer laterally covers the second protective layer and the trace.

[0017] In some embodiments, the second dielectric layer contacts the side surface of the second protective layer.

[0018] In some embodiments, the outermost surface of the second dielectric layer is aligned with the outermost surface of the first dielectric layer.

[0019] In some embodiments, the second protective layer and the first protective layer are a continuously extending structure.

[0020] In some embodiments, the trace has straight sidewalls.

[0021] In some embodiments, the thickness of the first protective layer is less than the thickness of the trace.

[0022] Some other embodiments of the present application provide a wire structure, including: a first dielectric layer; a trace located on the first dielectric layer; and a protective layer located above the trace and on the sidewalls of the trace, wherein the trace has straight sidewalls and is electrically connected to the protective layer.

[0023] In some embodiments, the protective layer includes: a first protective layer located above the trace; and a second protective layer covering the first protective layer and the sidewalls of the trace, wherein the first protective layer is electrically connected to the trace.

[0024] In some embodiments, the wire structure further includes: a seed layer disposed between the first dielectric layer and the trace, wherein a side surface of the seed layer is recessed from a side surface of the second protective layer.

[0025] The wire structure provided by the present application has better warpage resistance and the ability to prevent trace breakage. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] When read in conjunction with the accompanying drawings, various aspects of the present utility model can be best understood from the following detailed description. It should be noted that, in accordance with standard practice in the industry, the various components are not drawn to scale. In fact, for the sake of clear discussion, the dimensions of the various components can be arbitrarily increased or decreased.

[0027] Figures 1A to 1H A wire structure of the prior art is shown.

[0028] Figures 2A to 2C And Figure 2D-1 And Figure 2E-2 A wire structure according to some embodiments of the present application is shown.

[0029] Figures 3A to 3E And Figures 4 to 12 A method for forming a wire structure according to some embodiments of the present application is shown. DETAILED DESCRIPTION

[0030] The following disclosure provides many different embodiments or examples for implementing the different features of the present utility model. Specific examples of components and arrangements are described below to simplify the present utility model. Of course, these are merely examples and are not intended to limit the present utility model. In addition, when describing a numerical value or a numerical range with terms such as "substantially", "about", "substantially", "essentially", etc., unless otherwise specified, the term is intended to cover numerical values within ±10% of the described numerical value. For example, the term "about 5 nm" covers a size range from 4.5 nm to 5.5 nm.

[0031] The wire structure provided in this application provides a corresponding protective layer for the trace. Specifically, referring to Figure 2A , this application provides a wire structure 100, which includes: a first dielectric layer 101; a trace 103 located on the first dielectric layer 101; a first protective layer 104 located above the trace 103; and a second protective layer 105 covering the sidewall 104s of the first protective layer 104 and the sidewall 103s of the trace 103. In some embodiments, the hardness of the first protective layer 104 is the same as that of the trace 103 to better protect the trace 103. In some embodiments, the second protective layer 105 and the first protective layer 104 are a continuously extending structure. In addition, in the wire structure 100 provided in this application, the first protective layer 104, the trace 103, and the second protective layer 105 are made of metal. Further, the first metal material of the first protective layer 104 is different from the second metal material of the trace 103, and the third metal material of the second protective layer is also different from the second metal material of the trace 103.

[0032] Continuing to refer to Figure 2A , the wire structure 100 may further include a second dielectric layer 106, which covers the trace 103, the first protective layer 104, and the second protective layer 105. Further, it can be seen from Figure 2A that a part 106A of the second dielectric layer 106 extends above the first protective layer 104. In addition, in some embodiments, other parts 106B of the second dielectric layer 106 may extend at the sidewall 104s of the first protective layer 104 and the sidewall 103s of the trace 103. In some embodiments, the second dielectric layer 106 contacts the upper surface 104t of the first protective layer 104. In some embodiments, the second dielectric layer 106 laterally covers the second protective layer 105 and the trace 103, and the second dielectric layer 106 contacts the side surface 105s of the second protective layer 105. In other embodiments, the outermost surface 106s of the second dielectric layer 106 is aligned with the outermost surface 101s of the first dielectric layer 101.

[0033] Further, the wire structure 100 further includes a seed layer 102 disposed between the first dielectric layer 101 and the trace 103. FromFigure 2A As can be seen, the side surface 102s of the seed layer 102 is recessed from the side surface 105s of the second protective layer 105. In some embodiments, the upper surface 102t of the seed layer 102 is not aligned with the bottom surface 105d of the second protective layer 105. In some embodiments, the bottom surface 105d of the second protective layer 105 is higher than the upper surface 102t of the seed layer 102. In other words, the second protective layer 105 does not completely cover the sidewall 103s of the trace 103, that is, a part of the sidewall 103s of the trace 103 is in contact with the second dielectric layer 106. In a further embodiment, the coverage area of the sidewall 103s of the trace 103 covered by the second protective layer 105 accounts for more than 95% of the total area of the sidewall 103s of the trace 103, that is, only a small part of the sidewall 103s is exposed from the second protective layer 105.

[0034] In addition, the sidewall 104s of the first protective layer 104 is vertically aligned with the sidewall 103s of the trace 103. As can be Figure 2A further seen, the side surface 102s of the seed layer 102 is recessed from the side surface (i.e., the sidewall 104s) of the first protective layer 104, and the side surface 102s of the seed layer 102 is recessed from the side surface (i.e., the sidewall 103s) of the trace 103.

[0035] In the wire structure 100 provided in the present application, the trace 103 has straight sidewalls, that is, has vertical sidewalls extending in the vertical direction P, rather than inclined sidewalls. In addition, the thickness of the first protective layer 104 in the vertical direction P is less than the thickness of the trace 103 in the vertical direction P.

[0036] Next, refer to Figure 2B and Figure 2C , wherein, Figure 2B is a partial wire structure 100 omitting the second dielectric layer 106, Figure 2C is Figure 2B the corresponding three-dimensional (3D) view of the structure, and Figure 2B is along Figure 2CCross-sectional view of line L-L. As described above, the first metal material of the first protective layer 104 is different from the second metal material of the trace 103, and the third metal material of the second protective layer is also different from the second metal material of the trace 103. Therefore, in this application, the top 103t and sidewalls 103s of the fine trace 103 are protected by using other metals of the first protective layer 104 and the second protective layer 105 (in some embodiments, the second protective layer 105 is a CVD film formed by chemical vapor deposition) to avoid loss of the top 103t and sidewalls 103s of the fine trace 103. In this application, the first protective layer 104 and the second protective layer 105 use metals different from the trace 103 to resist wet etching of the seed layer 102 or the trace 103, that is, the wet etching of the seed layer 102 or the trace 103 such as copper has high impedance by other metals (or the second protective layer 105 (protective film) of the CVD film).

[0037] Figure 2D-1 and Figure 2D-2 respectively show a comparison between the trace 13 of the wire structure 10 in the prior art and the corresponding trace 103 of the wire structure 100 provided in this application. It can be seen from the comparison that Figure 2D-1 the sidewalls of the traces 13’ / 13f’ of the conductive structure 10 in the prior art are etched (with inclined sidewalls), resulting in a decrease in the amount of metal of the thinned traces 13’ / 13f’ and a decrease in their anti-warpage strength, thus causing the problem of broken wires C / C’. While Figure 2D-2 the sidewalls 103s and the top 103t of the corresponding trace 103 of the wire structure 100 provided in this application are protected by the second protective layer 105 and the first protective layer 104 (protective film) respectively, that is, the sidewalls 103s of the corresponding trace 103 are protected by the second protective layer 105, and the top 103t of the corresponding trace 103 is protected by the first protective layer 104. Refer to Figure 2E-1 and Figure 2E-2 , the trace 103 will not be thinned during the wet etching E of the seed 102 and the loss of the sidewalls 103s and the top 103t of the trace 103 is avoided, so that it can have vertical sidewalls 103s, thus avoiding the subsequent problem of broken wires. In summary, the conductive structure 10 provided in this application can have the following advantages: (1) The first protective layer 104 using other metals (located at the top 103t of the trace 103) is a stop layer and a protective layer for the wet etching E process; (2) The first protective layer 104 and the second protective layer 105 used as protective films are protective films with high resistance to the wet etching E of the trace 103. In some embodiments, the second protective layer 105 is a CVD film; and (3) The fine trace 103 with the first protective layer 104 and the second protective layer 105 using other metals has a smooth surface and less loss. In addition, from Figure 2E-1 and Figure 2E-2It can be seen that after wet etching E, the grains 103g in the trace 103 remain intact and are not damaged.

[0038] In summary, the present application enhances the reliability of the fine trace 103 through the first protective layer 104 and the second protective layer 105, and by making the first protective layer 104 and the second protective layer 105 have different materials from the trace 103, the trace 103 can be further protected during wet etching E. In addition, through the first protective layer 104 and the second protective layer 105, the disconnection defect rate of the fine trace 103 can be made relatively low (<5%), the disconnection defect rate of the RDL (redistribution structure) formed by the trace 103 can be made relatively low (<5%), and the defect omission rate of the AOI (chip appearance defect detection device) can be made relatively low (<1%).

[0039] On the top 103t of the fine trace 103 is the first protective layer 104 different from the trace 103, which will not be damaged due to the etching of the seed layer 102 or the trace 103. In addition, at the sidewall 103s of the fine trace 103 is the second protective layer 105 (a protective film formed by CVD), which can avoid being etched, maintain the original size of the trace 103, and keep the size and shape of the trace 103 unchanged. In summary, the wire structure 100 provided by the present application has good anti-warpage ability and the ability to prevent the trace 103 from breaking.

[0040] Return to refer Figure 2A , the present application also provides a wire structure 100, which includes: a first dielectric layer 101; a trace 103 located on the first dielectric layer 101; and a protective layer T located above the trace 103 and on the sidewall 103s of the trace 103, wherein the trace 103 has a straight sidewall 103s and is electrically connected to the protective layer T. It should be noted that the straight sidewall 103s means a sidewall that is straight in the vertical direction P. From Figure 2A it can be seen that the protective layer T includes: a first protective layer 104 located above the trace 103; and a second protective layer 105 covering the sidewall 104s of the first protective layer 104 and the sidewall 103s of the trace 103, wherein the first protective layer 104 is electrically connected to the trace 103. In a further embodiment, the wire structure 100 further includes: a seed layer 102 disposed between the first dielectric layer 101 and the trace 103, wherein the side surface 102s of the seed layer 102 is recessed from the side surface 105s of the second protective layer 105.

[0041] In the wire structure 100 of the above embodiment, the first dielectric layer 101 and the second dielectric layer 106 include, but are not limited to, polyimide, polybenzoxazole, BCB (benzocyclobutene), etc. The first protective layer 104 includes a metal or a metal alloy, such as Ni, SnAg, Au, Pd, Ag, etc. The second protective layer 105 may include the same or different materials as the first protective layer 104. In some other embodiments, the second protective layer 105 includes polyimide, etc. In still some other embodiments, the second protective layer 105 includes a metal or a metal alloy, such as Ni, SnAg, Au, Pd, Ag, etc. In some embodiments, the trace 103 includes, but is not limited to, metals such as Cu, Ag, etc., and the seed layer 102 may include, but is not limited to, Ti, Ta, W, TiN, TaN, etc.

[0042] In addition, in the wire structure 100 shown above Figure 2A the width CD of the trace 103 in the horizontal direction H is in the range of 50 nm - 15 μm, such as 2 μm, and the thickness of the trace 103 in the vertical direction P is in the range of 0.5 - 10 μm, such as 5 μm. The thickness of the seed layer 102 in the vertical direction P is in the range of between, such as The thickness of the first protective layer 104 in the vertical direction P is in the range of 10 nm - 1 μm, such as 0.5 μm, and the thickness of the second protective layer 105 in the horizontal direction is in the range of 10 nm - 1 μm, such as 0.2 μm.

[0043] Next, with reference to Figures 3A to 12 the process flow for forming the wire structure 100 of the present application will be described.

[0044] First, with reference to Figure 3A and Figure 3E the advantages of the protective layer 105' formed by CVD will be described. Figure 3A The protective layer 105' formed by the CVD method is shown in, and the top surface of the trace 103 has a covered portion 103tc covered by the protective layer 105', and an exposed portion 103tp exposed by the protective layer 105'. Figure 3B The wet etching E of the trace 103 such as metallic copper is shown in, and Figure 3E shows the top surface of the trace 103 after the wet etching E. It can be seen that the exposed portion 103tp is etched to form the surface 103tp', while the covered portion 103tc remains unchanged. Figure 3D and Figure 3EShows a scanning electron microscope image of the corresponding trace 103 and the etched surface 103tp'. It can be seen that CVD has good selectivity (compared to metals such as Cu), so the protective layer 105' formed by CVD will not be damaged by the etchant of the wet etch E, and thus can be used as a protective layer.

[0045] Next, referring to Figures 4 to 11 , in Figure 4 , first, a seed layer 102' is deposited on the first dielectric layer 101. After depositing the seed layer 102', referring to Figure 5 , a photoresist R is formed and patterned, such as by physical vapor deposition or printing and other commonly used processes in the art and patterned by an exposure process. Referring to Figure 6 , a metal material, such as a first metal material of copper and a second metal material of Ni, is electroplated in the patterned openings of the photoresist R to form a trace 103 and a first protective layer 104. After that, referring to Figure 7 , the photoresist R is removed by a lift-off process. After removing the photoresist R, referring to Figure 8 , a second protective layer 105', such as polyimide or Au, is formed by CVD. After forming the second protective layer 105', referring to Figure 9 , the horizontal portion of the second protective layer 105' is selectively removed by plasma (DRIE) etching Et without removing the vertical portion of the second protective layer 105', that is, the plasma (DRIE) etching Et ensures that the second protective layer 105 on the sidewalls of the fine trace 103 is not etched (thinned). In addition, since the first protective layer 104 and the second protective layer 105' have selectivity (by choosing different materials), therefore, the first protective layer 104 is not etched when the second protective layer 105' is etched, thus obtaining Figure 10 the second protective layer 105 shown. Finally, referring to Figure 11 , the portion of the seed layer 102' not covered by the trace 103 is removed by wet etching commonly used in the art. Since the second protective layer 105 is formed, this wet etching does not etch the sidewalls of the trace 103, so the trace 103 has vertical sidewalls. It can be seen that the first protective layer 104 formed by electroplating with other metals and the second protective layer 105 formed by CVD as protective films can resist etching during wet etching, thereby protecting the sidewalls 103s and the top surface 103t of the trace 103 from etching. In this application, the thickness of the second protective layer 105 as a CVD film can control the spacing of the fine trace 103 to be less than 2 μm.

[0046] In addition, referring to Figure 12, the formation of the first protective layer 104 and the second protective layer 105 of the present application is not limited to a metal layer formed by electroplating (such as the first protective layer 104) or a CVD film (such as the second protective layer 105). The protective layer T can also be defined by inkjetting ink through a nozzle using an inkjet method.

[0047] The wire structure of the present application can be used in structures where the spacing of the fine traces 103 is less than 2 μm, such as 2.5D / 3DIC / hybrid bonding structures...

[0048] The features of several embodiments are outlined above, enabling those skilled in the art to better understand aspects of the present utility model. Those skilled in the art should understand that they can easily use the present utility model as a basis to design or modify other processes and structures for implementing the same purposes and / or achieving the same advantages as the embodiments described herein. Those skilled in the art should also realize that such equivalent structures do not depart from the spirit and scope of the present utility model, and various changes, substitutions, and alterations can be made to them herein without departing from the spirit and scope of the present utility model.

Claims

1. A conductor structure, characterized in that: include: a first dielectric layer; a trace located on the first dielectric layer; a first protective layer, located above the trace; as well as A second protection layer covers the first protection layer and the sidewall of the trace.

2. The conductor structure according to claim 1, characterized in that: The first protection layer has the same hardness as the trace.

3. The conductor structure according to claim 1, characterized in that: Also includes: A second dielectric layer covers the trace, the first protection layer and the second protection layer.

4. The conductor structure according to claim 1, characterized in that: Also includes: A seed layer is disposed between the first dielectric layer and the trace.

5. The conductor structure according to claim 4, characterized in that: A side surface of the seed layer is retracted from a side surface of the second protection layer.

6. The conductor structure according to claim 4, characterized in that: An upper surface of the seed layer is not aligned with a bottom surface of the second protection layer.

7. The conductor structure according to claim 6, characterized in that: The bottom surface of the second protection layer is higher than the upper surface of the seed layer.

8. The conductor structure according to claim 4, characterized in that: A side surface of the seed layer is retracted from a side surface of the first protection layer.

9. The conductor structure according to claim 3, characterized in that: An outermost surface of the second dielectric layer is aligned with an outermost surface of the first dielectric layer.

10. The conductor structure according to claim 1, characterized in that: The second protective layer and the first protective layer are in a continuously extending structure.

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