Backside illuminated image sensor

By providing the second dielectric layer and the conductive layer in the isolation stack of the back-illuminated image sensor, the wafer warping problem caused by the high stress of the tungsten metal layer is solved, and a higher quality product is achieved.

CN222916522UActive Publication Date: 2025-05-27NEXCHIP SEMICON CO LTD
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Patent Information

Application Number
CN202421859082.0
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-02
Publication Date
2025-05-27
Estimated Expiration
2034-08-02

AI Technical Summary

Technical Problem

In the back-illuminated image sensor, the stress of the tungsten metal layer is high, resulting in excessive warping of the wafer after deposition, affecting the effectiveness of the product.

Method used

A back-illuminated image sensor is designed. By providing a second dielectric layer in the isolation stack and a conductive layer on the outer surface of the second dielectric layer, the refractive index of the conductive layer is within the target range, reducing the stress of the isolation stack on the device wafer.

Benefits of technology

It effectively avoids the device wafer warping problem caused by high isolation stack stress, and improves the quality of back-illuminated sensor products by reducing optical crosstalk.

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Abstract

The utility model relates to a back-illuminated image sensor, which comprises a device wafer, an isolation layer, an isolation lamination layer and a filter layer, and is characterized in that the device wafer comprises the isolation layer covering a plurality of groove isolation structures; the surface, deviating from the trench isolation structure, of the isolation layer comprises isolation laminated layers and filter layers which are alternately distributed in the first direction; the isolation laminated layer comprises a first dielectric layer, a second dielectric layer located between the first dielectric layer and the isolation layer, and a conductive layer located on the outer side surface of the second dielectric layer, and the refractive index of the conductive layer is located in a target refractive index range. The second dielectric layer is arranged in the isolation lamination layer, and the conductive layer is arranged on the outer side surface of the second dielectric layer, so that the stress of the isolation lamination layer on the device wafer is small, the problem that the warping degree of the device wafer is too large due to the large stress of the isolation lamination layer is solved, and the refractive index of the conductive layer is within the target refractive index range; optical crosstalk can be effectively avoided, and the quality of a backside illuminated sensor product is improved.
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Description

Technical Field

[0001] The present application relates to the field of integrated circuit technologies, and particularly to a back-illuminated image sensor. Background Art

[0002] A back-illuminated (BSI) image sensor is a type of image sensor. Under low light conditions, a BSI image sensor has better performance compared to a front-illuminated image sensor.

[0003] However, in a back-illuminated image sensor (BSI CIS), there is a problem of optical crosstalk between pixel units. Currently, in order to reduce the optical crosstalk between pixel arrays, a metal grid can be set for pixel units, and the light-impermeability of the metal grid is used to prevent optical crosstalk between pixels. Currently, tungsten metal layers are usually deposited first, and then the tungsten metal layers are etched to form metal grids because the refractive index of tungsten is 1.9, which can effectively avoid optical crosstalk (crosstalk). However, due to the large stress of the tungsten metal layer, the warpage degree of the wafer is too large (>400um) after the tungsten metal layer is formed, and then the vacuum adsorption is abnormal in the metal grid photo machine stage, resulting in product failure. Summary of the Utility Model

[0004] Based on this, it is necessary to provide a back-illuminated image sensor for the problem that the warpage degree of the wafer is too large after depositing the tungsten metal layer due to the large stress of the tungsten metal layer in the existing BSI image sensor products.

[0005] The present application provides a back-illuminated image sensor, including:

[0006] A device wafer, in which a plurality of trench isolation structures are distributed at intervals along a first direction, and an isolation layer covering the plurality of trench isolation structures is included on the device wafer;

[0007] On the surface of the isolation layer facing away from the trench isolation structure, an isolation stack and a filter layer are alternately distributed along the first direction;

[0008] Among them, the isolation stack includes a first dielectric layer, a second dielectric layer located between the first dielectric layer and the isolation layer, and a conductive layer located on the outer surface of the second dielectric layer, and the refractive index of the conductive layer is within a target refractive index range.

[0009] The back-illuminated image sensor in this application includes: a device wafer, an isolation layer, an isolation stack, and a filter layer. Among them, the device wafer includes a plurality of trench isolation structures spaced along a first direction, and the isolation layer covering the plurality of trench isolation structures is provided on the device wafer; on the surface of the isolation layer facing away from the trench isolation structures, there are isolation stacks and filter layers alternately distributed along the first direction; among them, the isolation stack includes a first dielectric layer, a second dielectric layer located between the first dielectric layer and the isolation layer, and a conductive layer located on the outer surface of the second dielectric layer, and the refractive index of the conductive layer is within the target refractive index range. By providing the second dielectric layer in the isolation stack and providing the conductive layer on the outer surface of the second dielectric layer, and the refractive index of the conductive layer is within the target refractive index range, the stress of the isolation stack on the device wafer is small, solving the problem that the warpage of the device wafer is too large due to the large stress of the isolation stack, and the refractive index of the conductive layer is within the target refractive index range, which can effectively avoid optical crosstalk and improve the quality of the back-illuminated sensor product.

[0010] In one embodiment, three adjacent filter layers along the first direction are used to form a tricolor pixel.

[0011] In one embodiment, the top surface of the first dielectric layer is flush with the top surface of the filter layer.

[0012] In one embodiment, the top surface of the conductive layer is flush with the top surface of the second dielectric layer.

[0013] In one embodiment, the isolation layer includes a third dielectric layer and a fourth dielectric layer located between the third dielectric layer and the trench isolation structure;

[0014] Among them, the third dielectric layer is located between the filter layer and the fourth dielectric layer.

[0015] In one embodiment, the back-illuminated image sensor further includes a plurality of photodiodes located in the device wafer and spaced along the first direction;

[0016] The photodiodes are located between adjacent trench isolation structures along the first direction and below the corresponding filter layer.

[0017] In one embodiment, the bottom surface of the photodiode is flush with the bottom surface of the device wafer.

[0018] In one embodiment, the back-illuminated image sensor further includes:

[0019] An optical lens, which is provided one-to-one with the filter layer;

[0020] Among them, the optical lens is located on the top surface of the corresponding filter layer.

[0021] In one embodiment, the back-illuminated image sensor further includes:

[0022] Carrier wafer

[0023] Intermediate stack, located between the carrier wafer and the device wafer

[0024] In one embodiment, the longitudinal cross-section of the isolation stack parallel to the first direction is trapezoidal

[0025] The back-illuminated image sensor of the present application has the following unexpected effects

[0026] The back-illuminated image sensor in the present application includes: a device wafer, an isolation layer, an isolation stack, and a filter layer. Among them, the device wafer includes a plurality of trench isolation structures distributed at intervals along the first direction, and the device wafer includes an isolation layer covering the plurality of trench isolation structures; on the surface of the isolation layer facing away from the trench isolation structures, there are an isolation stack and a filter layer alternately distributed along the first direction; among them, the isolation stack includes a first dielectric layer, a second dielectric layer located between the first dielectric layer and the isolation layer, and a conductive layer located on the outer surface of the second dielectric layer. The refractive index of the conductive layer is within the target refractive index range. By providing the second dielectric layer in the isolation stack and providing the conductive layer on the outer surface of the second dielectric layer, and the refractive index of the conductive layer is within the target refractive index range, the stress of the isolation stack on the device wafer is small, solving the problem of excessive warpage of the device wafer caused by large stress of the isolation stack, and the refractive index of the conductive layer is within the target refractive index range, which can effectively avoid optical crosstalk and improve the quality of the back-illuminated sensor product Description of the Drawings

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings

[0028] Figure 1 It is a schematic cross-sectional structure diagram of a back-illuminated image sensor provided in an embodiment

[0029] Description of the reference numerals

[0030] 10. Device wafer; 101. Trench isolation structure; 20. Isolation layer; 201. Third dielectric layer; 202. Fourth dielectric layer; 30. Isolation stack; 301. First dielectric layer; 302. Second dielectric layer; 303. Conductive layer; 40. Filter layer; 50. Photodiode; 60. Optical lens; 70. Carrier wafer; 80. Intermediate stack Detailed Embodiments

[0031] To facilitate the understanding of the present application, the present application will be described more comprehensively below with reference to the relevant accompanying drawings. Preferred embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terms used in the description of this application herein are for the purpose of describing specific embodiments only and are not intended to limit this application.

[0033] It should be understood that when an element or layer is referred to as "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or there may be intervening elements or layers. In contrast, when an element is referred to as "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of this application, the first element, component, region, layer, doping type or part discussed below may be referred to as the second element, component, region, layer or part; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types. For example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0034] Spatial relationship terms such as "under", "below", "lower", "beneath", "above", "upper", etc. can be used herein to describe the relationship of one element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatial relationship terms also include different orientations of the device in use and operation. For example, if the device in the figures is flipped, an element or feature described as "under other elements" or "beneath them" or "underneath them" will be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. In addition, the device may also have other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are to be interpreted accordingly.

[0035] As used herein, the singular forms "a", "an" and "the" may also include the plural forms unless the context clearly dictates otherwise. It should also be understood that when the terms "comprise" and / or "include" are used in this specification, the presence of the stated features, integers, steps, operations, elements and / or components can be ascertained, but one or more other features, integers, steps, operations, elements, components and / or groups thereof are not precluded from existence or addition. Also, as used herein, the term "and / or" includes any and all combinations of the associated listed items.

[0036] Embodiments of the utility model are described herein with reference to cross-sectional views that are schematic illustrations of ideal embodiments (and intermediate structures) of the present application, such that variations in the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are to be expected. Accordingly, embodiments of the present application should not be limited to the specific shapes of regions shown herein, but include shape deviations due to, for example, manufacturing techniques. For example, an implantation region shown as rectangular will typically have rounded or curved features at its edges and / or an implantation concentration gradient, rather than a binary change from the implanted region to the non-implanted region. Similarly, a buried region formed by implantation can result in some implantation in the region between the buried region and the surface through which the implantation takes place. Thus, the regions shown in the figures are substantially schematic, their shapes do not represent the actual shapes of regions of the device, and do not limit the scope of the present application.

[0037] Please refer to Figure 1, this application provides a back-illuminated image sensor, comprising: a device wafer 10, an isolation layer 20, an isolation stack 30, and a filter layer 40; wherein, the device wafer 10 includes a plurality of trench isolation structures 101 spaced along a first direction, and the isolation layer 20 covering the plurality of trench isolation structures 101 is disposed on the device wafer 10; on the surface of the isolation layer 20 facing away from the trench isolation structures 101, the isolation stack 30 and the filter layer 40 are alternately distributed along the first direction, and the filter layer 40 is used to form pixel structures; wherein, the isolation stack 30 includes a first dielectric layer 301, a second dielectric layer 302 between the first dielectric layer 301 and the isolation layer 20, and a conductive layer 303 on the outer surface of the second dielectric layer 302, and the refractive index of the conductive layer 303 is within a target refractive index range.

[0038] As an example, please continue to refer to Figure 1 , the device wafer 10 may include but is not limited to at least one of a silicon wafer, a gallium nitride (GaN) wafer, a silicon carbide (SiC) wafer, a sapphire wafer, a silicon-on-insulator (SOI) wafer, a silicon-on-diamond (SOD) wafer, and a strained-layer silicon wafer deposited on a germanium-silicon wafer. Therefore, the type of the device wafer 10 should not limit the protection scope of the present disclosure. The diameter of the device wafer 10 may include but is not limited to 25 mm, 51 mm, 76 mm, 100 mm, 125 mm, 150 mm, 200 mm, 300 mm, 450 mm, or more than 675 mm. Therefore, the size of the device wafer 10 should not limit the protection scope of the present disclosure.

[0039] Specifically, please continue to refer to Figure 1 , a first direction and a second direction intersecting each other (for example, perpendicular to each other) are defined in the top and bottom directions of the device wafer 10 (i.e., the plane where the device wafer 10 is located). Among them, the first direction and the second direction may be perpendicular to each other. In the embodiment of the present application, the first direction is defined as the X-axis direction, and the second direction is defined as the Y-axis direction.

[0040] Exemplarily, the shape of the longitudinal section (the section parallel to the XOY plane) of the plurality of trench isolation structures 101 may include but is not limited to a regular trapezoid, an inverted trapezoid, a rectangle, etc., or may also be a combination of a regular trapezoid, an inverted trapezoid, a rectangle, etc. In other embodiments, it can be set according to actual requirements.

[0041] Exemplarily, please continue to refer to Figure 1, the isolation layer 20 can isolate electrons and light energy, avoid electron migration to adjacent photosensitive regions, and improve light reflection and refraction, so as to focus light on the photosensitive region. The shape of the longitudinal section (the section parallel to the XOY plane) of the isolation layer 20 can include a rectangle, etc., and the present application does not specifically limit the shape and size of the isolation layer 20. The isolation layer 20 can isolate the device wafer 10 and the filter layer 40.

[0042] Exemplarily, please continue to refer to Figure 1 , Figure 1 , in FIG. A of

[0043] Exemplarily, please continue to refer to Figure 1 , three filter layers 40 adjacent along the first direction can sequentially include: a red filter, a green filter, and a blue filter. The red filter transmits red light waves, the yellow filter transmits yellow light waves, and the blue filter transmits blue light waves. When light passes through the filter layer 40, a high transmittance in a certain wavelength band (color) can be maintained, thereby enhancing the photoelectric conversion effect. The thickness of the filter layer 40 is associated with the thickness of the isolation stack 30. For example, they are equal. Therefore, the thickness of the isolation stack 30 needs to ensure that it can meet the isolation requirements, and the thickness of the isolation stack 30 cannot be too thick to occupy the space of the filter layer 40.

[0044] Please continue to refer to Figure 1 A back-illuminated image sensor includes: a device wafer 10, an isolation layer 20, an isolation stack 30, and a filter layer 40. Among them, the device wafer 10 includes a plurality of trench isolation structures 101 spaced along a first direction, and the device wafer 10 is provided with an isolation layer 20 covering the plurality of trench isolation structures 101; on the surface of the isolation layer 20 facing away from the trench isolation structures 101, there are alternately arranged isolation stacks 30 and filter layers 40 along the first direction, and the filter layer 40 is used to form pixel structures; among them, the isolation stack 30 includes a first dielectric layer 301, a second dielectric layer 302 located between the first dielectric layer 301 and the isolation layer 20, and a conductive layer 303 located on the outer surface of the second dielectric layer 302, and the refractive index of the conductive layer 303 is within a target refractive index range. By providing the second dielectric layer 302 in the isolation stack 30 and providing the conductive layer 303 on the outer surface of the second dielectric layer 302, and the refractive index of the conductive layer 303 is within the target refractive index range, the stress of the isolation stack 30 on the device wafer 10 is small, solving the problem that the warpage degree of the device wafer 10 is too large due to the large stress of the isolation stack 30, and the refractive index of the conductive layer 303 is within the target refractive index range, which can effectively avoid optical crosstalk and improve the quality of the back-illuminated sensor product.

[0045] In one embodiment, please continue to refer to Figure 1 Three adjacent filter layers 40 along the first direction are used to form tricolor pixels.

[0046] As an example, three adjacent filter layers 40 along the first direction are used to form tricolor pixels. For example, three adjacent filter layers 40 along the first direction can be used to form a red pixel, a green pixel, and a blue pixel in sequence, or other arrangements of the above three primary color pixels along the first direction.

[0047] In the above embodiment, by using three adjacent filter layers 40 along the first direction to form tricolor pixels, the tricolor pixels can complete the photoelectric conversion of the back-illuminated sensor and convert photons into electrons.

[0048] In one embodiment, please continue to refer to Figure 1 The top surface of the first dielectric layer 301 is flush with the top surface of the filter layer 40.

[0049] As an example, the top surface of the first dielectric layer 301 is flush with the top surface of the filter layer 40 to ensure that the isolation stack 30 can meet the isolation requirements, and the thickness of the isolation stack 30 does not occupy the space of the filter layer 40.

[0050] In the above embodiments, by setting the top surface of the first dielectric layer 301 to be flush with the top surface of the filter layer 40, it is ensured that the isolation stack 30 can meet the isolation requirements, thereby expanding the area of the photosensitive region.

[0051] In one embodiment, please continue to refer to Figure 1 , the top surface of the conductive layer 303 is flush with the top surface of the second dielectric layer 302.

[0052] As an example, since the refractive index of the conductive layer is within the target refractive index range, the top surface of the conductive layer 303 being flush with the top surface of the second dielectric layer 302 can effectively avoid optical crosstalk.

[0053] In the above embodiments, by setting the top surface of the conductive layer 303 to be flush with the top surface of the second dielectric layer 302, it can ensure that light is focused onto the filter layer 40.

[0054] In one embodiment, please continue to refer to Figure 1 , the isolation layer 20 includes a third dielectric layer 201 and a fourth dielectric layer 202 located between the third dielectric layer 201 and the trench isolation structure 101; wherein, the third dielectric layer 201 is located between the filter layer 40 and the fourth dielectric layer 202.

[0055] As an example, please continue to refer to Figure 1 , the material of the third dielectric layer 201 can be, but is not limited to, a high-k material; the fourth dielectric layer 202 can include, but is not limited to, a silicon dioxide layer. The shapes of the longitudinal cross-sections (the cross-sections parallel to the XOY plane) of the third dielectric layer 201 and the fourth dielectric layer 202 can include rectangles, etc. The present application does not specifically limit the shapes and sizes of the third dielectric layer 201 and the fourth dielectric layer 202. The third dielectric layer 201 and the fourth dielectric layer 202 can isolate the device wafer 10 and the filter layer 40.

[0056] In the above embodiments, please continue to refer to Figure 1 , the third dielectric layer 201 and the fourth dielectric layer 202 can isolate electrons and light energy to isolate the device wafer 10 and the filter layer 40.

[0057] In one embodiment, please continue to refer to Figure 1 , the back-illuminated image sensor further includes a plurality of photodiodes 50 located within the device wafer 10 and spaced apart along a first direction; the photodiodes 50 are located between the trench isolation structures 101 adjacent along the first direction and below the corresponding filter layer 40.

[0058] As an example, please continue to refer to Figure 1, the photodiode 50 can receive the light from the filter layer 40 and then convert the light energy into electrical energy. The photodiode 50 is located below the corresponding filter layer 40 and can receive more light, so that the back-illuminated image sensor has higher sensitivity and signal-to-noise ratio. The photodiode 50 does not overly occupy the area of the circuit supporting the photodiode 50, and a larger circuit area can improve the speed of the back-illuminated image sensor.

[0059] In the above embodiments, please continue to refer to Figure 1 , the photodiode 50 can receive more light, so that the back-illuminated image sensor has higher sensitivity and signal-to-noise ratio.

[0060] In one embodiment, please continue to refer to Figure 1 , the bottom surface of the photodiode 50 is flush with the bottom surface of the device wafer 10, so that the light can directly reach the photodiode 50 without passing through the metal lines, thereby increasing the light-sensing amount.

[0061] In the above embodiments, please continue to refer to Figure 1 , the bottom surface of the diode 50 is flush with the bottom surface of the device wafer 10, increasing the light-sensing amount, avoiding the obstruction of the metal lines and transistors, and the aperture ratio can be increased to nearly 100%, thereby improving the sensitivity.

[0062] In one embodiment, please continue to refer to Figure 1 , the back-illuminated image sensor further includes an optical lens 60, and the optical lens 60 is arranged one-to-one with the filter layer 40; wherein, the optical lens 60 is located on the top surface of the corresponding filter layer 40.

[0063] As an example, please continue to refer to Figure 1 , the top of the optical lens 60 is in the shape of an outwardly convex arc, which can focus the incident light on the photoinductive area, and the curvature of the surface of the optical lens 60 can be changed according to the light-concentrating requirements to improve the light-sensing efficiency.

[0064] In one embodiment, please continue to refer to Figure 1 , the back-illuminated image sensor further includes a carrier wafer 70 and an intermediate stack 80, and the intermediate stack 80 is located between the carrier wafer 70 and the device wafer 10.

[0065] As an example, please continue to refer to Figure 1, the carrier wafer 70 may include but is not limited to at least one of a silicon wafer, a gallium nitride (GaN) wafer, a silicon carbide (SiC) wafer, a sapphire wafer, a silicon on insulator (SOI) wafer, a silicon on diamond (SOD) wafer, and a strained layer silicon wafer deposited on a silicon germanium wafer. Therefore, the type of the carrier wafer 70 should not limit the protection scope of the present disclosure. The diameter of the carrier wafer 70 may include but is not limited to 25 mm, 51 mm, 76 mm, 100 mm, 125 mm, 150 mm, 200 mm, 300 mm, 450 mm, or more than 675 mm. Therefore, the size of the carrier wafer 70 should not limit the protection scope of the present disclosure. The device wafer 10 and the carrier wafer 70 may be connected through an intermediate stack 80 by using a bonding process so that photosensitive elements are provided in the device wafer, and the carrier wafer 70 may serve as a carrier substrate for subsequent processes.

[0066] In the above embodiments, the carrier wafer may serve as a carrier substrate for subsequent processes.

[0067] In one embodiment, the longitudinal section of the isolation stack parallel to the first direction is trapezoidal.

[0068] As an example, the longitudinal section of the isolation stack parallel to the first direction is trapezoidal. By using the isolation stack with a trapezoidal longitudinal section, the light incident amount can be increased while the distance between two adjacent filter layers is maximally increased, thereby enhancing the isolation performance of the first isolation structure.

[0069] In the above embodiments, the longitudinal section of the isolation stack parallel to the first direction is trapezoidal, so that the light incident amount can be increased while the distance between two adjacent filter layers is maximally increased, thereby enhancing the isolation performance of the first isolation structure.

[0070] The back-illuminated image sensor of the present application has the following unexpected effects:

[0071] The back-illuminated image sensor in the present application includes: a device wafer, an isolation layer, an isolation stack, and a filter layer. Among them, the device wafer includes a plurality of trench isolation structures spaced along a first direction, and the isolation layer covering the plurality of trench isolation structures is disposed on the device wafer; on the surface of the isolation layer facing away from the trench isolation structures, the isolation stack and the filter layer are alternately distributed along the first direction; wherein, the isolation stack includes a first dielectric layer, a second dielectric layer located between the first dielectric layer and the isolation layer, and a conductive layer located on the outer surface of the second dielectric layer, and the refractive index of the conductive layer is within the target refractive index range. By providing the second dielectric layer in the isolation stack and providing the conductive layer on the outer surface of the second dielectric layer, and the refractive index of the conductive layer is within the target refractive index range, the stress of the isolation stack on the device wafer is small, solving the problem that the warpage degree of the device wafer is too large due to the large stress of the isolation stack, and the refractive index of the conductive layer is within the target refractive index range, which can effectively avoid optical crosstalk and improve the quality of the back-illuminated sensor product.

[0072] The technical features of the above embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0073] The above embodiments only represent several implementation manners of the present application. The description is relatively specific and detailed, but it cannot be understood as a limitation to the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several deformations and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A back-illuminated image sensor, characterized in that: include: A device wafer, wherein the device wafer includes a plurality of trench isolation structures spaced apart and distributed along a first direction, and the device wafer includes an isolation layer covering the plurality of trench isolation structures; The isolation layer includes isolation stacks and filter layers alternately distributed along the first direction on a surface away from the trench isolation structure; The isolation stack includes a first dielectric layer, a second dielectric layer located between the first dielectric layer and the isolation layer, and a conductive layer located on the outer surface of the second dielectric layer, and the refractive index of the conductive layer is within a target refractive index range.

2. The back-illuminated image sensor according to claim 1, wherein: The three filter layers adjacent to each other along the first direction are used to form three-primary color pixels.

3. The back-illuminated image sensor according to claim 1, wherein: The top surface of the first dielectric layer is flush with the top surface of the filter layer.

4. The back-illuminated image sensor according to claim 1, wherein: A top surface of the conductive layer is flush with a top surface of the second dielectric layer.

5. The back-illuminated image sensor according to any one of claims 1 to 4, characterized in that: The isolation layer includes a third dielectric layer and a fourth dielectric layer located between the third dielectric layer and the trench isolation structure; Wherein, the third dielectric layer is located between the filter layer and the fourth dielectric layer.

6. The back-illuminated image sensor according to any one of claims 1 to 4, characterized in that: Also included are a plurality of photodiodes located in the device wafer and spaced apart along the first direction; The photodiode is located between the trench isolation structures adjacent to each other along the first direction and is located below a corresponding filter layer.

7. The back-illuminated image sensor according to claim 6, wherein: The bottom surface of the photodiode is flush with the bottom surface of the device wafer.

8. The back-illuminated image sensor according to any one of claims 1 to 4, characterized in that: Also includes: An optical lens is arranged one-to-one with the filter layer; Wherein, the optical lens is located on the top surface of the corresponding filter layer.

9. The back-illuminated image sensor according to any one of claims 1 to 4, characterized in that: Also includes: Carrying wafers; The middle stack is located between the carrier wafer and the device wafer.

10. The back-illuminated image sensor according to any one of claims 1 to 4, characterized in that: A longitudinal section of the isolation stack parallel to the first direction is trapezoidal.