Light-emitting device structure

By designing a light emitting device structure that increases current flow channel in the LED chip, using a symmetrical depression structure to optimize current expansion and reduce thermal effects, the problems of low luminous efficiency and low stability in the prior art are solved, and higher stability and lower heat loss are achieved.

CN222916535UActive Publication Date: 2025-05-27GEN SEMICONDUCTOR (ANHUI) CO LTD
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Patent Information

Application Number
CN202421899717.X
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-07
Publication Date
2025-05-27
Estimated Expiration
2034-08-07

AI Technical Summary

Technical Problem

In existing LED chips, the electricity flowing through the device cannot be converted into light, resulting in low luminescence efficiency, loss of device heat generation, and low stability.

Method used

A light emitting device structure is designed to increase the current flow channel, optimize the horizontal and longitudinal expansion of the current by providing symmetrical first and second depressions in the light emitting region and periphery, reduce thermal effects, and release stress generated by the insulating layer through the second depression.

Benefits of technology

It improves the stability of the device, reduces unstable factors such as warping caused by stress or insulating layer fracture, optimizes current expansion, and reduces the thermal effect generated by device operation.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to a luminescent device structure, which comprises a substrate, a first semiconductor layer, a second semiconductor layer and an active layer, the first recesses and the second recesses penetrate through the second semiconductor layer and the active layer and extend into the first semiconductor layer, the first recesses and the second recesses are arranged at two positions, and the corresponding first recesses and the corresponding second recesses are symmetrically arranged; the first conducting layer is in ohmic contact with the second semiconductor layer; the reflecting layer is electrically connected with the first conducting layer; the second conducting layer is electrically connected with the reflecting layer; the third conducting layer is electrically connected with the second conducting layer; and the first conductive layer, the reflecting layer, the second conductive layer, the third conductive layer and the first bonding pad jointly form a first electric connection layer. On the premise that the light-emitting area is not reduced, current flowing channels are increased, then transverse expansion and longitudinal expansion of current are optimized, the heat effect generated by device work is reduced, and the device stability is improved.
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Description

Technical Field

[0001] The utility model relates to the technical field of semiconductor lasers, and particularly relates to a light-emitting device structure. Background Art

[0002] In an LED chip, the P / N conduction path is to set a plurality of regularly arranged depressions in the light-emitting area. The current flow from P to N is realized through a reflective layer and a conductive layer designed with multiple metals. The P and N are isolated by an insulating layer to prevent direct conduction and short circuit, thereby realizing light emission. In the prior art, the electricity flowing through the device cannot be completely converted into light. Therefore, improving the light-emitting efficiency of the device, reducing losses such as device heating, and stabilizing the device are technical points that the semiconductor industry has been trying to overcome. The utility model proposes a light-emitting device structure to optimize current spreading, thereby stabilizing the structure and method of the device. Summary of the Utility Model

[0003] Based on the technical problems existing in the background art, the utility model proposes a light-emitting device structure, which increases the current flow channels without reducing the light-emitting area, thereby optimizing the lateral and longitudinal spreading of the current, reducing the thermal effect generated during the operation of the device, and improving the stability of the device.

[0004] A light-emitting device structure proposed by the utility model includes a substrate, a first semiconductor layer, a second semiconductor layer, and an active layer; the first semiconductor layer, the active layer, and the second semiconductor layer are sequentially grown on the substrate; the following are further included:

[0005] A first depression and a second depression that penetrate the second semiconductor layer and the active layer and extend into the first semiconductor layer. There are two sets of the first depression and the second depression, and the corresponding first depression and second depression are symmetrically arranged;

[0006] A first conductive layer that forms an ohmic contact with the second semiconductor layer, a reflective layer that is electrically connected to the first conductive layer, a second conductive layer that is electrically connected to the reflective layer, a third conductive layer that is electrically connected to the second conductive layer, and a first pad that is electrically connected to the third conductive layer; the first conductive layer, the reflective layer, the second conductive layer, the third conductive layer, and the first pad together form a first electrical connection layer;

[0007] A first insulating layer covering a part of the surface of the second semiconductor layer and a part of the surface of the first conductive layer; a second insulating layer covering the side wall of the first depression, a part of the surface of the first insulating layer, and one side of the first electrical connection layer; a third conductive layer contacting the surface of the second insulating layer and forming an electrical connection with the first semiconductor layer, and the third conductive layer and the second pad form a second electrical connection layer;

[0008] A third insulating layer covering the surface of the third conductive layer and isolating the direct conduction between the first electrical connection layer and the second electrical connection layer;

[0009] The first recesses are distributed in the light-emitting region, and the second recesses are distributed in the periphery of the light-emitting region, and the potentials of the regions of the first recesses and the second recesses are the same.

[0010] Preferably, the first recesses are distributed in an array form in the light-emitting region; the second recesses are regularly distributed in the periphery of the light-emitting region.

[0011] Preferably, the second recesses release the stress generated by the insulating layer.

[0012] Preferably, the second recesses increase the channels for current flow.

[0013] Preferably, the reflective layer comprises a multi-layer structure, and the second conductive layer, the third conductive layer, and the first pad all comprise a multi-layer metal structure.

[0014] The beneficial effects of the present utility model are as follows:

[0015] The design of the second recesses can release the stress generated by the insulating layer, reduce unstable factors such as warping or insulating layer fracture caused by stress, and thus improve the stability of the device;

[0016] The potentials of the regions of the first recesses and the second recesses are the same, which can prevent metal migration and the like inside the device due to potential difference, and thus improve the stability of the device;

[0017] The design of the second recesses increases the channels for current flow, thus optimizing the lateral expansion and longitudinal expansion of the current, reducing the thermal effect generated during the operation of the device, and improving the stability of the device. Description of the Drawings

[0018] Figure 1 It is a schematic structural diagram of the prior art.

[0019] Figure 2 It is a schematic structural diagram of a light-emitting device structure proposed by the present utility model.

[0020] Figure 3 It is a schematic diagram of the current channel of the prior art.

[0021] Figure 4 It is a schematic diagram of the current channel of a light-emitting device structure proposed by the present utility model.

[0022] Figure 5 It is a P-N cross-sectional structure diagram of a light-emitting device structure proposed by the present utility model.

[0023] Figure 6 It is a P-P cross-sectional structure diagram of a light-emitting device structure proposed by the present utility model.

[0024] Figure 7 It is a distribution diagram of the first example recesses of a light-emitting device structure proposed by the present utility model.

[0025] Figure 8 The second example depression distribution diagram of a light-emitting device structure proposed by the present utility model.

[0026] Figure 9 The third example depression distribution diagram of a light-emitting device structure proposed by the present utility model.

[0027] In the figure: 1. The first semiconductor layer, 2. The second semiconductor layer, 3. The substrate, 4. The active layer, 5. The first depression, 6. The second depression, 7. The first conductive layer, 8. The reflective layer, 9. The second conductive layer, 10. The third conductive layer, 11. The first pad, 12. The first insulating layer, 13. The second insulating layer, 14. The third insulating layer, 15. The second pad. Specific embodiments

[0028] Next, the technical solutions in the embodiments of the present utility model will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all of the embodiments.

[0029] Referring to Figures 1-9 , a light-emitting device structure includes a substrate 3, a first semiconductor layer 1, a second semiconductor layer 2, and an active layer 4; the first semiconductor layer 1, the active layer 4, and the second semiconductor layer 2 are sequentially grown on the substrate 3; it further includes the following:

[0030] The first depression 5 and the second depression 6 penetrate through the second semiconductor layer 2 and the active layer 4 and extend into the first semiconductor layer 1. Both the first depression 5 and the second depression 6 are provided in two places, and the corresponding first depression 5 and the second depression 6 are symmetrically arranged;

[0031] The first conductive layer 7 that forms an ohmic contact with the second semiconductor layer 2, the reflective layer 8 that is electrically connected to the first conductive layer 7, the second conductive layer 9 that is electrically connected to the reflective layer 8, the third conductive layer 10 that is electrically connected to the second conductive layer 9, and the first pad 11 that is electrically connected to the third conductive layer 10; the first conductive layer 7, the reflective layer 8, the second conductive layer 9, the third conductive layer 10, and the first pad 11 together form the first electrical connection layer;

[0032] The first insulating layer 12 covering a part of the surface of the second semiconductor layer 2 and a part of the surface of the first conductive layer 7; the second insulating layer 13 covering the side wall of the first depression 5, a part of the surface of the first insulating layer 12, and one side of the first electrical connection layer; the third conductive layer 10 contacting the surface of the second insulating layer 13 and forming an electrical connection with the first semiconductor layer 1, and the third conductive layer 10 and the second pad 15 form the second electrical connection layer;

[0033] The third insulating layer 14 covering the surface of the third conductive layer 10 and isolating the direct conduction between the first electrical connection layer and the second electrical connection layer;

[0034] The first recess 5 is distributed in the light-emitting region, the second recess 6 is distributed in the periphery of the light-emitting region, and the potentials of the regions of the first recess 5 and the second recess 6 are the same.

[0035] Compared with the prior art, referring to Figure 1 , 3 ; Only the first recess 5 is provided in the prior art, referring to Figure 2 and 4 , the second recess 6 is added, the channel for current flow is increased, thereby optimizing the lateral expansion and longitudinal expansion of the current, reducing the thermal effect generated by the operation of the device, and improving the stability of the device.

[0036] Referring to Figure 7 , 8 , 9, the first recesses 5 are distributed in an array form in the light-emitting region; the second recesses 6 are regularly distributed in the periphery of the light-emitting region. It is not limited to the design such as Figure 7 , 8 , 9, and this structure includes any relevant and similar changes.

[0037] Adding the second recess 6 can release the stress generated by the insulating layer; in addition, the potentials of the regions of the first recess 5 and the second recess 6 are the same, which can prevent metal migration inside the device due to potential difference, thereby improving the stability of the device.

[0038] Referring to Figure 5 and 6 , there are obvious differences between the second insulating layer and the third conductive layer, wherein the reflective layer 8 is a multi-layer structure, and the second conductive layer 9, the third conductive layer 10, and the first pad 11 are all multi-layer metal structures.

[0039] As mentioned above, it is only the preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention, according to the technical solution and the inventive concept of the present invention, makes equivalent substitutions or changes, and all should be covered within the protection scope of the present invention.

Claims

1. A light emitting device structure, comprising a substrate (3), a first semiconductor layer (1), a second semiconductor layer (2) and an active layer (4); the first semiconductor layer (1), the active layer (4) and the second semiconductor layer (2) are sequentially grown on the substrate (3); characterized in that: Also includes the following: A first depression (5) and a second depression (6) which penetrate the second semiconductor layer (2) and the active layer (4) and extend into the first semiconductor layer (1), wherein the first depression (5) and the second depression (6) are both provided at two locations, and the corresponding first depressions (5) and second depressions (6) are both symmetrically provided; A first conductive layer (7) forming an ohmic contact with the second semiconductor layer (2), a reflective layer (8) electrically connected to the first conductive layer (7), a second conductive layer (9) electrically connected to the reflective layer (8), a third conductive layer (10) electrically connected to the second conductive layer (9), and a first pad (11) electrically connected to the third conductive layer (10); the first conductive layer (7), the reflective layer (8), the second conductive layer (9), the third conductive layer (10), and the first pad (11) together constitute a first electrical connection layer; A first insulating layer (12) covering a portion of the surface of the second semiconductor layer (2) and a portion of the surface of the first conductive layer (7); a second insulating layer (13) covering a side wall of the first recess (5), a portion of the surface of the first insulating layer (12) and one side of the first electrical connection layer; a third conductive layer (10) contacting the surface of the second insulating layer (13) and forming an electrical connection with the first semiconductor layer (1), the third conductive layer (10) and the second pad (15) forming a second electrical connection layer; A third insulating layer (14) covering the surface of the third conductive layer (10) and isolating the first electrical connection layer from the second electrical connection layer so as to allow direct conduction; The first depression (5) is distributed in the light-emitting area, the second depression (6) is distributed in the light-emitting periphery, and the potentials of the first depression (5) and the second depression (6) are consistent.

2. A light emitting device structure according to claim 1, characterized in that: The first recesses (5) are distributed in an array form in the light-emitting area; and the second recesses (6) are regularly distributed around the light-emitting area.

3. A light emitting device structure according to claim 1, characterized in that: The second recess (6) releases the stress generated by the insulating layer.

4. A light emitting device structure according to claim 1, characterized in that: The second recess (6) increases the passage for current to flow.

5. A light emitting device structure according to claim 1, characterized in that: The reflective layer (8) comprises a multi-layer structure, and the second conductive layer (9), the third conductive layer (10) and the first pad (11) all comprise a multi-layer metal structure.