Display panel

Abstract

The utility model discloses a display panel, which comprises a plurality of pixels, a gate line, a data line and a first common electrode, and is characterized in that each pixel comprises a main pixel electrode, a secondary pixel electrode, a first thin film transistor and a second thin film transistor; the first thin film transistor and the second thin film transistor are both arranged between the main pixel electrode and the secondary pixel electrode, a drain electrode of the first thin film transistor is electrically connected with the main pixel electrode, a drain electrode of the second thin film transistor is electrically connected with the secondary pixel electrode, and the first common electrode comprises a first line segment, a second line segment and a third line segment; the second line segment is connected with one end of the first line segment, the third line segment is connected with the other end of the first line segment, the first line segment extends in the row direction of the display panel, and the first line segment is located on the side, away from the sub-pixel electrode, of the main pixel electrode or located on the side, away from the main pixel electrode, of the sub-pixel electrode; the gate line is arranged between the main pixel electrode and the secondary pixel electrode.

Description

Technical Field

[0001] This application relates to the field of display technologies, and particularly to a display panel. Background Art

[0002] Reference Figure 1 , in the traditional solution, the pixels of a liquid crystal display panel include a main pixel electrode 01, a sub-pixel electrode 02, a gate line 03, and two common electrode lines 04. The two common electrode lines 04 both extend along the row direction of the liquid crystal display panel, and the two common electrode lines 04 are located between the main pixel electrode and the sub-pixel electrode 02. The gate line 03 is located between the two common electrode lines 04. Since two common electrode lines 04 are provided in the non-opening area between the main pixel electrode 01 and the sub-pixel electrode 02, the area of the non-opening area of the pixel increases, resulting in a decrease in the aperture ratio of the pixels of the liquid crystal display panel. Summary of the Utility Model

[0003] Embodiments of this application provide a display panel to improve the problem of low aperture ratio of the pixels of the display panel.

[0004] Embodiments of this application provide a display panel, including:

[0005] Multiple pixels, where the pixels include a main pixel electrode, a sub-pixel electrode, a first thin-film transistor, and a second thin-film transistor. The first thin-film transistor and the second thin-film transistor are both disposed between the main pixel electrode and the sub-pixel electrode. The drain of the first thin-film transistor is electrically connected to the main pixel electrode, and the drain of the second thin-film transistor is electrically connected to the sub-pixel electrode;

[0006] Multiple gate lines, where the gate lines are disposed between the main pixel electrode and the sub-pixel electrode, and the gate lines are electrically connected to the gates of the first thin-film transistor and the second thin-film transistor;

[0007] Multiple data lines, where the data lines are electrically connected to the sources of the first thin-film transistor and the data lines are electrically connected to the sources of the second thin-film transistor;

[0008] Multiple first common electrodes, a part of the first common electrode overlapping with a part of the main pixel electrode or a part of the sub-pixel electrode, the first common electrode including a first line segment, a second line segment, and a third line segment, the second line segment being connected to one end of the first line segment, the third line segment being connected to the other end of the first line segment, the second line segment and the third line segment extending along the column direction of the display panel, the first line segment extending along the row direction of the display panel, and the first line segment being located on a side of the main pixel electrode away from the sub-pixel electrode or the first line segment being located on a side of the sub-pixel electrode away from the main pixel electrode.

[0009] Further, in a top view of the display panel, a part of the gate line overlaps with a part of the main pixel electrode or a part of the sub-pixel electrode.

[0010] Further, among three adjacent pixels located in the row direction or column direction of the display panel, the colors are different;

[0011] The display panel further includes:

[0012] Multiple connection lines;

[0013] Multiple second common electrodes, the second common electrodes extending along the column direction of the display panel, in a top view of the display panel, a part of the second common electrode overlapping with a part of the sub-pixel electrode of the pixel with a blue color among three adjacent pixels;

[0014] A third thin-film transistor, the gate of the third thin-film transistor being electrically connected to the gate line, the drain of the third thin-film transistor being electrically connected to the sub-pixel electrode, and the source of the third thin-film transistor being electrically connected to the second common electrode;

[0015] Multiple third common electrodes, the third common electrodes being electrically connected to the second common electrodes through the connection lines, in a top view of the display panel, a part of the third common electrode overlapping with a part of the main pixel electrode.

[0016] Further, the display panel further includes multiple fourth common electrodes, the fourth common electrodes extending along the column direction of the display panel, the fourth common electrodes being electrically connected to the second common electrodes, in a top view of the display panel, a part of the fourth common electrode overlapping with a part of the main pixel electrode of the pixel with a blue color among three adjacent pixels.

[0017] Further, in the top view of the display panel, the second common electrode does not overlap with the green pixels among three adjacent pixels, the second common electrode does not overlap with the red pixels among three adjacent pixels, the fourth common electrode does not overlap with the green pixels among three adjacent pixels, and the fourth common electrode does not overlap with the red pixels among three adjacent pixels.

[0018] Further, the fourth common electrode is electrically connected to the connection line through the first via hole penetrating the film layer between the fourth common electrode and the connection line, and the third common electrode is electrically connected to the connection line through the second via hole penetrating the film layer between the third common electrode and the connection line.

[0019] Further, the main pixel electrode is electrically connected to the drain of the first thin-film transistor through the third via hole penetrating the main pixel electrode and the drain of the first thin-film transistor, and the sub-pixel electrode is electrically connected to the drain of the second thin-film transistor through the fourth via hole penetrating the sub-pixel electrode and the drain of the second thin-film transistor. The first via hole, the second via hole, the third via hole, and the fourth via hole are arranged along the row direction of the display panel, and the first via hole, the second via hole, the third via hole, and the fourth via hole are located on the same side of the gate line.

[0020] Further, the second common electrode includes a fourth line segment, and the sub-pixel electrode includes a first main electrode. In the top view of the display panel, the fourth line segment overlaps with the first main electrode.

[0021] Further, the fourth common electrode includes a fifth line segment, and the main pixel electrode includes a second main electrode. In the top view of the display panel, the fifth line segment overlaps with the second main electrode.

[0022] Further, the second common electrode further includes a first bent segment. One end of the first bent segment is connected to the fourth line segment, and the other end of the first bent segment is electrically connected to the first via hole. The fourth common electrode further includes a second bent segment. One end of the second bent segment is connected to the fifth line segment, and the other end of the second bent segment is electrically connected to the first via hole. The first via hole is not collinear with the fifth line segment, and the first via hole is not collinear with the fourth line segment.

[0023] Advantages of the present application:

[0024] The present application provides a display panel. By setting the first common electrode to include a first line segment, a second line segment, and a third line segment, the second line segment is connected to one end of the first line segment, the third line segment is connected to the other end of the first line segment, the second line segment and the third line segment extend along the column direction of the display panel, the first line segment extends along the row direction of the display panel, and the first line segment is located on the side of the main pixel electrode away from the sub-pixel electrode or the first line segment is located on the side of the sub-pixel electrode away from the main pixel electrode, a common electrode line in the non-opening area between the main pixel electrode and the sub-pixel electrode of the pixel is cancelled. Compared with the traditional solution, the number of common electrodes in the non-opening area between the main pixel electrode and the sub-pixel electrode is reduced, thereby compressing the area of the non-opening area between the main pixel electrode and the sub-pixel electrode of the pixel. When the area of the pixel remains unchanged, the area of the opening area of the pixel is increased, thereby improving the aperture ratio of the pixels of the display panel. Description of the Drawings

[0025] Figure 1 is a schematic diagram of a traditional display panel;

[0026] Figure 2 is a schematic diagram of the first structure of the display panel of the present application;

[0027] Figure 3 is Figure 2 a cross-sectional schematic diagram of the display panel shown at the A-A' position;

[0028] Figure 4 is a schematic diagram of the second structure of the display panel of the present application;

[0029] Figure 5 is Figure 4 a cross-sectional schematic diagram of the display panel shown at the B-B' position;

[0030] Figure 6 is a schematic diagram of the third structure of the display panel of the present application;

[0031] Figure 7 is a schematic diagram of the fourth structure of the display panel of the present application;

[0032] Figure 8 is an equivalent circuit diagram of the display panel of the present application.

[0033] 100 - pixel, 110 - main pixel electrode, 120 - sub - pixel electrode, 130 - first thin - film transistor, 140 - second thin - film transistor, 150 - first common electrode, 151 - first line segment, 152 - second line segment, 153 - third line segment, 160 - second common electrode, 161 - fourth line segment, 162 - first bent segment, 170 - third common electrode, 180 - fourth common electrode, 181 - fifth line segment, 182 - second bent segment, 190 - connection line, 200 - first via hole, 210 - second via hole, 220 - third via hole, 230 - fourth via hole, 240 - third thin - film transistor; 300 - gate line; 400 - data line.

[0034] 10 - substrate; 20 - common electrode layer; 30 - first insulating layer; 40 - semiconductor layer; 50 - second metal layer; 60 - second insulating layer; 70 - pixel electrode layer.

[0035] 01 - main pixel electrode; 02 - sub - pixel electrode; 03 - gate line; 04 - common electrode line. Detailed implementation manners

[0036] Next, the technical solutions in the embodiments of the present application will be described with reference to the accompanying drawings in the embodiments of the present application. The technical solutions described below are only used to explain and illustrate the idea of the present application, and should not be regarded as a limitation on the protection scope of the present application.

[0037] In addition, terms such as "first", "second" and similar words do not indicate any order, quantity or importance, but are only used to distinguish different technical features. The term "plurality" and similar words mean two or more, unless otherwise clearly defined.

[0038] An embodiment of the present application provides a display panel. Refer to Figure 2 , Figure 4 , Figure 7 and Figure 8 , the display panel includes a plurality of pixels 100, a plurality of gate lines 300, a plurality of data lines 400 and a plurality of first common electrodes 150. The pixel 100 includes a main pixel electrode 110, a sub - pixel electrode 120, a first thin - film transistor 130, and a second thin - film transistor 140.

[0039] Specifically, both the first thin-film transistor 130 and the second thin-film transistor 140 are disposed between the main pixel electrode 110 and the sub-pixel electrode 120. The drain of the first thin-film transistor 130 is electrically connected to the main pixel electrode 110, and the drain of the second thin-film transistor 140 is electrically connected to the sub-pixel electrode 120. The gate line 300 is disposed between the main pixel electrode 110 and the sub-pixel electrode 120, and the gate line 300 is electrically connected to the gates of the first thin-film transistor 130 and the second thin-film transistor 140. The data line 400 is electrically connected to the source of the first thin-film transistor 130, and the data line 400 is electrically connected to the source of the second thin-film transistor 140. The first common electrode 150 includes a first line segment 151, a second line segment 152, and a third line segment 153. The second line segment 152 is connected to one end of the first line segment 151, and the third line segment 153 is connected to the other end of the first line segment 151. The second line segment 152 and the third line segment 153 extend along the column direction of the display panel, and the first line segment 151 extends along the row direction of the display panel. Moreover, the first line segment 151 is located on the side of the main pixel electrode 110 away from the sub-pixel electrode 120 or the first line segment 151 is located on the side of the sub-pixel electrode 120 away from the main pixel electrode 110.

[0040] By setting that the first common electrode 150 includes a first line segment 151, a second line segment 152, and a third line segment 153, the second line segment 152 is connected to one end of the first line segment 151, the third line segment 153 is connected to the other end of the first line segment 151, the second line segment 152 and the third line segment 153 extend along the column direction of the display panel, the first line segment 151 extends along the row direction of the display panel, and the first line segment 151 is located on the side of the main pixel electrode 110 away from the sub-pixel electrode 120 or the first line segment 151 is located on the side of the sub-pixel electrode 120 away from the main pixel electrode 110, a common electrode line in the non-opening area between the main pixel electrode 110 and the sub-pixel electrode 120 of the pixel 100 is cancelled. Compared with the traditional solution, the number of common electrodes in the non-opening area between the main pixel electrode 110 and the sub-pixel electrode 120 is reduced, thereby compressing the area of the non-opening area between the main pixel electrode 110 and the sub-pixel electrode 120 of the pixel 100. When the area of the pixel 100 remains unchanged, the area of the opening area of the pixel 100 is increased, thereby improving the aperture ratio of the pixel 100 of the display panel.

[0041] In this embodiment, referring to Figure 3 and Figure 5, the display panel includes a substrate 10, a common electrode layer 20 disposed on the substrate 10, a first insulating layer 30 disposed on the common electrode layer 20, and the first insulating layer 30 covers the common electrode layer 20, a semiconductor layer 40 disposed on the first insulating layer 30, a second metal layer 50 disposed on the semiconductor layer 40, a second insulating layer 60 disposed on the second metal layer 50, and the second insulating layer 60 covers the second metal layer 50 and a pixel electrode layer 70 disposed on the second metal layer 50.

[0042] Among them, a data line 400 is located in the second metal layer 50, a first common electrode 150 is located in the common electrode layer 20, a third common electrode 170 is located in the common electrode layer 20, a main pixel electrode 110 is located in the pixel electrode layer 70, and a sub-pixel electrode 120 is located in the pixel electrode layer 70.

[0043] In this embodiment, the first common electrode 150 is composed of a first line segment 151, a second line segment 152 and a third line segment 153. The second line segment 152 is connected to one end of the first line segment 151, the third line segment 153 is connected to the other end of the first line segment 151. The second line segment 152 and the third line segment 153 extend along the column direction of the display panel, the first line segment 151 extends along the row direction of the display panel, and the first line segment 151 is located on the side of the main pixel electrode 110 away from the sub-pixel electrode 120 or the first line segment 151 is located on the side of the sub-pixel electrode 120 away from the main pixel electrode 110.

[0044] In this embodiment, the main pixel electrode 110 and the sub-pixel electrode 120 are on the same layer.

[0045] In this embodiment, the colors of three adjacent pixels 100 in the row direction of the display panel are different.

[0046] In this embodiment, one sub-pixel among three adjacent pixels 100 is a blue pixel 100, and the other two pixels 100 are a red pixel 100 and a green pixel 100 respectively.

[0047] Reference Figure 4 Or Figure 7 , in this embodiment, in the top view of the display panel, a part of the gate line 300 overlaps with a part of the main pixel electrode 110 or the sub-pixel electrode 120.

[0048] In this embodiment, the colors of three adjacent pixels 100 in the row direction or column direction of the display panel are different;

[0049] The display panel further includes:

[0050] Multiple connection lines 190;

[0051] The second common electrode 160 extends along the column direction of the display panel. In a top view of the display panel, a part of the second common electrode 160 overlaps with a part of the 120th sub-pixel electrodes of the pixels colored blue among three adjacent pixels;

[0052] The third thin-film transistor 240, the gate of the third thin-film transistor 240 is electrically connected to the gate line 300, the drain of the third thin-film transistor 240 is electrically connected to the sub-pixel electrode 120, and the source of the third thin-film transistor 240 is electrically connected to the second common electrode 160;

[0053] A plurality of third common electrodes 170, the third common electrodes 170 are electrically connected to the second common electrode 160 through connection lines 190. In a top view of the display panel, the third common electrodes 170 overlap with a part of the main pixel electrodes 110.

[0054] Since the aperture ratio of the blue pixels 100 of the display panel is smaller than that of the red pixels 100 and the green pixels 100, the second common electrode 160 is provided. The second common electrode 160 extends along the column direction of the display panel, and the third common electrodes 170 are electrically connected to the second common electrode 160 through connection lines 190. On the one hand, it can stabilize the voltage of the third common electrodes 170, and on the other hand, it can improve the color shift problem of the display picture of the display panel caused by the step cut of the blue pixels 100 due to the relatively thick film thickness of the blue color resist of the blue pixels 100.

[0055] In this embodiment, the connection lines 190 are located in the pixel electrode layer 70, and the second common electrode 160 is located in the second metal layer 50.

[0056] In this embodiment, refer to Figure 6 , in the top view of the display panel, the second common electrode 160 does not overlap with the pixels colored green among three adjacent pixels, and the second common electrode 160 does not overlap with the pixels colored red among three adjacent pixels.

[0057] In this embodiment, the second common electrode 160 is provided in the blue pixels 100, and the second common electrode 160 is provided in one of the red pixels 100 and the green pixels 100.

[0058] In this embodiment, the second common electrode 160 is provided in the blue pixels 100, the second common electrode 160 is provided in the red pixels 100, and the second common electrode 160 is provided in the green pixels 100.

[0059] In this embodiment, the second common electrode 160 is on the same layer as the data line 400.

[0060] In this embodiment, the connection lines 190 are on the same layer as the main pixel electrodes 110.

[0061] Reference Figure 3 Figure 3 , in this embodiment, the display panel further includes a plurality of fourth common electrodes 180. The fourth common electrodes 180 extend along the column direction of the display panel. The fourth common electrodes 180 are electrically connected to the second common electrodes 160. In a top view of the display panel, a part of the fourth common electrodes 180 overlaps with a part of the main pixel electrodes 110 of the pixels 100 with blue color among three adjacent pixels 100. By arranging the fourth common electrodes 180 to extend along the column direction of the display panel and electrically connecting the fourth common electrodes 180 to the second common electrodes 160, on the one hand, the voltage of the third common electrodes 170 can be stabilized, and on the other hand, the step-cut of the blue pixels 100 caused by the relatively thick film thickness of the blue color resist of the blue pixels 100, which results in the color deviation problem of the display picture of the display panel, can be improved.

[0062] In this embodiment, the fourth common electrodes 180 are located in the second metal layer 50.

[0063] In this embodiment, the fourth common electrodes 180 do not overlap with the pixels 100 with green color among three adjacent pixels, and the fourth common electrodes 180 do not overlap with the pixels 100 with red color among three adjacent pixels

[0064] In this embodiment, the fourth common electrodes 180 are provided in the blue pixels 100, and the fourth common electrodes 180 are provided in one of the red pixels 100 and the green pixels 100.

[0065] In this embodiment, the fourth common electrodes 180 are provided in the blue pixels 100, the fourth common electrodes 180 are provided in the red pixels 100, and the fourth common electrodes 180 are provided in the green pixels 100.

[0066] In this embodiment, the fourth common electrodes 180 are on the same layer as the data lines 400.

[0067] Reference Figure 3, in this embodiment, the second common electrode 160 is electrically connected to the connection line 190 through a first via hole 200 that penetrates the film layer between the second common electrode 160 and the connection line 190, the fourth common electrode 180 is electrically connected to the connection line 190 through a first via hole 200 that penetrates the film layer between the fourth common electrode 180 and the connection line 190, and the third common electrode 170 is electrically connected to the connection line 190 through a second via hole 210 that penetrates the film layer between the third common electrode 170 and the connection line 190. By electrically connecting the second common electrode 160 to the connection line 190 through the first via hole 200 that penetrates the film layer between the second common electrode 160 and the connection line 190, the fourth common electrode 180 to the connection line 190 through the first via hole 200 that penetrates the film layer between the fourth common electrode 180 and the connection line 190, and the third common electrode 170 to the connection line 190 through the second via hole 210 that penetrates the film layer between the third common electrode 170 and the connection line 190, the second common electrode 160, the third common electrode 170, and the fourth common electrode 180 form a common electrode network, thereby reducing the resistance value of the common electrode, accelerating the recovery time of the coupled common electrode, and alleviating the phenomenon of horizontal crosstalk in the display panel.

[0068] Reference Figure 3 , in this embodiment, the main pixel electrode 110 is electrically connected to the drain of the first thin-film transistor 130 through a third via hole 220 that penetrates the main pixel electrode 110 and the drain of the first thin-film transistor 130, the sub-pixel electrode 120 is electrically connected to the drain of the second thin-film transistor 140 through a fourth via hole 230 that penetrates the sub-pixel electrode 120 and the drain of the second thin-film transistor 140. The first via hole 200, the second via hole 210, the third via hole 220, and the fourth via hole 230 are arranged along the row direction of the display panel, and the first via hole 200, the second via hole 210, the third via hole 220, and the fourth via hole 230 are located on the same side of the gate line 300. By setting the first via hole 200, the second via hole 210, the third via hole 220, and the fourth via hole 230 on the same side of the gate line 300, compared with the scheme of setting the first via hole 200, the second via hole 210, the third via hole 220, and the fourth via hole 230 on different sides of the gate line 300, the area of the non-opening region between the main pixel 100 region and the sub-pixel 100 region can be reduced, thereby further improving the aperture ratio of the pixel 100 and then improving the light transmittance of the display panel.

[0069] Reference Figure 3, in this embodiment, the second common electrode 160 includes a fourth line segment 161, and the sub-pixel electrode 120 includes a first main electrode. In a top view of the display panel, the fourth line segment 161 overlaps with the first main electrode. By setting the fourth line segment 161 to overlap with the first main electrode, the fourth line segment 161 of the second common electrode 160 does not occupy the area of the light-transmitting region of the pixel 100, thereby further improving the aperture ratio of the pixel 100 of the display panel.

[0070] Reference Figure 3 , in this embodiment, the fourth common electrode 180 includes a fifth line segment 181, and the main pixel electrode 110 includes a second main electrode. In a top view of the display panel, the fifth line segment 181 overlaps with the second main electrode. By setting the fifth line segment 181 to overlap with the second main electrode, the fifth line segment 181 of the fourth common electrode 180 does not occupy the area of the light-transmitting region of the pixel 100, further improving the aperture ratio of the pixel 100 of the display panel.

[0071] Reference Figure 3 , in this embodiment, the second common electrode 160 further includes a first bending section 162. One end of the first bending section 162 is connected to the fourth line segment 161, and the other end of the first bending section 162 is electrically connected to the first via hole 200. The fourth common electrode 180 further includes a second bending section 182. One end of the second bending section 182 is connected to the fifth line segment 181, and the other end of the second bending section 182 is electrically connected to the first via hole 200. The first via hole 200 is not collinear with the fifth line segment 181, and the first via hole 200 is not collinear with the fourth line segment 161.

[0072] The technical solution of this application is specifically as follows:

[0073] In the traditional solution, the pixels of the liquid crystal display panel include a main pixel electrode 01, a sub-pixel electrode 02, a gate line 03, and two common electrode lines 04. The two common electrode lines 04 both extend along the row direction of the liquid crystal display panel, and the two common electrode lines 04 are located between the main pixel electrode 01 and the sub-pixel electrode 02. The gate line is located between the two common electrode lines 04. Since two common electrode lines 04 are arranged in the non-opening area between the main pixel electrode 01 and the sub-pixel electrode 02, the area of the non-opening area of the pixel increases, resulting in a decrease in the aperture ratio of the pixels of the liquid crystal display panel; and the driving method of the display panel is positive and negative frame driving, and the voltage value of the common electrode remains unchanged under positive and negative frames, while the voltage value of the pixel electrode is different during positive and negative frames, so that the electric field direction in the storage capacitor during the positive frame is different from that during the negative frame. The storage capacitor located between the main pixel electrode and the sub-pixel electrode is formed by the common electrode, the insulating layer, the semiconductor layer, and the pixel electrode. Although the storage capacitor can maintain the pixel voltage and reduce leakage, due to the presence of the semiconductor layer, the size of the storage capacitor on the common electrode is affected by the electric field direction, making the size of the storage capacitor of the display panel under the positive frame different from that under the negative frame, resulting in different capacitance coupling amounts of the display panel during the positive frame and the negative frame, causing the problem of crosstalk in the display panel.

[0074] Therefore, the technical solution of the present application sets the first common electrode 150 to include a first line segment 151, a second line segment 152, and a third line segment 153. The second line segment 152 is connected to one end of the first line segment 151, the third line segment 153 is connected to the other end of the first line segment 151. The second line segment 152 and the third line segment 153 extend along the column direction of the display panel, the first line segment 151 extends along the row direction of the display panel, and the first line segment 151 is located on the side of the main pixel electrode 110 away from the sub-pixel electrode 120 or the first line segment 151 is located on the side of the sub-pixel electrode 120 away from the main pixel electrode 110. One common electrode line in the non-opening area between the main pixel electrode 110 and the sub-pixel electrode 120 of the pixel 100 is cancelled. Compared with the traditional solution, the number of common electrodes in the non-opening area between the main pixel electrode 110 and the sub-pixel electrode 120 is reduced, thereby compressing the area of the non-opening area between the main pixel electrode 110 and the sub-pixel electrode 120 of the pixel 100. Without changing the area of the pixel 100, the area of the opening area of the pixel 100 is increased, thereby improving the aperture ratio of the pixels of the display panel; at the same time, since one common electrode extending along the row direction of the display panel is reduced, a part of the storage capacitor of the common electrode overlapping with the semiconductor layer is cancelled, thereby improving the problem of crosstalk in the display panel.

[0075] The specific embodiments of the present application have been described in detail above. The above-described embodiments disclosed in the present application are only the preferred embodiments of the present application. For those of ordinary skill in the art, many modifications and improvements can be made without departing from the concept of the present application. These modifications and improvements all fall within the protection scope defined by the claims of the present application.

Claims

1. A display panel, characterized in that: include: A plurality of pixels, wherein the pixels include a main pixel electrode, a sub-pixel electrode, a first thin film transistor, and a second thin film transistor, wherein the first thin film transistor and the second thin film transistor are both disposed between the main pixel electrode and the sub-pixel electrode, a drain of the first thin film transistor is electrically connected to the main pixel electrode, and a drain of the second thin film transistor is electrically connected to the sub-pixel electrode; a plurality of gate lines, wherein the gate lines are disposed between the main pixel electrode and the sub-pixel electrode, and the gate lines are electrically connected to the gate of the first thin film transistor and the gate of the second thin film transistor; a plurality of data lines, wherein the data lines are electrically connected to the source of the first thin film transistor, and the data lines are electrically connected to the source of the second thin film transistor; A plurality of first common electrodes, a portion of the first common electrodes overlaps with a portion of the main pixel electrode or a portion of the sub-pixel electrode, the first common electrodes include a first line segment, a second line segment and a third line segment, the second line segment is connected to one end of the first line segment, the third line segment is connected to the other end of the first line segment, the second line segment and the third line segment extend along the column direction of the display panel, the first line segment extends along the row direction of the display panel, and the first line segment is located on a side of the main pixel electrode away from the sub-pixel electrode or the first line segment is located on a side of the sub-pixel electrode away from the main pixel electrode.

2. The display panel according to claim 1, characterized in that: In a top view of the display panel, a portion of the gate line overlaps a portion of the main pixel electrode or the sub-pixel electrode.

3. The display panel according to claim 1, characterized in that: Three adjacent pixels in a row direction or a column direction of the display panel have different colors; The display panel further includes: Multiple connection lines; a plurality of second common electrodes, wherein the second common electrodes extend along a column direction of the display panel, and in a top view of the display panel, a portion of the second common electrodes overlaps a portion of the sub-pixel electrodes of the blue pixels among three adjacent pixels; a third thin film transistor, wherein a gate of the third thin film transistor is electrically connected to the gate line, a drain of the third thin film transistor is electrically connected to the sub-pixel electrode, and a source of the third thin film transistor is electrically connected to the second common electrode; A plurality of third common electrodes are provided, wherein the third common electrodes are electrically connected to the second common electrodes through the connecting lines, and in a top view of the display panel, the third common electrodes overlap with a portion of the main pixel electrodes.

4. The display panel according to claim 3, characterized in that: The display panel also includes a plurality of fourth common electrodes, which extend along the column direction of the display panel and are electrically connected to the second common electrodes. In a top view of the display panel, a portion of the fourth common electrode overlaps with a portion of a main pixel electrode of a blue pixel among three adjacent pixels.

5. The display panel according to claim 4, characterized in that: In the top view of the display panel, the second common electrode does not overlap with the three adjacent pixels whose colors are green, the second common electrode does not overlap with the three adjacent pixels whose colors are red, the fourth common electrode does not overlap with the three adjacent pixels whose colors are green, and the fourth common electrode does not overlap with the three adjacent pixels whose colors are red.

6. The display panel according to claim 4, characterized in that: The second common electrode is electrically connected to the connection line through a first via hole penetrating a film layer between the second common electrode and the connection line, and the third common electrode is electrically connected to the connection line through a second via hole penetrating a film layer between the third common electrode and the connection line.

7. The display panel according to claim 6, characterized in that: The main pixel electrode is electrically connected to the drain of the first thin film transistor through a third via hole penetrating the main pixel electrode and the drain of the first thin film transistor, and the sub-pixel electrode is electrically connected to the drain of the second thin film transistor through a fourth via hole penetrating the sub-pixel electrode and the drain of the second thin film transistor, the first via hole, the second via hole, the third via hole and the fourth via hole are arranged along the row direction of the display panel, and the first via hole, the second via hole, the third via hole and the fourth via hole are located on the same side of the gate line.

8. The display panel according to claim 6, characterized in that: The second common electrode includes a fourth line segment, the sub-pixel electrode includes a first trunk electrode, and in a top view of the display panel, the fourth line segment overlaps with the first trunk electrode.

9. The display panel according to claim 8, characterized in that: The fourth common electrode includes a fifth line segment, the main pixel electrode includes a second trunk electrode, and in a top view of the display panel, the fifth line segment overlaps with the second trunk electrode.

10. The display panel according to claim 9, characterized in that: The second common electrode also includes a first bending segment, one end of which is connected to the fourth line segment, and the other end of which is electrically connected to the first via hole. The fourth common electrode also includes a second bending segment, one end of which is connected to the fifth line segment, and the other end of which is electrically connected to the first via hole. The first via hole is not collinear with the fifth line segment, and the first via hole is not collinear with the fourth line segment.

Images