Level conversion circuit and high-side switching tube driving chip

Abstract

The embodiment of the utility model provides a level conversion circuit and a high-side switching tube driving chip. The circuit comprises a resistor R21, a resistor R22, a resistor R11, a resistor R12, a resistor R31, a resistor R32, a resistor R41, a resistor R42, a switch tube Q11, a switch tube Q12, a switch tube Q21, a switch tube Q22 and a switch tube Q3. The first ends of the resistors R21 and R22 are electrically connected with the first port; the second end of the switching tube Q11 is electrically connected with the second port through a resistor R31; the second end of the switching tube Q11 is electrically connected with the second port through a resistor R31; the second end of the switching tube Q12 is electrically connected with a logic circuit; the first end of the resistor R42 is used for being electrically connected with the logic circuit, and the second end of the resistor R42 is electrically connected with the second port through the switch tube Q3. The level conversion circuit is electrically connected with the logic circuit and can output more accurate driving signals of the high-side switching tube.

Description

[Technical field]

[0001] The utility model relates to the technical field of electric control, in particular to a level conversion circuit and a high-side switch tube driving chip. [Background technology]

[0002] In the drive control of the high-side switch tube, a level conversion circuit needs to be set to convert the drive voltage. Common level conversion circuits include Figure 1 As shown. When the HSD_ON_L signal is set, the switch tube NM1L is turned on, which will pull down the potential of the HSD_ON_V point. When the potential of the HSD_ON_V point is lower than the voltage threshold Vth of the HSD_OFF_V point, the switch tube PM1y will be turned on, and the HVDD port voltage will charge to the HSD_ON_H point. When the HSD_ON_H potential is higher than a certain voltage, the Q end of the subsequent SR trigger is set, so that the drive is turned on. Similarly, when the HSD_OFF_L signal is set, the switch tube NM1R will be turned on, which will pull down the potential of the HSD_OFF_V point. When the potential of the HSD_OFF_V point is lower than the voltage threshold Vth of the HSD_ON_V point, the switch tube PM1x will be turned on, and the HVDD port voltage will charge to the HSD_OFF_H point. When the HSD_ON_H potential is higher than a certain voltage, the subsequent SR trigger will be triggered, and the Q end of the SR trigger will be set to zero. The output signal of the output terminal Q of the RS trigger is amplified or processed to output the driving signal HSD_OUT of the high-side switch tube. [Contents of the utility model]

[0003] In view of this, an embodiment of the utility model provides a level conversion circuit, which can convert the level of a reference ground and is suitable for driving a high-side switch tube.

[0004] This application adopts the following technical solutions:

[0005] A level conversion circuit, comprising a resistor R21, a resistor R22, a resistor R11, a resistor R12, a resistor R31, a resistor R32, a resistor R41, a resistor R42, a switch tube Q11, a switch tube Q12, a switch tube Q21, a switch tube Q22 and a switch tube Q3; wherein the switch tube Q3 has a body diode; the level conversion circuit can be electrically connected to a logic circuit, and is used to drive a high-side switch tube;

[0006] The first ends of the resistor R21 and the resistor R22 are both electrically connected to the first port;

[0007] The second end of the resistor R21 is electrically connected to the first end of the switch tube Q11 and the control end of the switch tube Q12;

[0008] The second end of the resistor R22 is electrically connected to the first end of the switch tube Q12 and the control end of the switch tube Q11;

[0009] The first end of the switch tube Q21 is electrically connected to the second end of the resistor R21, and the second end of the switch tube Q21 is electrically connected to the potential reference end through the resistor R11; the control end of the switch tube Q21 is used to receive a first control signal;

[0010] The first end of the switch tube Q22 is electrically connected to the second end of the resistor R22, and the second end of the switch tube Q22 is electrically connected to the potential reference end through the resistor R12; the control end of the switch tube Q22 is used to receive a second control signal;

[0011] The second end of the switch tube Q11 is electrically connected to the second port through the resistor R31; the second end of the switch tube Q11 is used to be electrically connected to the logic circuit through the resistor R41;

[0012] The second end of the switch tube Q12 is electrically connected to the second port through the resistor R32; the second end of the switch tube Q12 is used to be electrically connected to the logic circuit;

[0013] The first end of the resistor R42 is used to be electrically connected to the logic circuit, and the second end of the resistor R42 is electrically connected to the second port through the switch tube Q3; the control end of the switch tube Q3 is used to be electrically connected to the logic circuit.

[0014] The level conversion circuit is provided with a switch tube Q3, and resistors R41 and R42 are respectively added to the second ends of the switch tubes Q11 and Q12 to ensure that during the rapid rise of the voltage at the second port, the voltage rise speeds of the second ends of the switch tubes Q11 and Q12 (i.e., points HSD_OFF_H and HSD_ON_H) are as similar as possible, thereby effectively avoiding the false turn-on phenomenon caused by the potential at the HSD_ON_H point being higher than the potential at the second port, which is beneficial to improving the accuracy of the high-side switch tube drive.

[0015] A high-side switch tube driver chip comprises the above-mentioned level conversion circuit. The high-side switch tube driver chip has high driving accuracy.

Brief Description of the Drawings

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work, but they should fall within the scope of protection of this application.

[0017] Figure 1 It is a schematic diagram of a level conversion circuit in the prior art;

[0018] Figure 2 A schematic diagram of a level conversion circuit disclosed in this application;

[0019] Figure 3 A schematic diagram of an improved level conversion circuit disclosed in this application;

[0020] Figure 4 A schematic diagram of another improved level conversion circuit disclosed in this application;

[0021] Figure 5 This is a schematic diagram of the principle of a high-side switch tube driver chip disclosed in this application. [Specific implementation method]

[0022] In order to better understand the technical solution of the present utility model, the embodiments of the present utility model are described in detail below with reference to the accompanying drawings.

[0023] It should be clear that the described embodiments are only part of the embodiments of the utility model, not all of them. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0024] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The singular forms "a", "the" and "the" used in the embodiments of the present invention and the appended claims are also intended to include plural forms unless the context clearly indicates other meanings. Electrical connections include direct electrical connections and indirect electrical connections.

[0025] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0026] Figure 1 The level conversion circuit shown is suitable for driving the high-side switch tube, and the HVDD port often requires an external capacitor. Further, in order to ensure that the driver can be turned off when it needs to be turned off, such as Figure 2As shown, a switch tube NM2 is often set. At this time, when the HSD_OFF_H potential rises, the HSD_ON_H signal will be forcibly pulled down through the switch tube NM2 to ensure that the driver can be turned off when it needs to be turned off. However, the switch tube NM2 has a body diode D. The existence of the external capacitor and the body diode D makes Figure 2 The circuit shown has at least the following disadvantages:

[0027] When the voltage at the HVSS point rises rapidly, because the voltage across the external capacitor of HVDD (usually 0.1uF) cannot suddenly change, the voltage difference between HVDD and HVSS remains basically unchanged during the rise of HVSS, but the voltage of the internal nodes of the level conversion circuit does not rise that fast. For example, the voltage at the HVDD port charges the HSD_ON_V / HSD_OFF_V point through the resistor R2x / R2y, and the voltage at the HVSS port charges the HSD_OFF_H / HSD_ON_H point through the resistor R3x / R3y, and there will be an RC delay. However, due to the presence of the body diode D of the switch tube NM2, the voltage at the HVSS point can provide current to the HSD_ON_H point through the body diode D of the switch tube NM2, resulting in the voltage at the HSD_ON_H point rising much faster than the HSD_OFF_H / HSD_ON_V / HSD_OFF_V points. When the potential at point HSD_ON_H is higher than the potential at point HSD_ON_V by a voltage threshold Vth, the switch PM1y will be turned on (the conduction direction is as follows: Figure 2 As shown by the arrow, HSD_ON_H will provide current to HSD_OFF_V, and the voltage rise rate of HSD_OFF_V will be faster than that of HSD_ON_V. When the voltages of HSD_OFF_V and HSD_ON_V rise to the voltage of HVSS, HSD_OFF_V and HSD_ON_V are only powered by HVDD, but the voltage of HSD_OFF_V is still higher than that of HSD_ON_V. Therefore, PM1y is in the forward conduction state. At this time, the voltage of HVDD will charge HSD_ON_H, which will cause the Q end of the SR trigger to be set, which may cause the drive to be mistriggered.

[0028] Based on this, Figure 3 As shown, the embodiment of the present application provides an improved level conversion circuit 1, including a resistor R21, a resistor R22, a resistor R11, a resistor R12, a resistor R31, a resistor R32, a resistor R41, a resistor R42, a switch tube Q11, a switch tube Q12, a switch tube Q21, a switch tube Q22 and a switch tube Q3; wherein the switch tube Q3 has a body diode; the level conversion circuit 1 can be electrically connected to a logic circuit 2 to generate a driving signal for driving a high-side switch tube; in one embodiment, the logic circuit 2 is as shown in FIG. Figure 3As shown, including RS trigger;

[0029] The first ends of the resistor R21 and the resistor R22 are both electrically connected to the first port HVDD;

[0030] The second end of the resistor R21 is electrically connected to the first end of the switch tube Q11 and the control end of the switch tube Q12;

[0031] The second end of the resistor R22 is electrically connected to the first end of the switch tube Q12 and the control end of the switch tube Q11;

[0032] The first end of the switch tube Q21 is electrically connected to the second end of the resistor R21, and the second end of the switch tube Q21 is electrically connected to the potential reference end AVSS through the resistor R11; the control end of the switch tube Q21 is used to receive the first control signal HSD_ON_L;

[0033] The first end of the switch tube Q22 is electrically connected to the second end of the resistor R22, and the second end of the switch tube Q22 is electrically connected to the potential reference end AVSS through the resistor R12; the control end of the switch tube Q22 is used to receive the second control signal HSD_OFF_L;

[0034] The second end of the switch tube Q11 is electrically connected to the second port HVSS through the resistor R31. The second end of the switch tube Q11 is used to be electrically connected to the logic circuit 2 through the resistor R41; specifically, the second end of the switch tube Q11 is also electrically connected to the reset terminal R of the RS trigger through the resistor R41;

[0035] The second end of the switch tube Q12 is electrically connected to the second port HVSS through the resistor R32. The second end of the switch tube Q12 is used to be electrically connected to the logic circuit 2; specifically, the second end of the switch tube Q12 is electrically connected to the set end S of the RS trigger;

[0036] The first end of the resistor R42 is used to be electrically connected to the logic circuit, and the second end of the resistor R42 is electrically connected to the second port HVSS through the switch tube Q3; the control end of the switch tube Q3 is used to be electrically connected to the logic circuit 2; specifically, the set end of the RS trigger is electrically connected to the first end of the resistor R42, and the second end of the resistor R42 is electrically connected to the second port HVSS through the switch tube Q3; the control end of the switch tube Q3 is electrically connected to the reset end R of the RS trigger.

[0037] In this embodiment, its working principle can be referred to Figure 1 The above working principle description, and Figure 3Resistors R41 and R42 are added to both ends of HSD_OFF_H and HSD_ON_H respectively to ensure that during the rapid rise of the voltage of the second port HVSS, the voltage rise speeds of the HSD_OFF_H and HSD_ON_H points are as similar as possible, and the potential of the HSD_ON_H point will not be higher than the potential of the second port HVSS, which will cause erroneous turn-on, thereby improving the driving accuracy of the high-side switch tube and ensuring reliable operation of the system.

[0038] Preferably, the resistance values ​​of resistor R41 and resistor R42 are equal to ensure that the charging voltage speeds at the HSD_OFF_H and HSD_ON_H points are as similar as possible. Of course, depending on the actual application of the circuit, the resistance values ​​of the two may also be different. This application does not limit this.

[0039] Preferably, the above design is a symmetrical design, that is, the resistor R21 and the resistor R22 have the same specifications, the switch tubes Q11 and Q12 have the same specifications; the resistors R11 and R12 have the same specifications; the switch tubes Q21 and Q22 have the same specifications; the resistors R31 and R32 have the same specifications.

[0040] Preferably, the above-mentioned switch tubes are all MOS tubes; among which, the switch tubes Q11 and Q12 are PMOS, and the switch tubes Q21, Q22, and Q3 are NMOS; the first ends of the switch tubes Q11 and Q12 are their corresponding sources, the second ends are their corresponding drains, and the control ends are their corresponding gates; the first ends of the switch tubes Q21, Q22, and Q3 are their corresponding drains, the second ends are their corresponding sources, and the control ends are their corresponding gates.

[0041] Preferably, Figure 3 The improved level conversion circuit shown is integrated in the driving chip; when the level conversion circuit is in use, a bootstrap capacitor is connected between the first port HVDD and the second port HVSS, and preferably, the capacity of the bootstrap capacitor is 0.1uf.

[0042] Another improvement method is Figure 4 As shown, a diode D1x / D1y is connected in parallel near the resistor R2x / R2y. During the charging process, the charging speed of the two points HSD_ON_V / HSD_OFF_V can be faster than the charging speed of the two points HSD_OFF_H / HSD_ON_H. This can ensure that the voltage of HSD_ON_H will not be higher than the voltage of the HVSS point during the rising process, which will cause the subsequent drive to be turned on by mistake. Alternatively, a Schmitt trigger is added after HSD_ON_H / HSD_OFF_H to ensure that it will not be turned on by mistake and improve anti-interference performance. However, the cost of this method is high. Figure 3 The PCB layout is slightly more complicated; if the chip is integrated, the wafer size and cost will increase during production. Figure 3The improved level conversion circuit shown is simpler and has lower cost.

[0043] Further, such as Figure 5 As shown, the embodiment of the present application provides a high-side switch tube driver chip IC, including the level conversion circuit provided by any of the above embodiments, and also including an OR gate, a voltage detection circuit (UV detect), an RS trigger, a push-pull circuit, a low-side drive circuit, etc. The drive signal HSD_OUT of the high-side switch tube is generated by the logic setting of the level conversion circuit 1, the OR gate, the RS trigger and the push-pull circuit, and the drive signal of the low-side switch tube is generated by the low-side drive circuit. It should be noted that Figure 5 The connection mode of the level conversion circuit, OR gate, RS trigger and push-pull circuit shown is only an embodiment, which can also be realized by other digital circuits or logic circuits. The high-side switch tube driver chip using the above-mentioned level conversion circuit principle is conducive to reducing wafer size and manufacturing cost.

[0044] The above disclosure is only the preferred embodiment of the present application, and cannot be used to limit the scope of rights of the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of this specification are still within the scope covered by the present application.

Claims

1. A level conversion circuit, characterized in that: The circuit comprises a resistor R21, a resistor R22, a resistor R11, a resistor R12, a resistor R31, a resistor R32, a resistor R41, a resistor R42, a switch tube Q11, a switch tube Q12, a switch tube Q21, a switch tube Q22 and a switch tube Q3; wherein the switch tube Q3 has a body diode; the level conversion circuit can be electrically connected to the logic circuit to generate a driving signal for the high-side switch tube; The first ends of the resistor R21 and the resistor R22 are both electrically connected to the first port; The second end of the resistor R21 is electrically connected to the first end of the switch tube Q11 and the control end of the switch tube Q12; The second end of the resistor R22 is electrically connected to the first end of the switch tube Q12 and the control end of the switch tube Q11; The first end of the switch tube Q21 is electrically connected to the second end of the resistor R21, and the second end of the switch tube Q21 is electrically connected to the potential reference end through the resistor R11; the control end of the switch tube Q21 is used to receive a first control signal; The first end of the switch tube Q22 is electrically connected to the second end of the resistor R22, and the second end of the switch tube Q22 is electrically connected to the potential reference end through the resistor R12; the control end of the switch tube Q22 is used to receive a second control signal; The second end of the switch tube Q11 is electrically connected to the second port through the resistor R31; the second end of the switch tube Q11 is used to be electrically connected to the logic circuit through the resistor R41; The second end of the switch tube Q12 is electrically connected to the second port through the resistor R32; the second end of the switch tube Q12 is used to be electrically connected to the logic circuit; The first end of the resistor R42 is used to be electrically connected to the logic circuit, and the second end of the resistor R42 is electrically connected to the second port through the switch tube Q3; the control end of the switch tube Q3 is used to be electrically connected to the logic circuit.

2. The level conversion circuit according to claim 1, characterized in that: The resistance values ​​of the resistor R41 and the resistor R42 are equal.

3. The level conversion circuit according to claim 1 or 2, characterized in that: The resistor R21 and the resistor R22 have the same specifications; the switch tubes Q11 and Q12 have the same specifications; the resistors R11 and R12 have the same specifications; the switch tubes Q21 and Q22 have the same specifications; the resistors R31 and R32 have the same specifications.

4. The level conversion circuit according to claim 3, characterized in that: The switch tube Q11 , the switch tube Q12 , the switch tube Q21 , the switch tube Q22 and the switch tube Q3 are all MOS tubes.

5. The level conversion circuit according to claim 4, characterized in that: The switch tube Q11 and the switch tube Q12 are PMOS, the first ends of the switch tube Q11 and the switch tube Q12 are their corresponding sources; the second ends of the switch tube Q11 and the switch tube Q12 are their corresponding drains; and the control ends of the switch tube Q11 and the switch tube Q12 are their corresponding gates.

6. The level conversion circuit according to claim 5, characterized in that: The switch tube Q21, the switch tube Q22 and the switch tube Q3 are NMOS; the first ends of the switch tube Q21, the switch tube Q22 and the switch tube Q3 are their corresponding drains; the second ends of the switch tube Q21, the switch tube Q22 and the switch tube Q3 are their corresponding sources, and the control ends of the switch tube Q21, the switch tube Q22 and the switch tube Q3 are their corresponding gates.

7. A high-side switch tube driver chip, characterized in that: The method comprises a level conversion circuit as claimed in any one of claims 1 to 6.

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