Photoelectric redundancy switching architecture based on ASAAC standard

Abstract

The utility model discloses a photoelectric redundancy switching architecture based on an ASAAC standard, in the architecture, an MT optical fiber interface is connected to a 10-gigabit network switching chip through an optical module, an integrated photoelectric hybrid VPX connector comprises an MT optical fiber interface, a differential module and a basic module, the differential module is directly connected with the 10-gigabit network switching chip, and the basic module is connected with the MT optical fiber interface. The differential module is further connected to the 10-gigabit network switching chip through a PHY2, and the basic module is connected with the FPGA chip through a CAN transmission line; the FPGA chip is directly connected with the 10-gigabit network switching chip, the optical module and the debugging interface respectively, the FPGA chip is further connected with the debugging interface through a PHY1, and a FLASH and a DDR are mounted on the FPGA chip; the optical module is of a crimping type 12-path parallel optical transceiver integrated structure. According to the utility model, photoelectric integrated data exchange is realized by using the integrated photoelectric hybrid VPX connector, so that the cost is reduced and the size is also reduced; the 10-gigabit network chip can switch working modes, supports the FlexE technology, saves energy and meets the interface requirements of various data interactions.

Description

Technical Field

[0001] The utility model relates to the technical field of data exchange, and particularly relates to an optoelectronic redundant switching architecture based on the ASAAC standard. Background Art

[0002] The switching module has an important application in the field of information processing. It is used to realize the hierarchical exchange of service data and management control data between information processing machine modules, and is the switching center of information processing. The switching module based on the ASAAC standard is an electronic product applied to an advanced avionics architecture, which has the characteristics of reducing maintenance costs, improving task performance, and enhancing operation reliability. The ASAAC standard is a standard architecture for avionics systems. In this architecture, data enters the switching module in the form of optical signals or electrical signals, and then is transmitted to other information processing modules in the form of optical signals or electrical signals.

[0003] When using optical signals as the carrier for data interaction, communication has extremely fast response capabilities and strong parallel capabilities. Moreover, since photons have no charge, when used as information carriers, they do not interact with the external electromagnetic field, so they have extremely strong anti-electromagnetic interference capabilities and excellent confidentiality. Based on these characteristics of photons, optical communication has the advantages of long distance, high speed, large capacity, and high reliability. However, due to technical limitations, existing processing modules can only recognize electrical signals, and communication between devices cannot be achieved only through optical signals. Generally, optical modules or fiber optic transceivers are required to achieve the electrical / optical or optical / electrical conversion of the modules. At the same time, optical modules are not passive devices, and power supply issues need to be considered. In addition, the optical fibers relied on by optical communication are not as convenient to use and maintain as cables.

[0004] The electrical communication used in the switching module is generally wired electrical communication, that is, a communication method generally using metal cables as the transmission medium. Wired electrical communication relies on electromagnetic plane waves in the medium for transmission. During the transmission process, mutual interference will occur due to the expansion of the number of lines, resulting in a significant decline in communication quality. At the same time, the lines of electrical communication are also easily affected by external electromagnetic fields, and the communication quality will also decline significantly when the lines are long. When performing high-speed and long-distance information transmission, electrical communication generally needs to use coaxial cables to reduce electromagnetic losses and isolate external noise, interference, and crosstalk, resulting in higher costs. In common devices, electrical communication does not require additional conversion and can be directly recognized by the device. Therefore, devices using electrical communication can save the types of components used, save space and costs. In addition, the cables relied on by wired electrical communication are also more convenient to use and maintain than optical fibers.

[0005] Optical communication and electrical communication are two very important communication methods, both of which have extensive applications and it is impossible to completely replace one method with the other. As the information processing and interaction center between modules, the switching module usually also faces scenarios that require the use of optical interfaces or electrical interfaces. In the existing designs, the switching module has at least the following three problems:

[0006] 1) When only using electrical communication interfaces for data exchange, additional optoelectronic conversion devices need to be added to meet the different interface requirements during the data interaction process. The connection is cumbersome and the cost is relatively high;

[0007] 2) It is relatively large in size and high in power consumption, not meeting the development needs of the avionics field system;

[0008] 3) Lack of simple and effective monitoring and adjustment means, making it difficult to troubleshoot problems when they occur. Utility Model Content

[0009] The purpose of the present utility model is to propose an optoelectronic redundant switching architecture based on the ASAAC standard, which uses an integrated optoelectronic hybrid VPX connector to achieve optoelectronic integrated data exchange, eliminating the need for additional optoelectronic conversion devices, reducing costs and also reducing the volume; at the same time, optimizing the internal connection structure of the architecture, using an FPGA chip to monitor and control other devices, which can effectively troubleshoot problems; in addition, the 10 Gigabit network chip can also switch the working mode and support the FlexE technology, which can effectively save energy and adapt to the interface requirements of various data interactions.

[0010] The specific technical solutions are as follows:

[0011] An optoelectronic redundant switching architecture based on the ASAAC standard, the architecture includes: a 10 Gigabit network switching chip, an FPGA chip, an integrated optoelectronic hybrid VPX connector, an optical module, a FLASH, a DDR, a PHY2, a PHY1, and a debugging interface; the integrated optoelectronic hybrid VPX connector includes an MT fiber interface, a differential module, and a basic module. The MT fiber interface is connected to the 10 Gigabit network switching chip through the optical module. The differential module is directly connected to the 10 Gigabit network switching chip, and the differential module is also connected to the 10 Gigabit network switching chip through the PHY2. The basic module is connected to the FPGA chip through a CAN transmission line; the FPGA chip is directly connected to the 10 Gigabit network switching chip, the optical module, and the debugging interface respectively. The FPGA chip is also connected to the debugging interface through the PHY1. The FPGA chip mounts the FLASH and the DDR; the optical module is a crimped 12-way parallel optical transceiver integrated structure, and the optical module has a built-in single power supply. The integrated optoelectronic hybrid VPX connector can be compatible with optoelectronic data interaction, eliminating the need for additional optoelectronic conversion devices, effectively reducing costs and the overall volume. The FPGA chip can effectively monitor the operation of the architecture, facilitating problem troubleshooting.

[0012] Preferably, in the integrated optoelectronic hybrid VPX connector, the MT fiber optic interface, differential module, and basic module are in a parallel connection structure, and the differential module is composed of three groups of parallel sub-switching modules. The parallel structure can reduce the impact of partial errors on the whole, and the three sub-switching modules can effectively support optoelectronic data interaction.

[0013] Preferably, the FPGA chip is directly connected to the 10 Gigabit network switching chip through the PCIe x4 bus. The FPGA chip is connected to the optical module through the I2C transmission line. The FPGA chip is provided with an RGMII interface and a UART serial port. The FPGA chip is connected to the PHY1 through the RGMII interface, and the PHY1 is connected to the debugging interface through a transmission line compliant with the 1000BASE-T standard. The FPGA chip is directly connected to the debugging interface through the RS232 transmission line at the UART serial port. Optimizing the connection between the FPGA chip and other devices can improve the transmission performance, facilitate the monitoring and control of the FPGA chip, and is conducive to troubleshooting when problems occur.

[0014] Preferably, the 10 Gigabit network switching chip is built-in with a working mode switching sub-module, and the working mode switching sub-module is connected to the FPGA chip. Switching to the actual working mode can effectively save energy and reduce power consumption while ensuring performance.

[0015] Preferably, the 10 Gigabit network switching chip is a chip that supports the FlexE technology. Supporting the FlexE technology can adapt to a variety of interfaces and protocols, facilitating data interaction.

[0016] Preferably, the MT fiber optic interface is an MT fiber optic interface with an inclined 8-degree angle APC grinding. Using an MT fiber optic interface with an inclined 8-degree angle APC grinding can reduce optical reflection and improve connection performance.

[0017] The beneficial effects of the present utility model compared with the prior art are:

[0018] The present utility model realizes optoelectronic integrated data exchange by using the integrated optoelectronic hybrid VPX connector, eliminating the need for additional optoelectronic conversion devices, reducing costs and volume; at the same time, optimizing the internal connection structure of the architecture, using the FPGA chip to monitor and control other devices, and effectively troubleshooting problems; in addition, the 10 Gigabit network chip can also switch the working mode and support the FlexE technology, effectively saving energy and adapting to the interface requirements of various data interactions. Description of the Drawings

[0019] Figure 1 It is a schematic structural diagram of an optoelectronic redundant switching architecture based on the ASAAC standard. Detailed Embodiments

[0020] In order to make the objectives, technical solutions and advantages of the present utility model more clear and understandable, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present utility model and are not used to limit the present utility model.

[0021] As Figure 1 shown, it is a schematic structural diagram of an optoelectronic redundant switching architecture based on the ASAAC standard. The connection and size of each device in this architecture need to comply with the ASAAC standard and can work in cooperation with software and hardware. This architecture mainly includes a 10 Gigabit network switching chip, an FPGA chip, an integrated optoelectronic hybrid VPX connector, an optical module, a FLASH, a DDR, a PHY2, a PHY1, and a debugging interface. The FLAH is a flash memory chip that can quickly read data. The DDR is a double data rate synchronous dynamic random access memory, which belongs to a type of memory. The PHY is a chip for the port physical layer that can transmit and receive data.

[0022] In this embodiment, the integrated optoelectronic hybrid VPX connector includes an MT fiber optic interface, a differential module, and a basic module that adopt a parallel structure. The parallel structure can avoid overall errors caused by errors in a single part. The MT fiber optic interface is an MT fiber optic interface with an inclined 8-degree angle APC grinding. The inclined 8-degree angle APC grinding is a fiber end face grinding method that can make the reflected light reflect at a specific angle instead of returning to the light source, effectively reducing the loss of optical signals, reducing optical reflection, and improving transmission performance and connection performance.

[0023] Specifically, as Figure 1 shown, the MT fiber optic interface is P4 for connecting to an external optical fiber and an optical module; the differential module is three sub-switching modules P3, P2, and P1 in parallel, which are used to realize the data interaction between the 10 Gigabit network switching chip and external optoelectronic signals; the basic module is P0, which is used to supply power to the FPGA chip by the power supply. P4 is connected to the optical module, and the optical module is then connected to the 10 Gigabit network switching chip. Each of the three sub-switching modules in the differential module is directly connected to the 10 Gigabit network switching chip using a corresponding three transmission lines. P1 is also connected to the 10 Gigabit network switching chip through PHY2. P0 is connected to the FPGA chip through a CAN transmission line. The CAN transmission line is a transmission line that meets the ISO international standard serial communication protocol and has characteristics such as high reliability, real-time performance, and flexibility.

[0024] In this embodiment, the FPGA chip can adopt a ZYNQ chip, which is responsible for module management and network configuration. This chip is directly connected to a 10G network switch chip, an optical module, and a debugging interface respectively. When this chip is directly connected to the 10G network switch chip, a PCIe x4 bus can be used, with a high transmission rate. When this chip is directly connected to the optical module, an I2C transmission line can be adopted. This is an integrated circuit bus and also a serial communication bus. With the help of the I2C transmission line in the communication between the optical module and the FPGA chip, the status of the optical module can be monitored in real time, providing guarantee for the stable operation of the communication. There can be two lines for this chip to connect to the debugging interface. The first line is that the ZYNQ chip connects to the debugging interface via the built-in UART serial port through an RS232 transmission line. The second line is to connect to the PHY1 through the built-in RGMII interface, and then connect to the debugging interface through the PHY1 with a transmission line compliant with the 1000BASE-T standard. The two lines ensure the stability of bidirectional communication. In addition, the FPGA chip also mounts a FLASH and a DDR to support data interaction.

[0025] It should be noted that the UART serial port adopts a general data communication protocol and can receive and transmit data simultaneously; RS232 is an interface standard specification compatible with the UART serial port and can adapt to the data receiving and transmitting functions of the UART serial port; the RGMII interface is a gigabit Ethernet media independent interface with a high supported transmission rate; 1000BASE-T is a physical layer standard of gigabit Ethernet.

[0026] In this embodiment, the optical module has a crimped 12-way parallel optical transceiver integrated structure and can support short-distance parallel multi-channel optical interconnection data communication. The central wavelength emitted by the optical module is 850nm, which is the optical communication band of common devices and is convenient for access. It is powered by a single 3.30V power supply internally, with simple and convenient design and use. The transmission rate of each single channel of the 12 channels is 25Gbps, which can fully achieve fast data interaction with the 10G network switch chip. In addition, the optical module can transmit information such as the operating temperature and whether the channel optical power is higher than the threshold to the FPGA chip through the I2C transmission line, facilitating users to monitor and manage using the FPGA chip.

[0027] In this embodiment, the 100G network switching chip is a chip that supports the FlexE technology. The FlexE technology enables the 100G network switching chip to flexibly control the rate of its own interfaces or channels to adapt to different transmission requirements. The maximum data transmission rate allowed for each interface or each channel of the 100G network switching chip itself is 25Gbps, and it can support at least 4 channels to simultaneously perform data transmission at a rate of 100Gbps, which can basically meet the high-capacity and high-rate data requirements of existing switching modules. In addition, the interfaces of the 100G network switching chip itself can also be flexibly configured into various Flex interfaces such as 50G, 100G, 200G, and 400G to adapt to more transmission rate requirements.

[0028] Exemplarily, the 100G network switching chip can adopt CTC8180. In terms of specifications, the switching capacity of CTC8180 is as high as 2.4Tbps, and the port capabilities support providing full-rate port capabilities from 1000M to 400G. At the same time, in terms of FlexE switching capabilities, CTC8180 supports a maximum of 800G and also supports 50G / 100G / 200G / 400G FlexE interfaces, with the characteristics of deterministic ultra-low latency, and can meet the usage requirements of this application. Other parameters and data of CTC8180 have been made public and will not be specifically elaborated here.

[0029] In this embodiment, a working mode switching sub-module is also provided inside the 100G network switching chip, which can be switched to the normal working state, standby state, or off state according to current requirements. The normal working state corresponds to the situation where the 100G network switching chip operates normally, the standby state corresponds to the situation where the 100G network switching chip operates normally but temporarily stops, and the off state corresponds to the situation where the 100G network switching chip does not need to work. The working mode switching sub-module is connected to the FPGA chip and is monitored and controlled by the FPGA chip, and is timely switched to the actual working mode, which can effectively save energy and reduce power consumption while ensuring performance.

[0030] In addition, the interfaces or channels of the 100G network switching chip itself all support SCL L1 cross, FlexE OAM, PTP function, and the overlay protection function of FlexE, and at the same time have deterministic ultra-low latency, which can meet the requirements of delay-sensitive network application scenarios. The FlexE OAM and the overlay protection function of FlexE are technologies or standards that conform to the FlexE technology. The SCL L1 cross is a service channel protocol for network communication, which can realize data interaction between different channels, and the PTP function is used to support synchronization between different devices or equipment.

[0031] In summary, the present application uses an integrated optoelectronic hybrid VPX connector to achieve optoelectronic integrated data exchange, eliminating the need for additional optoelectronic conversion devices, reducing costs and volume. At the same time, the connection structure inside the optimized architecture is utilized, and an FPGA chip is used to monitor and control other devices, which can effectively troubleshoot problems. In addition, the 10 Gigabit Ethernet chip can also switch the working mode and support FlexE technology, which can effectively save energy and adapt to the interface requirements of various data interactions, showing significant progressiveness.

[0032] The above embodiments are only used to illustrate the technical idea of the present invention, and the protection scope of the present invention cannot be limited thereby. Any modification made on the basis of the technical solution according to the technical idea proposed by the present invention falls within the protection scope of the present invention.

Claims

1. An optoelectronic redundant switching architecture based on the ASAAC standard, characterized in that: The architecture includes: 10G network switch chip, FPGA chip, integrated optoelectronic hybrid VPX connector, optical module, FLASH, DDR, PHY2, PHY1 and debug interface; The integrated optoelectronic hybrid VPX connector includes an MT optical fiber interface, a differential module and a basic module. The MT optical fiber interface is connected to the 10G network switch chip through an optical module. The differential module is directly connected to the 10G network switch chip. The differential module is also connected to the 10G network switch chip through PHY2. The basic module is connected to the FPGA chip through a CAN transmission line. The FPGA chip is directly connected to the 10G network switch chip, optical module and debug interface. The FPGA chip is also connected to the debug interface through PHY1. The FPGA chip mounts FLASH and DDR. The optical module is a press-fit 12-way parallel optical transceiver integrated structure with a built-in single power supply.

2. The optical-electrical redundant switching architecture based on the ASAAC standard according to claim 1, characterized in that: In the integrated optoelectronic hybrid VPX connector, the MT fiber optic interface, differential module and basic module are parallel connection structures, and the differential module is composed of three groups of parallel sub-switch modules.

3. The optical-electrical redundant switching architecture based on the ASAAC standard according to claim 1, characterized in that: The FPGA chip is directly connected to the 10G network switching chip through the PCIEx4 bus, the FPGA chip is connected to the optical module through the I2C transmission line, the FPGA chip is provided with an RGMII interface and a UART serial port, the FPGA chip is connected to PHY1 through the RGMII interface, PHY1 is connected to the debugging interface through a transmission line that complies with the 1000BASE-T standard, and the FPGA chip is directly connected to the debugging interface at the UART serial port using an RS232 transmission line.

4. The optical-electrical redundant switching architecture based on the ASAAC standard according to claim 1, characterized in that: The 10G network switching chip has a built-in working mode switching submodule, and the working mode switching submodule is connected to the FPGA chip.

5. The optical-electrical redundant switching architecture based on the ASAAC standard according to claim 1, characterized in that: The 10G network switching chip is a chip that supports FlexE technology.

6. The optical-electrical redundant switching architecture based on the ASAAC standard according to claim 1, characterized in that: The MT fiber interface is an 8-degree APC-polished MT fiber interface.

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