Metering sampling circuit realizing isolation through high resistance

Abstract

The utility model provides a metering sampling circuit capable of realizing isolation through high resistance, which comprises a current-limiting voltage-dividing module, an analog control module, an operational amplifier module, a metering module and an MCU (Microprogrammed Control Unit), can be suitable for three-phase three-wire and three-phase four-wire voltage sampling, and performs impedance adjustment through the operational amplifier circuit before a sampling signal passes through the metering module, so that the metering sampling circuit can realize the isolation through the high resistance. Therefore, a stable metering sampling signal is obtained. The intelligent electric meter has the advantages of low cost, stability and reliability, and popularization, application and maintenance of the intelligent electric meter are greatly facilitated.

Description

Technical Field

[0001] The utility model relates to the field of intelligent meter sampling circuits, and adopts a high-resistance isolation method to meet the voltage sampling circuits for three-phase four-wire and three-phase three-wire wiring of electric energy meters. Background Art

[0002] With the development of science and technology, the electricity demands in industrial, agricultural, commercial and residential life in social life are increasing day by day. People's electricity transactions are becoming more and more frequent. Electric energy meters are measuring instruments for measuring the amount of electricity transactions, with very high technical requirements, and more accurate, stable, and long-term reliable operation is required.

[0003] At present, voltage sampling is mainly carried out in two ways, namely voltage transformer sampling and resistor sampling. For transformer sampling, a current-limiting resistor is connected in series in the primary circuit to convert the voltage into current. After passing through the transformer, the secondary outputs a current signal, which is converted into the required voltage signal through a sampling resistor, and then the signal is collected through chip ADC sampling; for resistor sampling, a small voltage signal is obtained by dividing the voltage with multiple resistors, and then the signal is collected through chip ADC sampling.

[0004] In the actual design process, for safety considerations, it is simpler to use a voltage transformer. However, considering issues such as cost and structural limitations, the transformer is not the best choice; when using resistor sampling, the problem of connecting the front-end N wire and the back-end ground wire together needs to be considered. At this time, the ground wire of the electric energy meter is the N phase in the mains electricity, which poses a safety hazard. This method has relatively high requirements for safety regulations.

[0005] When facing different power systems, the three-phase four-wire electric energy meter can use the external neutral wire N as the zero-voltage in the electric energy meter, while the three-phase three-wire wiring method lacks an external neutral wire as a reference, so different internal circuits need to be designed according to different wiring methods.

[0006] In addition, during the actual use of the electric energy meter, due to the complexity of the external usage scenarios, the accuracy of the internal sampling signal of the electric energy meter will be affected by the different impedance sizes in the circuit loop. Summary of the Utility Model

[0007] The purpose of the utility model is to address the issues of accuracy in voltage sampling of electric energy meters and internal switching between three-phase three-wire and three-phase four-wire. A metering sampling circuit isolated by high resistance is proposed. This circuit effectively reduces costs, improves structural limitations, meets safety standards, and can meet the internal switching between three-phase three-wire and three-phase four-wire of the electric meter, is not affected by external factors, and realizes relatively stable metering sampling.

[0008] The technical solution of the utility model is as follows:

[0009] The utility model provides a metering and sampling circuit isolated by high resistance, comprising: a current-limiting voltage-dividing module, an analog control module, an operational amplifier module, a metering module and an MCU;

[0010] The three-phase AC voltage source is voltage-divided by the current-limiting voltage-dividing module, and the generated voltage-divided signal is connected to the analog control module; the control signal input end of the analog control module is connected to the control port line of the MCU, receives the control signal of the MCU, and switches the three-phase three-wire and three-phase four-wire sampling modes; the output end of the analog control module is connected to the operational amplifier module, and the output end of the operational amplifier module is connected to the metering module, so as to realize voltage sampling, and the metering module is connected to the MCU.

[0011] Further, the current-limiting voltage-dividing module is a high-resistance voltage-dividing circuit respectively connected in series on the A, B, C and N lines, including a current-limiting circuit UA, a current-limiting circuit UB, a current-limiting circuit UC and a current-limiting circuit UN, which are used for stepping down the voltage at the front end of the metering voltage;

[0012] For the internal compatibility of the three-phase three-wire and three-phase four-wire metering methods of the electric energy meter, the B phase is divided into two branches, which is used as a reference point for the B phase during three-phase three-wire, and the N phase is divided into three branches, which is used as a reference point for the N phase during three-phase four-wire.

[0013] Further, the current-limiting circuit UA includes:

[0014] Voltage-dividing resistors R1-R6, one end of the voltage-dividing resistor R1 is connected to UA, and the other end is successively connected in series with resistors R2-R6, and the other end of the resistor R6 is denoted as UA_P; the voltage-dividing resistors R1-R6 are all in the order of MΩ, so that the sampling voltage signal UA_P is reduced;

[0015] Sampling resistor R7 and filtering capacitor C1, one end of the sampling resistor R7 is connected in series with the voltage-dividing resistors R1-R6, the other end is grounded, and the two ends of the sampling resistor R7 are connected in parallel with the filtering capacitor C1.

[0016] Further, the current-limiting circuit UB includes:

[0017] Series voltage-dividing resistors R8 - R11, a first branch composed of voltage-dividing resistors R12 and R13, and a second branch composed of voltage-dividing resistors R14 and R15. One end of the voltage-dividing resistor R8 is connected to UB, and the other end is successively connected in series with resistors R9 - R11. The other end of the resistor R11 is respectively connected to one end of the voltage-dividing resistor R12 in the first branch and one end of the voltage-dividing resistor R14 in the second branch. The other end of the resistor R12 is connected in series with the resistor R13, and the other end of the resistor R13 is denoted as UB_P1; the other end of the resistor R14 is connected in series with the resistor R15, and the other end of the resistor R15 is denoted as UB_P2; the voltage-dividing resistors R8 - R15 are all in the order of MΩ, so that the sampled voltage signals UB_P1 and UB_P2 are reduced;

[0018] Sampling resistors R16, R17 and filtering capacitors C2, C3. One end of the sampling resistor R16 is connected in series with the first branch, and the other end is grounded. The two ends of the sampling resistor R16 are shunted with the filtering capacitor C2; one end of the sampling resistor R17 is connected in series with the second branch, and the other end is grounded. The two ends of the sampling resistor R17 are shunted with the filtering capacitor C3, forming two sampling branches UB_P1 and UB_P2.

[0019] Further, the current-limiting circuit UC includes:

[0020] Voltage-dividing resistors R18 - R23. One end of the voltage-dividing resistor R18 is connected to UC, and the other end is successively connected in series with resistors R19 - R23. The other end of the resistor R23 is denoted as UC_P; the voltage-dividing resistors R18 - R23 are all in the order of MΩ, so that the sampled voltage signal UC_P is reduced;

[0021] Sampling resistor R24 and filtering capacitor C4. One end of the sampling resistor R24 is connected in series with the voltage-dividing resistors R18 - R23, and the other end is grounded. The two ends of the sampling resistor R24 are shunted with the filtering capacitor C4.

[0022] Further, the current-limiting circuit UN includes:

[0023] Voltage-dividing resistors R25 - R28, a third branch composed of voltage-dividing resistors R29, R30, a fourth branch composed of voltage-dividing resistors R31, R32, and a fifth branch composed of voltage-dividing resistors R33, R34; one end of the voltage-dividing resistor R25 is connected to UN, and the other end is successively connected in series with resistors R26 - R28. The other end of the resistor R28 is respectively connected to one end of the voltage-dividing resistor R29 in the third branch, one end of the voltage-dividing resistor R31 in the fourth branch, and one end of the voltage-dividing resistor R33 in the fifth branch. The other ends of the resistors R29, R31, and R33 are respectively connected in series with one end of the resistors R30, R32, and R34. The other ends of the resistors R30, R32, and R34 are respectively denoted as UN_1, UN_2, and UN_3; the voltage-dividing resistors R25 - R34 are all in the order of MΩ, so as to reduce the sampled voltage signals UN_1, UN_2, and UN_3.

[0024] Sampling resistors R35, R36, R37 and filtering capacitors C5, C6, C7. One ends of the sampling resistors R35, R36, R37 are respectively connected in series with the third, fourth, and fifth branches, and the other ends are respectively grounded. The two ends of the sampling resistors R35, R36, R37 are respectively connected in parallel with the filtering capacitors C5, C6, C7 to form three sampling branches UN_1, UN_2, and UN_3.

[0025] Further, the analog control module samples the voltage outputs of two branches of the current-limiting voltage-dividing module in phase B and three branches in phase N. The sampled voltage signals UB_P1, UB_P2, UN_1, UN_2, and UN_3 are respectively connected to the signal input ports of the analog control module after passing through the corresponding filtering capacitors. The A, B, and C channels of the analog control module are controlled by the IO ports of the MCU.

[0026] When wiring in three-phase four-wire, the analog control module opens three branches in phase N and respectively serves as the negative ends of the sampling signal input ends of the three phases UA, UB, and UC.

[0027] When wiring in three-phase three-wire, the analog control module disconnects phase N, and two channels in phase B respectively output two sampling signals as the reference points of phase A and phase C.

[0028] Further, the A, B, and C channels of the analog control module are controlled by the IO ports of the MCU. Each channel of the analog control module is controlled by a control end and two signal ends; two branches in phase B and three branches in phase N are respectively input to the signal ends of three channels of the analog control module U2; the high and low levels of the control end select the three-phase three-wire and three-phase four-wire metering methods; when the control end is at a high level, the corresponding channel is opened and the signal passes through; when the control end is at a low level, the corresponding channel is closed.

[0029] Further, the operational amplifier module differentially processes the sampled signal selected by the analog control module and then transmits it to the metering module through a voltage follower.

[0030] Further, the operational amplifier module includes differential amplifiers U3, U5, U7 and voltage followers U4, U6, U8. The sampled signals UA_P, UB_P, UC_P are connected to the non-inverting input terminals of the corresponding differential amplifiers U3, U5, U7, and the sampled signals VAN / VBN_1, VBN, VCN / VBN_2 are connected to the inverting input terminals of the corresponding differential amplifiers U3, U5, U7. The output terminals of the differential amplifiers U3, U5, U7 output single-channel signals, which are respectively connected to the non-inverting input terminals of the corresponding voltage followers U4, U6, U8. The voltage followers U4, U6, U8 output the sampled signals U_AN / U_AB, U_BN, U_CN / U_CB to the metering module to complete voltage sampling.

[0031] Advantages of the present utility model:

[0032] The sampling circuit of the present utility model effectively solves the potential safety hazard problem existing in resistor voltage division sampling. It can flexibly set the metering methods of three-phase three-wire and three-phase four-wire according to requirements. Regardless of how the external environmental impedance changes, it can ensure the stability of sampled data and does not affect the accurate metering of the electric meter.

[0033] The circuit of the present utility model is simple, low in cost, highly practical, and easy to implement.

[0034] Other features and advantages of the present utility model will be described in detail in the following specific implementation section. Description of the drawings

[0035] By describing the exemplary embodiments of the present utility model in more detail in conjunction with the drawings, the above and other objects, features, and advantages of the present utility model will become more obvious. Among them, in the exemplary embodiments of the present utility model, the same reference numerals generally represent the same components.

[0036] Figure 1 Shows the principle block diagram of the metering sampling circuit for isolation implemented by high resistance of the present utility model.

[0037] Figure 2 Shows the circuit diagram of the current-limiting voltage-dividing module;

[0038] Figure 3 Shows the principle sketch of the current-limiting voltage-dividing module;

[0039] Figure 4 Shows the structural schematic diagram of the analog control module;

[0040] Figure 5The schematic diagram of the operational amplifier module is shown. Specific Embodiments

[0041] The preferred embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although the preferred embodiments of the present invention are shown in the drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments described herein.

[0042] As Figures 1-5 shown, the present invention provides a metering and sampling circuit for isolation through high impedance, including: a current-limiting voltage-dividing module, an analog control module, an operational amplifier module, a metering module, and an MCU;

[0043] The three-phase AC voltage source is voltage-divided by the current-limiting voltage-dividing module, and the generated voltage-divided signal is connected to the analog control module; the control signal input terminal of the analog control module is connected to the control port line of the MCU to receive the control signal of the MCU and perform the switching of three-phase three-wire and three-phase four-wire sampling modes; the output terminal of the analog control module is connected to the operational amplifier module, and the output terminal of the operational amplifier module is connected to the metering module, thereby realizing voltage sampling, and the metering module is connected to the MCU.

[0044] The AC voltage source generates a small voltage signal through the resistance voltage division of the current-limiting voltage-dividing module and is connected to the analog control module. The analog control module is controlled by the MCU port line to perform the switching of three-phase three-wire and three-phase four-wire sampling modes and is connected to the operational amplifier module. The output terminal of the operational amplifier module is connected to the metering module, thereby realizing voltage sampling.

[0045] For the current-limiting voltage-dividing module, the voltage signal is voltage-divided by a series of high-resistance resistors on the A / B / C / N lines, which not only reduces the voltage at the front end of the metering voltage but also plays a role in current-limiting and voltage-reducing to meet safety standards.

[0046] The current-limiting circuit UA includes voltage-dividing resistors R1-R6 and a sampling resistor R7 connected in series therewith. The voltage-dividing resistors R1-R6 are all in the order of MΩ, so that the voltage signal UA_P is reduced.

[0047] The current-limiting circuit UB includes voltage-dividing resistors R8-R11. After the resistor R11, it is divided into two branches R12, R13 and R14, R15. After the resistor R13, a sampling resistor R16 is connected in series, and after the resistor R15, a sampling resistor R17 is connected in series to form two sampling branches UB_P1 and UB_P2, so that when performing three-phase three-wire metering, the B phase is used as a reference point. The voltage-dividing resistors R8-R15 are all in the order of MΩ, so that the voltage signal UB_P is reduced.

[0048] The current-limiting circuit UC includes voltage-dividing resistors R18 - R23 and a sampling resistor R24 connected in series therewith. The voltage-dividing resistors R18 - R23 are all in the order of MΩ, so as to reduce the voltage signal UC_P. Adding a resistor to the current-limiting circuit UN has an isolation effect, including voltage-dividing resistors R25, R26, R27, R28. After the resistor R28, it branches into three paths: R29, R30, R31, R32 and R33, R34. After the resistor R30, a sampling resistor R35 is connected in series. After the resistor R32, a sampling resistor R36 is connected in series. After the resistor R34, a sampling resistor R37 is connected in series, forming three sampling branches UN_1, UN_2 and UN_3, so that when performing three-phase four-wire metering, the N phase is used as a reference point. The voltage-dividing resistors R25 - R34 are all in the order of MΩ, so as to reduce the voltage signal UN.

[0049] For the analog control module, the above sampling signals UB_P1, UB_P2, UN_1, UN_2 and UN_3 are respectively connected to the signal input ports of the three channels of the analog control module after passing through the filter capacitors C2, C3, C5, C6 and C7. The control signals of the three channels are analog-controlled by the IO ports of the MCU, and the two jointly control the output of the sampling signal.

[0050] When wiring in three-phase four-wire, the analog control module outputs the sampling signal VAN on the A channel as the negative end of the sampling signal input terminal of the A phase, the analog control module outputs the sampling signal VBN on the B channel as the negative end of the sampling signal input terminal of the B phase, and the analog control module outputs the sampling signal VCN on the C channel as the negative end of the sampling signal input terminal of the C phase.

[0051] When wiring in three-phase three-wire, the analog control module disconnects the N phase, and two sampling signals are respectively output from two channels of the B phase as the reference points of the A phase and the C phase.

[0052] For the operational amplifier module, the sampled signal after being selected by the switch is transmitted to the metering module for processing. During this process, there are differences in impedance between the two circuits. To improve the stability and quality of the sampled signal, the voltage sampled signal is differentially processed and then transmitted to the metering chip through a voltage follower. The output terminal of U9 is connected to the non-inverting input terminals of U3, U5, and U7 through R61, R65, and R69 to increase the common-mode voltage;

[0053] The UA_P signal flows into the non-inverting input terminal of U3 through the resistor R58; the VAN three-phase four-wire / VBN_1 three-phase three-wire signal flows into the inverting input terminal of U3 through the resistor R59. The amplification factor is determined by the resistance ratio of R60 and R61, and the A-phase differential signal is output as a single-channel signal, and then the sampled signal U_AN three-phase four-wire / U_AB three-phase three-wire is output through the A-phase voltage follower U4.

[0054] The UB_P signal flows into the non-inverting input terminal of U5 through resistor R62, and the three-phase four-wire VBN signal flows into the inverting input terminal of U5 through resistor R64. The amplification factor is determined by the resistance ratio of R64 and R63, and the B-phase differential signal is output as a single-channel signal, and then the sampled signal U_BN three-phase four-wire is output through the B-phase voltage follower U6.

[0055] The UC_P signal flows into the non-inverting input terminal of U7 through resistor R66, and the three-phase four-wire VCN / three-phase three-wire VBN_2 signal flows into the inverting input terminal of U7 through resistor R67. The amplification factor is determined by the resistance ratio of R68 and R67, and the C-phase differential signal is output as a single-channel signal, and then the sampled signal U_CN three-phase four-wire / U_CB three-phase three-wire is output through the C-phase voltage follower U8.

[0056] During specific implementation:

[0057] The current-limiting and voltage-dividing module simplifies the schematic diagram of the voltage high-impedance isolation scheme, such as Figure 3 by Figure 3 combining Figure 2 in which, the first 4 voltage-dividing resistors R1 - R4 of phase A are equivalent to resistor R1, the latter 2 voltage-dividing resistors R5 - R6 are equivalent to resistor R1', and the sampling resistor R7 is equivalent to resistor r1. That is, the current-limiting circuit UA includes the voltage-dividing resistors R1, R1' and the sampling resistor r1 connected in series therewith.

[0058] And so on, the current-limiting circuit UB includes the voltage-dividing resistor R2, which is divided into two branches R2', r2 and R2", r2 circuits after R2;

[0059] The current-limiting circuit UC includes the voltage-dividing resistors R3, R3' and the sampling resistor r3 connected in series therewith;

[0060] The current-limiting circuit UN includes the voltage-dividing resistor R4, which is divided into three branches R4', r4, R4", r4 and R4"', r4 circuits after R4.

[0061] Assume that R1 = R2 = R3 = R4, R1' = R3' = 1 / 2R2' = 1 / 3R3', R2' = R2", R4' = R4" = R4"'. Since the voltage-dividing resistors R are all in the order of MΩ, the change of the sampling resistor r can be ignored, that is, r1 = r2 = r3 = r4.

[0062] According to the superposition theorem, the above circuit can be deduced:

[0063] The voltage generated across r1 by the phase A voltage is:

[0064] The voltage generated across r2 by the phase A voltage is:

[0065] The voltage generated across r3 by the phase A voltage is:

[0066] The voltage generated by the A-phase voltage across r4 is:

[0067] Similarly, the voltages generated by the B-phase and C-phase across the resistors r1, r2, r3, and r4 can be obtained. Then

[0068] The voltage generated by the B-phase voltage across r1 is:

[0069] The voltage generated by the B-phase voltage across r2 is:

[0070] The voltage generated by the B-phase voltage across r3 is:

[0071] The voltage generated by the B-phase voltage across r4 is:

[0072] The voltage generated by the C-phase voltage across r1 is:

[0073] The voltage generated by the C-phase voltage across r2 is:

[0074] The voltage generated by the C-phase voltage across r3 is:

[0075] The voltage generated by the C-phase voltage across r4 is:

[0076] Then the voltage across r1:

[0077]

[0078] The voltage across r2 is:

[0079]

[0080] The voltage across r3 is:

[0081]

[0082] The voltage across r4 is:

[0083]

[0084] After superposition of multiple loops, it can be obtained:

[0085]

[0086] Calculate the voltage-related parameters according to the above formula.

[0087] Analog control module. This chip is a three-to-one analog switch, equivalent to three single-pole double-throw switches. Each switch has a control terminal and two signal terminals.

[0088] Three digital control inputs A, B, and C can independently select the conduction direction of each analog switch blade position. When a high level is input to the control terminal, the corresponding switch is turned on and the signal can pass through; when a low level is input to the control terminal, the corresponding switch is turned off and the signal cannot pass through. When the INH input terminal is set to a high level, all channels of the three two-to-one analog switches are set to the off state.

[0089] To be compatible with three-phase three-wire and three-phase four-wire metering sampling, the B-phase sampling is divided into two branches, and the N-phase sampling is divided into three branches.

[0090] When the watt-hour meter is in the three-phase four-wire mode, the three branches of the N phase are opened and used as the negative terminals of the sampling signal input ends of the three phases UA, UB, and UC respectively; when the watt-hour meter is in the three-phase three-wire mode, the two branches of the B phase are opened and are respectively connected to the output sampling signals UAB and UCB of UA and UC.

[0091] Operational amplifier module. When the above switch is switched to the three-phase four-wire mode, the A-phase voltage sampling signal UAP is connected to the non-inverting input terminal of the differential amplifier U3 through the resistor R58, and VAN is connected to the inverting input terminal of the differential amplifier U3 through the resistor R59. The non-inverting input terminal of U3 is connected to the output terminal of U9 through the resistor R61. The resistors R70 and R71 are connected to the non-inverting input terminal of U9 to increase the common-mode voltage. The A-phase sampling signal determines the amplification factor of the single-phase signal at the output terminal through the ratio of the resistors R60 and R60, and then passes through the voltage follower U4 to improve the signal quality and output the A-phase sampling signal U_AN, which is sent to the metering module for arithmetic processing. The B-phase voltage sampling signal UBP is connected to the non-inverting input terminal of the differential amplifier U5 through the resistor R62, and VBN is connected to the inverting input terminal of the differential amplifier U5 through the resistor R63. The non-inverting input terminal of U5 is connected to the output terminal of U9 through the resistor R65. The B-phase sampling signal determines the amplification factor of the single-phase signal at the output terminal through the ratio of the resistors R64 and R63, and then passes through the voltage follower U6 to improve the signal quality and output the B-phase sampling signal U_BN, which is sent to the metering module for arithmetic processing. The C-phase voltage sampling signal UCP is connected to the non-inverting input terminal of the differential amplifier U7 through the resistor R66, and VCN is connected to the inverting input terminal of the differential amplifier U7 through the resistor R67. The non-inverting input terminal of U8 is connected to the output terminal of U9 through the resistor R65. The C-phase sampling signal determines the amplification factor of the single-phase signal at the output terminal through the ratio of the resistors R68 and R67, and then passes through the voltage follower U8 to improve the signal quality and output the C-phase sampling signal U_CN, which is sent to the metering module for arithmetic processing.

[0092] When the above switch is switched to the three-phase three-wire mode, U5 and U6 do not operate. The signal at the inverting input terminal of the differential amplifier U3 is switched to VBN_1, and the rest is the same as the situation of phase A in the three-phase four-wire system. The sampling signal U_AB is output by the voltage follower U4 and sent to the metering module for processing. The signal at the inverting input terminal of the differential amplifier U7 is switched to VBN_2, and the rest is the same as the situation of phase C in the three-phase four-wire system. The sampling signal U_CB is output by the voltage follower U8 and sent to the metering module for processing.

[0093] The embodiments of the present invention have been described above. The above description is exemplary and not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations are obvious to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments.

Claims

1. A metering sampling circuit that achieves isolation through high resistance, characterized in that include: Current limiting and voltage dividing module, analog control module, operational amplifier module, metering module and MCU; The three-phase AC voltage source is divided by a current limiting voltage divider module, and the generated voltage division signal is connected to the analog control module; the control signal input end of the analog control module is connected to the control port line of the MCU, receives the control signal of the MCU, and switches the three-phase three-wire and three-phase four-wire sampling modes; the output end of the analog control module is connected to the operational amplifier module, and the output end of the operational amplifier module is connected to the metering module, so as to realize voltage sampling, and the metering module is connected to the MCU.

2. The measurement sampling circuit for achieving isolation through high resistance according to claim 1, characterized in that: The current limiting and voltage dividing module is a high-resistance resistor voltage dividing circuit connected in series to the A, B, C and N lines respectively, including current limiting circuit UA, current limiting circuit UB, current limiting circuit UC and current limiting circuit UN, which is used to reduce the voltage at the front end of the metering voltage.

3. The metering sampling circuit for achieving isolation through high impedance according to claim 2, characterized in that The current limiting circuit UA includes: Voltage-dividing resistors R1-R6, one end of the voltage-dividing resistor R1 is connected to UA, and the other end is connected in series with resistors R2-R6 in sequence, and the other end of the resistor R6 is recorded as UA_P; the voltage-dividing resistors R1-R6 are all in the order of MΩ, so that the sampling voltage signal UA_P is reduced; A sampling resistor R7 and a filter capacitor C1, one end of the sampling resistor R7 is connected in series with the voltage-dividing resistors R1-R6, and the other end is grounded, and both ends of the sampling resistor R7 are connected in parallel with the filter capacitor C1.

4. The metering sampling circuit for achieving isolation through high impedance according to claim 2, characterized in that The current limiting circuit UB includes: A voltage-dividing resistor R8-R11 connected in series, a first branch consisting of voltage-dividing resistors R12 and R13, and a second branch consisting of voltage-dividing resistors R14 and R15, one end of the voltage-dividing resistor R8 is connected to UB, and the other end is connected in series with resistors R9-R11 in sequence, the other end of the resistor R11 is respectively connected to one end of the voltage-dividing resistor R12 in the first branch and one end of the voltage-dividing resistor R14 in the second branch, the other end of the resistor R12 is connected in series with the resistor R13, and the other end of the resistor R13 is recorded as UB_P1; the other end of the resistor R14 is connected in series with the resistor R15, and the other end of the resistor R15 is recorded as UB_P2; the voltage-dividing resistors R8-R15 are all in the order of MΩ, so that the sampling voltage signals UB_P1 and UB_P2 are reduced; Sampling resistors R16, R17 and filter capacitors C2, C3, one end of the sampling resistor R16 is connected in series with the first branch, and the other end is grounded, and the two ends of the sampling resistor R16 are connected in parallel with the filter capacitor C2; one end of the sampling resistor R17 is connected in series with the second branch, and the other end is grounded, and the two ends of the sampling resistor R17 are connected in parallel with the filter capacitor C3, forming two sampling branches UB_P1 and UB_P2.

5. The metering sampling circuit for achieving isolation through high impedance according to claim 2, characterized in that The current limiting circuit UC includes: Voltage-dividing resistors R18-R23, one end of the voltage-dividing resistor R18 is connected to UC, and the other end is connected in series with resistors R19-R23 in sequence, and the other end of the resistor R23 is recorded as UC_P; the voltage-dividing resistors R18-R23 are all in the order of MΩ, so that the sampling voltage signal UC_P is reduced; The sampling resistor R24 ​​and the filter capacitor C4, one end of the sampling resistor R24 ​​is connected in series with the voltage-dividing resistors R18-R23, and the other end is grounded, and both ends of the sampling resistor R24 ​​are connected in parallel with the filter capacitor C4.

6. The metering sampling circuit for achieving isolation through high impedance according to claim 2, characterized in that The current limiting circuit UN comprises: A voltage-dividing resistor R25-R28, a third branch consisting of voltage-dividing resistors R29 and R30, a fourth branch consisting of voltage-dividing resistors R31 and R32, and a fifth branch consisting of voltage-dividing resistors R33 and R34; one end of the voltage-dividing resistor R25 is connected to UN, and the other end is connected in series with resistors R26-R28 in sequence, the other end of the resistor R28 is respectively connected to one end of the voltage-dividing resistor R29 in the third branch, one end of the voltage-dividing resistor R31 in the fourth branch, and one end of the voltage-dividing resistor R33 in the fifth branch, the other ends of the resistors R29, R31 and R33 are respectively connected in series with one end of the resistors R30, R32 and R34, and the other ends of the resistors R30, R32 and R34 are respectively recorded as UN_1, UN_2 and UN_3; the voltage-dividing resistors R25-R34 are all in the order of MΩ, so that the sampling voltage signals UN_1, UN_2 and UN_3 are reduced; Sampling resistors R35, R36, R37 and filter capacitors C5, C6, C7, one end of the sampling resistors R35, R36, R37 are respectively connected in series with the third, fourth, and fifth branches, and the other ends are respectively grounded, and both ends of the sampling resistors R35, R36, R37 are respectively connected in parallel with the filter capacitors C5, C6, C7 to form three sampling branches UN_1, UN_2, and UN_3.

7. The metering sampling circuit for achieving isolation through high impedance according to claim 2, characterized in that The analog control module samples the voltage outputs of the two branches of the B phase and the three branches of the N phase of the current limiting and voltage dividing module. The sampled voltage signals UB_P1, UB_P2, UN_1, UN_2 and UN_3 are respectively connected to the signal input port of the analog control module after passing through the corresponding filter capacitors. The three channels A, B and C of the analog control module are controlled by the IO port of the MCU.

8. The metering sampling circuit for achieving isolation through high impedance according to claim 1, characterized in that The operational amplifier module performs differential processing on the sampling signal selected by the analog control module and then transmits the differential processing to the metering module through the voltage follower.

Images