Adjustable signal generating circuit

Abstract

The utility model discloses an adjustable signal generating circuit which comprises an ICL8038 chip, a first waveform adjusting circuit and a second waveform adjusting circuit. The output end of the first waveform adjusting circuit is electrically connected with the first duty ratio adjusting input end, the second duty ratio adjusting input end and the scanning frequency signal input end of the ICL8038 chip so that different voltage ratios can be provided between the first duty ratio adjusting input end and the second duty ratio adjusting input end through the first waveform adjusting circuit. Different voltage values are provided for the scanning frequency signal input end, so that the first waveform output end outputs a preset first waveform; the output end of the second waveform adjusting circuit is electrically connected with the second waveform output end, the first distortion degree adjusting input end and the second distortion degree adjusting input end, so that a second waveform output by the second waveform output end reaches a preset second waveform. By means of the structure, the adjustable signal generating circuit with the adjustable output waveform frequency and amplitude is achieved.

Description

Technical Field

[0001] The utility model relates to the technical field of ICL8038 chips, and particularly relates to an adjustable signal generating circuit. Background Technique

[0002] In the application of ship technology, there are often occasions where a power amplification module is used to drive an actuator to work to achieve the purpose of active and passive composite vibration reduction, which is mostly used for engines, etc. The actuator needs a signal to drive. At this time, the vibration generated by the actuator will cancel out the vibration of the vibration source itself, so as to achieve the effect of vibration reduction. In addition to vibration reduction, the actuator can also act as a vibration source to form a vibration platform.

[0003] When driving an actuator, an external signal source is usually set outside the actuator, and the signal generated by the external signal source is amplified to drive the actuator. However, the external signal source is relatively large in volume, and it is difficult to integrate it with the power amplifier in the same box, and it is not easy to carry. Content of the Utility Model

[0004] The utility model provides an adjustable signal generating circuit, which realizes an adjustable signal generating circuit with adjustable frequency and amplitude of the output waveform by connecting different circuits around the ICL8038 chip, and has a small volume, strong portability and is easy to integrate.

[0005] The utility model provides an adjustable signal generating circuit, including: an ICL8038 chip, a first waveform adjustment circuit and a second waveform adjustment circuit;

[0006] The ICL8038 chip includes a first duty cycle adjustment input terminal, a second duty cycle adjustment input terminal, a sweep frequency signal input terminal, a second waveform output terminal, a first distortion adjustment input terminal and a second distortion adjustment input terminal; the ICL8038 chip outputs a first waveform corresponding to the voltage ratio according to the voltage ratio between the first duty cycle adjustment input terminal and the second duty cycle adjustment input terminal; the ICL8038 chip outputs a first waveform at a preset frequency according to the voltage value of the sweep frequency signal input terminal; the ICL8038 chip outputs a second waveform according to different voltage values of the first distortion adjustment input terminal and the second distortion adjustment input terminal;

[0007] The output terminals of the first waveform adjustment circuit are respectively electrically connected to the first duty cycle adjustment input terminal, the second duty cycle adjustment input terminal and the sweep frequency signal input terminal of the ICL8038 chip, so as to provide different voltage ratios between the first duty cycle adjustment input terminal and the second duty cycle adjustment input terminal of the ICL8038 chip through the first waveform adjustment circuit, and provide different voltage values to the sweep frequency signal input terminal of the ICL8038 chip through the first waveform adjustment circuit, so that the first waveform output terminal of the ICL8038 chip outputs a preset first waveform;

[0008] The output terminals of the second waveform adjustment circuit are respectively electrically connected to the second waveform output terminal, the first distortion adjustment input terminal, and the second distortion adjustment input terminal of the ICL8038 chip, so as to provide different voltage values to the first distortion adjustment input terminal and the second distortion adjustment input terminal of the ICL8038 chip through the second waveform adjustment circuit, enable the second waveform output terminal of the ICL8038 chip to output a second waveform, and adjust the amplitude of the second waveform through the second waveform adjustment circuit so that the second waveform reaches a preset second waveform.

[0009] Optionally, the first waveform adjustment circuit includes a frequency modulation circuit, and the frequency modulation circuit includes a first potentiometer, a first current limiting resistor, and a first filter capacitor;

[0010] The first end of the first potentiometer is electrically connected to the first power supply, the second end of the first potentiometer is electrically connected to the first end of the first current limiting resistor, the second end of the first current limiting resistor is electrically connected to the second power supply, the adjustment end of the first potentiometer is electrically connected to the scanning frequency signal input terminal of the ICL8038 chip, the first filter capacitor is connected in parallel between the adjustment end of the first potentiometer and the first end of the first potentiometer, and the voltage of the first power supply is greater than the voltage of the second power supply.

[0011] Optionally, the first waveform adjustment circuit includes a duty cycle adjustment circuit, and the duty cycle adjustment circuit includes a second potentiometer, a first resistor, and a second resistor;

[0012] The adjustment end of the second potentiometer is electrically connected to the third power supply, the first end of the second potentiometer is electrically connected to the first end of the first resistor, the second end of the second potentiometer is electrically connected to the first end of the second resistor, and the second ends of the first resistor and the second resistor are respectively electrically connected to the first duty cycle adjustment input terminal and the second duty cycle adjustment input terminal of the ICL8038 chip.

[0013] Optionally, the second waveform adjustment circuit includes a first distortion adjustment circuit and a second distortion adjustment circuit. The first distortion adjustment circuit includes a third potentiometer, and the second distortion adjustment circuit includes a fourth potentiometer;

[0014] The adjustment end of the third potentiometer is electrically connected to the first end and is electrically connected to the fourth power supply, and the second end of the third potentiometer is electrically connected to the first distortion adjustment input terminal of the ICL8038 chip; the adjustment end of the fourth potentiometer is electrically connected to the first end and is electrically connected to the fifth power supply, and the second end of the fourth potentiometer is electrically connected to the second distortion adjustment input terminal of the ICL8038 chip; the voltage of the fifth power supply is greater than the voltage of the fourth power supply.

[0015] Optionally, the second waveform adjustment circuit includes an amplitude modulation circuit, and the amplitude modulation circuit includes a fifth potentiometer, a feedback resistor, a balance resistor, and an operational amplifier;

[0016] The first end of the fifth potentiometer is electrically connected to the second waveform output end of the ICL8038 chip, the second end of the fifth potentiometer is grounded, the adjustment end of the fifth potentiometer is electrically connected to the first input end of the operational amplifier, the second input end of the operational amplifier is electrically connected to the first end of the balancing resistor, the output end of the operational amplifier is electrically connected to the first end of the feedback resistor, the second end of the feedback resistor is electrically connected to the second input end of the operational amplifier, and the second end of the balancing resistor is electrically connected to the second end of the fifth potentiometer.

[0017] Optionally, the second waveform adjustment circuit further includes a first filter circuit, a second filter circuit, and a third filter circuit;

[0018] The first filter circuit is electrically connected between the second waveform output end of the ICL8038 chip and the first end of the fifth potentiometer, the second filter circuit is electrically connected between the adjustment end of the fifth potentiometer and the first input end of the operational amplifier, and the third filter circuit is electrically connected to the output end of the operational amplifier.

[0019] Optionally, the first filter circuit, the second filter circuit, and the third filter circuit are all RC filter circuits.

[0020] Optionally, the adjustable signal generation circuit further includes: a pull-up resistor;

[0021] The first end of the pull-up resistor is electrically connected to the sixth power supply, and the second end of the pull-up resistor is electrically connected to the first waveform output end of the ICL8038 chip.

[0022] Optionally, the adjustable signal generation circuit further includes: an oscillation capacitor;

[0023] The oscillation capacitor is electrically connected between the seventh power supply and the oscillation capacitor access end of the ICL8038 chip;

[0024] A frequency range is provided to the ICL8038 chip through the oscillation capacitor.

[0025] Optionally, the adjustable signal generation circuit further includes: a second filter capacitor and a third filter capacitor;

[0026] The first end of the second filter capacitor is electrically connected to the first power input end of the ICL8038 chip, and the second end of the second filter capacitor is grounded; the first end of the third filter capacitor is electrically connected to the second power input end of the ICL8038 chip, and the second end of the third filter capacitor is grounded.

[0027] The technical solution of the present utility model is to provide a first waveform adjustment circuit and a second waveform adjustment circuit around the ICL8038 chip, and electrically connect the output end of the first waveform adjustment circuit to the first duty cycle adjustment input end, the second duty cycle adjustment input end and the scanning frequency signal input end of the ICL8038 chip respectively. By adjusting the first waveform adjustment circuit, different voltage ratios can be provided between the first duty cycle adjustment input end and the second duty cycle adjustment input end of the ICL8038 chip, and different voltage ratios can adjust the frequency and duty cycle of the first waveform output from the first waveform output end of the ICL8038 chip. In addition, the first waveform adjustment circuit can also provide different voltage values to the scanning frequency signal input end of the ICL8038 chip. By adjusting the first waveform adjustment circuit, the frequency of the first waveform output from the first waveform output end of the ICL8038 chip can be changed, so that the first waveform reaches the first waveform under the preset frequency and preset duty cycle. In addition, electrically connect the output end of the second waveform adjustment circuit to the second waveform output end, the first distortion adjustment input end and the second distortion adjustment input end of the ICL8038 chip respectively. By adjusting the second waveform adjustment circuit, different voltage values can be provided to the first distortion adjustment input end and the second distortion adjustment input end of the ICL8038 chip, so that the distortion of the peaks and valleys of the second waveform output from the second waveform output end of the ICL8038 chip meets the preset requirements. In addition, if there is a difference between the second waveform and the amplitude of the preset second waveform required by the actual demand, the amplitude of the second waveform can also be adjusted through the second waveform adjustment circuit, so that the second waveform reaches the preset second waveform. By using the above circuit, by providing a first waveform adjustment circuit and a second waveform adjustment circuit around the ICL8038 chip, the ICL8038 chip can finally output the required preset first waveform and preset second waveform, meeting the working requirements of the actuator. At the same time, the circuit structure is simple, the size is small, the portability is strong and it is easy to integrate.

[0028] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present utility model, nor is it used to limit the scope of the present utility model. Other features of the present utility model will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present utility model. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0030] Figure 1Schematic diagram of a tunable signal generation circuit provided by an embodiment of the present utility model;

[0031] Figure 2 Schematic diagram of a frequency modulation circuit provided by an embodiment of the present utility model;

[0032] Figure 3 Schematic diagram of a second tunable signal generation circuit provided by an embodiment of the present utility model;

[0033] Figure 4 Schematic diagram of the second waveform before adjustment of the second waveform output by the ICL8038 chip provided by an embodiment of the present utility model;

[0034] Figure 5 Schematic diagram of the second waveform after adjustment of the second waveform output by the ICL8038 chip provided by an embodiment of the present utility model;

[0035] Figure 6 Schematic diagram of an amplitude modulation circuit provided by an embodiment of the present utility model. Detailed implementation manners

[0036] In order to enable those skilled in the art to better understand the solution of the present utility model, the technical solutions in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all the embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present utility model.

[0037] It should be noted that the terms "first", "second", etc. in the specification and claims of the present utility model and the above drawings are used to distinguish similar objects, and do not necessarily need to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present utility model described herein can be implemented in an order different from those illustrated or described herein.

[0038] In one embodiment, Figure 1 Schematic diagram of a tunable signal generation circuit provided by an embodiment of the present utility model, as Figure 1As shown, the adjustable signal generation circuit includes: ICL8038 chip U1, first waveform adjustment circuit U3, and second waveform adjustment circuit U4; ICL8038 chip U1 includes a first duty cycle adjustment input terminal 4, a second duty cycle adjustment input terminal 5, a sweep frequency signal input terminal 8, a second waveform output terminal 2, a first distortion adjustment input terminal 1, and a second distortion adjustment input terminal 12; ICL8038 chip U1 outputs a first waveform corresponding to the voltage ratio according to the voltage ratio of the first duty cycle adjustment input terminal 4 and the second duty cycle adjustment input terminal 5; ICL8038 chip U1 outputs a first waveform at a preset frequency according to the voltage value of the sweep frequency signal input terminal 8; ICL8038 chip U1 outputs a second waveform according to different voltage values of the first distortion adjustment input terminal 1 and the second distortion adjustment input terminal 12; the output terminal of the first waveform adjustment circuit U3 is electrically connected to the first duty cycle adjustment input terminal 4, the second duty cycle adjustment input terminal 5, and the sweep frequency signal input terminal 8 of the ICL8038 chip U1 respectively, so as to provide different voltage ratios between the first duty cycle adjustment input terminal 4 and the second duty cycle adjustment input terminal 5 of the ICL8038 chip U1 through the first waveform adjustment circuit U3, and provide different voltage values to the sweep frequency signal input terminal 8 of the ICL8038 chip U1 through the first waveform adjustment circuit U3, so that the first waveform output terminal 9 of the ICL8038 chip U1 outputs a preset first waveform; the output terminal of the second waveform adjustment circuit U4 is electrically connected to the second waveform output terminal 2, the first distortion adjustment input terminal 1, and the second distortion adjustment input terminal 12 of the ICL8038 chip U1 respectively, so as to provide different voltage values to the first distortion adjustment input terminal 1 and the second distortion adjustment input terminal 12 of the ICL8038 chip U1 through the second waveform adjustment circuit U4, so that the second waveform output terminal 2 of the ICL8038 chip U1 outputs a second waveform, and adjust the amplitude of the second waveform through the second waveform adjustment circuit U4, so that the second waveform reaches a preset second waveform.

[0039] Among them, the ICL8038 chip U1 is a precision oscillation integrated circuit with multiple waveform outputs. In this embodiment, the ICL8038 chip U1 can output at least a square wave and a sine wave. The ICL8038 chip U1 includes a first duty cycle adjustment input terminal 4, a second duty cycle adjustment input terminal 5, a sweep frequency signal input terminal 8, a second waveform output terminal 2, a first distortion adjustment input terminal 1, and a second distortion adjustment input terminal 12. Among them, since the ICL8038 chip U1 contains an internal circuit, the ICL8038 chip U1 can output a first waveform corresponding to the voltage ratio according to the voltage ratio of the first duty cycle adjustment input terminal 4 and the second duty cycle adjustment input terminal 5, and the first waveform can be a square wave. In addition, the ICL8038 chip U1 can also output the first waveform at a preset frequency according to the voltage value of the sweep frequency signal input terminal 8, so that the first waveform output terminal 9 of the ICL8038 chip U1 can finally output a preset first waveform. In addition, the ICL8038 chip U1 can also output a second waveform according to different voltage values of the first distortion adjustment input terminal 1 and the second distortion adjustment input terminal 12, and the second waveform can be a sine wave. The first waveform adjustment circuit U3 is a circuit for adjusting the frequency and duty cycle of the first waveform. In this embodiment, the first waveform adjustment circuit U3 can include a frequency modulation circuit and a duty cycle adjustment circuit, so that the first waveform output by the ICL8038 chip U1 is the first waveform at a preset duty cycle and a preset frequency. The second waveform adjustment circuit U4 is a circuit for adjusting the waveform distortion and amplitude of the second waveform. In this embodiment, the second waveform adjustment circuit U4 can include a distortion adjustment circuit and an amplitude modulation circuit, so that the second waveform output by the ICL8038 chip U1 reaches a preset second waveform.

[0040] Specifically, when driving the actuator with a preset waveform, the preset waveform can be output by the ICL8038 chip U1. That is to say, a first waveform adjustment circuit U3 and a second waveform adjustment circuit U4 can be arranged around the ICL8038 chip U1. By electrically connecting the output terminal of the first waveform adjustment circuit U3 to the first duty cycle adjustment input terminal 4, the second duty cycle adjustment input terminal 5, and the sweep frequency signal input terminal 8 of the ICL8038 chip U1 respectively, different voltage ratios can be provided between the first duty cycle adjustment input terminal 4 and the second duty cycle adjustment input terminal 5 of the ICL8038 chip U1 by adjusting the first waveform adjustment circuit U3. Different voltage ratios can make the first waveform output by the first waveform output terminal of the ICL8038 chip U1 reach different duty cycles. In this embodiment, the duty cycle of the first waveform can be adjusted to 0.5, that is, within one cycle of the first waveform, the time of the high level is equal to the time of the low level. In addition, different voltage values can be provided to the sweep frequency signal input terminal 8 of the ICL8038 chip U1 through the first waveform adjustment circuit U3 to adjust the frequency of the first waveform output by the first waveform output terminal 9 of the ICL8038 chip U1, and this adjustment is usually a coarse adjustment of the frequency. In addition, by adjusting the first waveform adjustment circuit U3, in addition to adjusting the duty cycle of the first waveform to the first duty cycle adjustment input terminal 4 and the second duty cycle adjustment input terminal 5 of the ICL8038 chip U1, the frequency of the first waveform can also be finely adjusted through the first duty cycle adjustment input terminal 4 and the second duty cycle adjustment input terminal 5. Therefore, usually, when adjusting the first waveform, different voltage values are usually provided to the sweep frequency signal input terminal 8 of the ICL8038 chip U1 first to coarsely adjust the frequency of the first waveform, and then the frequency and duty cycle of the first waveform are adjusted by adjusting the first duty cycle adjustment input terminal 4 and the second duty cycle adjustment input terminal 5 of the ICL8038 chip U1 to make the first waveform reach the preset first waveform under the preset frequency and preset duty cycle. At this time, the preset first waveform can be input as the drive signal of the actuator to make the actuator work. In addition, by electrically connecting the output terminal of the second waveform adjustment circuit U4 to the second waveform output terminal 2, the first distortion adjustment input terminal 1, and the second distortion adjustment input terminal 12 of the ICL8038 chip U1 respectively, different voltage values can be provided to the first distortion adjustment input terminal 1 and the second distortion adjustment input terminal 12 of the ICL8038 chip U1 by adjusting the second waveform adjustment circuit U4, so that the distortion of the peaks and valleys of the second waveform output by the ICL8038 chip U1 meets the preset requirements. At this time, the second waveform output terminal 2 of the ICL8038 chip U1 can output the second waveform.If there is a difference between the second waveform and the amplitude of the preset second waveform required in actuality, the amplitude of the second waveform can also be adjusted by the second waveform adjustment circuit U4 so that the second waveform reaches the preset second waveform. At this time, the preset second waveform can be input as the drive signal of the actuator to make the actuator work.

[0041] In the technical solution of the embodiment of the present utility model, by arranging a first waveform adjustment circuit and a second waveform adjustment circuit around the ICL8038 chip, and electrically connecting the output end of the first waveform adjustment circuit to the first duty cycle adjustment input end, the second duty cycle adjustment input end and the scanning frequency signal input end of the ICL8038 chip respectively, it is enabled that by adjusting the first waveform adjustment circuit, different voltage ratios can be provided between the first duty cycle adjustment input end and the second duty cycle adjustment input end of the ICL8038 chip, and different voltage ratios can adjust the frequency and duty cycle of the first waveform output by the first waveform output end of the ICL8038 chip. In addition, the first waveform adjustment circuit can also provide different voltage values to the scanning frequency signal input end of the ICL8038 chip. By adjusting the first waveform adjustment circuit, the frequency of the first waveform output by the first waveform output end of the ICL8038 chip can be changed so that the first waveform reaches the first waveform under the preset frequency and preset duty cycle. In addition, by electrically connecting the output end of the second waveform adjustment circuit to the second waveform output end, the first distortion degree adjustment input end and the second distortion degree adjustment input end of the ICL8038 chip respectively, by adjusting the second waveform adjustment circuit, different voltage values can be provided to the first distortion degree adjustment input end and the second distortion degree adjustment input end of the ICL8038 chip, so that the distortion degrees of the peaks and valleys of the second waveform output by the second waveform output end of the ICL8038 chip reach the preset requirements. In addition, if there is a difference between the second waveform and the amplitude of the preset second waveform required in actuality, the amplitude of the second waveform can also be adjusted by the second waveform adjustment circuit so that the second waveform reaches the preset second waveform. By using the above circuit, by arranging a first waveform adjustment circuit and a second waveform adjustment circuit around the ICL8038 chip, the ICL8038 chip can finally output the required preset first waveform and preset second waveform to meet the working requirements of the actuator. At the same time, the circuit structure is simple, the size is small, the portability is strong and it is easy to integrate.

[0042] Optionally, Figure 2 is a schematic structural diagram of a frequency modulation circuit provided for the embodiment of the present utility model, Figure 3 is a schematic structural diagram of the second adjustable signal generation circuit provided for the embodiment of the present utility model. Refer to Figure 2 and Figure 3As shown, the first waveform adjustment circuit U3 includes a frequency modulation circuit 31. The frequency modulation circuit 31 includes a first potentiometer RP5, a first current-limiting resistor R10, and a first filter capacitor C12. The first end of the first potentiometer RP5 is electrically connected to the first power supply V+. The second end of the first potentiometer RP5 is electrically connected to the first end of the first current-limiting resistor R10. The second end of the first current-limiting resistor R10 is electrically connected to the second power supply V-. The adjustment end of the first potentiometer RP5 is electrically connected to the scanning frequency signal input terminal 8 of the ICL8038 chip U1. The first filter capacitor C12 is connected in parallel between the adjustment end of the first potentiometer RP5 and the first end of the first potentiometer RP5. The voltage of the first power supply V+ is greater than the voltage of the second power supply V-.

[0043] Among them, the first potentiometer RP5 is a resistance element with three lead-out terminals and a resistance value that can be adjusted according to a certain variation law. The first potentiometer RP5 usually includes a resistor body and a movable brush. Its main function is to adjust the magnitude of voltage and current, that is, by manually adjusting the rotating shaft or the sliding handle, changing the position of the moving contact on the resistor body, then changing the resistance value between the moving contact and any one of the fixed terminals, thereby changing the magnitude of voltage and current. The first current-limiting resistor R10 is connected in series in the circuit to limit the magnitude of the current in the branch where it is located to prevent the components connected in series from being burned out due to excessive current. The first filter capacitor C12 is a capacitor used in DC or AC circuits. The first filter capacitor C12 has a relatively large capacitance and a small resistance value, and can achieve good on-off performance for high-frequency signals, playing a filtering role. In this embodiment, the resistance value of the first potentiometer RP5 is 10 kΩ, and the resistance value of the first current-limiting resistor R10 is 20 kΩ. In addition, the first power supply V+ and the second power supply V- are used to provide the working voltage for the ICL8038 chip U1. The voltage of the first power supply V+ is greater than the voltage of the second power supply V-. In this embodiment, the first power supply V+ can be a positive voltage, the second power supply V- can be a negative voltage, and the voltage of the first power supply V+ can be +12V, and the voltage of the second power supply V- can be -12V.

[0044] Specifically, when coarsely adjusting the frequency of the first waveform output by the ICL8038 chip U1, a frequency modulation circuit 31 can be externally connected to the scanning frequency signal input terminal 8 of the ICL8038 chip U1. By adjusting the adjustment terminal of the first potentiometer RP5 in the frequency modulation circuit 31, since a first current limiting resistor R10 is provided between the second power supply V- and the second terminal of the first potentiometer RP5, and the resistance value of the first current limiting resistor R10 is relatively large, the current flowing through the first current limiting resistor R10 is very small and can be ignored. As a result, the current generated by the first power supply V+ will flow to the first potentiometer RP5, and after passing through the first potentiometer RP5, it will finally be output from the adjustment terminal of the first potentiometer RP5 to the scanning frequency signal input terminal 8 of the ICL8038 chip U1, causing the voltage value input to the scanning frequency signal input terminal 8 to change, thereby realizing the adjustment of the frequency of the first waveform output from the first waveform output terminal 9 of the ICL8038 chip U1, so that the first waveform reaches the preset frequency.

[0045] Optionally, continuing to refer to Figure 3 As shown, the first waveform adjustment circuit U3 includes a duty cycle adjustment circuit 32, and the duty cycle adjustment circuit 32 includes a second potentiometer RP1, a first resistor R1, and a second resistor R2; the adjustment terminal of the second potentiometer RP1 is electrically connected to the third power supply V+, the first terminal of the second potentiometer RP1 is electrically connected to the first terminal of the first resistor R1, the second terminal of the second potentiometer RP1 is electrically connected to the first terminal of the second resistor R2, and the second terminals of the first resistor R1 and the second resistor R2 are respectively electrically connected to the first duty cycle adjustment input terminal 4 and the second duty cycle adjustment input terminal 5 of the ICL8038 chip U1.

[0046] Among them, the second potentiometer RP1 is a resistance element with three lead-out terminals and a resistance value that can be adjusted according to a certain variation law. The second potentiometer RP1 usually includes a resistor body and a movable brush. Its main function is to adjust the magnitude of voltage and current, that is, by manually adjusting the rotating shaft or the sliding handle, the position of the moving contact on the resistor body is changed, so that the resistance value between the moving contact and any one of the fixed terminals is changed, thereby changing the magnitude of voltage and current. In this embodiment, the resistance value of the second potentiometer RP1 can be 10 kΩ, and the resistance values of the first resistor R1 and the second resistor R2 can be equal, both being 4.7 kΩ. In addition, the third power supply V+ is used to provide the working voltage for the ICL8038 chip U1. The third power supply V+ can be a positive voltage, and the voltage value can be +12V.

[0047] Specifically, when adjusting the frequency and duty cycle of the first waveform, a duty cycle adjustment circuit 32 can be externally connected to the first duty cycle adjustment input terminal 4 and the second duty cycle adjustment input terminal 5 of the ICL8038 chip U1. By adjusting the second potentiometer RP1 in the duty cycle adjustment circuit 32, the voltages input to both ends of the first duty cycle adjustment input terminal 4 and the second duty cycle adjustment input terminal 5 change, so that the duty cycle of the first waveform output by the ICL8038 chip U1 changes. Therefore, the duty cycle of the first waveform can reach 0.5 by adjusting the second potentiometer RP1, and the ICL8038 chip U1 outputs a standard preset first waveform at the first waveform output terminal 9. In addition, after the frequency of the first waveform is adjusted by the frequency modulation circuit 31, since the frequency modulation of the first waveform by the frequency modulation circuit 31 is usually a coarse adjustment and can only adjust the frequency to the preset frequency range and cannot achieve the output of the precise frequency, that is, the preset frequency cannot be reached. At this time, the duty cycle adjustment circuit 32 can finely adjust the frequency of the first waveform while adjusting the duty cycle of the first waveform, thus ensuring that the ICL8038 chip U1 outputs the preset first waveform at the preset frequency at the first waveform output terminal 9.

[0048] Optionally, continue to refer to Figure 3 , the adjustable signal generation circuit further includes: an oscillation capacitor C8; the oscillation capacitor C8 is electrically connected between the seventh power supply V- and the oscillation capacitor access terminal 10 of the ICL8038 chip U1; the oscillation capacitor C8 provides a frequency range for the ICL8038 chip U1.

[0049] Among them, the oscillation capacitor C8 is used to provide an adjustable frequency range for the ICL8038 chip U1. In this embodiment, an external oscillation capacitor C8 is used to provide a frequency range for the ICL8038 chip U1, so that when adjusting the frequency of the first waveform output by the ICL8038 chip U1, the adjustment can be performed within this frequency range. Exemplarily, the frequency range that the oscillation capacitor C8 can provide is 20 Hz to 20 kHz. Therefore, when adjusting the frequency of the first waveform by the frequency modulation circuit 31 and the duty cycle adjustment circuit 32, the adjustment can be performed within 20 Hz to 20 kHz to make the frequency of the first waveform reach the required preset frequency.

[0050] Optionally, Figure 4 is a schematic diagram of the second waveform before adjustment of the second waveform output by the ICL8038 chip provided by the embodiment of the present invention, Figure 5 is a schematic diagram of the second waveform after adjustment of the second waveform output by the ICL8038 chip provided by the embodiment of the present invention. Refer to Figures 3 to 5As shown, the second waveform adjustment circuit U4 includes a first distortion adjustment circuit 41 and a second distortion adjustment circuit 42. The first distortion adjustment circuit 41 includes a third potentiometer RP2, and the second distortion adjustment circuit 42 includes a fourth potentiometer RP3. The adjustment terminal of the third potentiometer RP2 is electrically connected to the first terminal and is also electrically connected to the fourth power supply V-. The second terminal of the third potentiometer RP2 is electrically connected to the first distortion adjustment input terminal 12 of the ICL8038 chip U1. The adjustment terminal of the fourth potentiometer RP3 is electrically connected to the first terminal and is also electrically connected to the fifth power supply V+. The second terminal of the fourth potentiometer RP3 is electrically connected to the second distortion adjustment input terminal 1 of the ICL8038 chip U1. The voltage of the fifth power supply V+ is greater than the voltage of the fourth power supply V-.

[0051] Among them, both the third potentiometer RP2 and the fourth potentiometer RP3 are resistance elements with three lead-out terminals and whose resistance values can be adjusted according to a certain variation law. The third potentiometer RP2 and the fourth potentiometer RP3 usually include a resistance body and a movable brush. Their main function is to adjust the magnitudes of voltage and current, that is, by manually adjusting the rotating shaft or the sliding handle, changing the position of the moving contact on the resistance body, then changing the resistance value between the moving contact and any one of the fixed terminals, thereby changing the magnitudes of voltage and current. The fourth power supply V- and the fifth power supply V+ are used to provide the working voltage for the ICL8038 chip U1. The voltage value of the fourth power supply V- can be -12V, and the voltage source of the fifth power supply V+ can be +12V. In this embodiment, the resistance values of the third potentiometer RP2 and the fourth potentiometer RP3 can be equal and can both be 100 kΩ.

[0052] Specifically, refer to Figure 4, when the second waveform is not adjusted, it can be seen that neither the peak nor the trough of the second waveform meets the requirements of a standard sine wave. Among them, the second waveform can be a sine wave, and the driving signal of this sine wave cannot achieve the normal and stable driving of the actuator. Therefore, it is necessary to adjust the second waveform output by the ICL8038 chip U1. In this embodiment, a first distortion adjustment circuit 41 and a second distortion adjustment circuit 42 can be arranged around the ICL8038 chip U1. By adjusting the third potentiometer RP2 in the first distortion adjustment circuit 41, the current can flow from the fourth power supply V- to the adjustment end of the third potentiometer RP2, and finally flow out from the second end of the third potentiometer RP2 and be input to the first distortion adjustment input terminal 12 of the ICL8038 chip U1, changing the voltage of the first distortion adjustment input terminal 12, so that the trough distortion of the second waveform can be adjusted. Similarly, by adjusting the fourth potentiometer RP3 in the second distortion adjustment circuit 42, the current can flow from the fifth power supply V+ to the adjustment end of the fourth potentiometer RP3, and finally flow out from the second end of the fourth potentiometer RP3 and be input to the second distortion adjustment input terminal 1 of the ICL8038 chip U1, changing the voltage of the second distortion adjustment input terminal 1, so that the peak distortion of the second waveform can be adjusted. After such adjustment, the second waveform output by the second waveform output terminal 2 of the ICL8038 chip U1 can be referred to Figure 5 As shown, it can be seen that the curve between the peak and trough of the adjusted second waveform is relatively smooth, meeting the preset sine wave requirements.

[0053] Optionally, Figure 6 is a schematic diagram of the amplitude modulation circuit provided by the embodiment of the present invention. Refer to Figure 3 and Figure 6 , the second waveform adjustment circuit U4 includes an amplitude modulation circuit 43. The amplitude modulation circuit 43 includes a fifth potentiometer RP4, a feedback resistor R6, a balance resistor R7, and an operational amplifier U2; the first end of the fifth potentiometer RP4 is connected to the second waveform output terminal 2 of the ICL8038 chip U1, the second end of the fifth potentiometer RP4 is grounded to GND, the adjustment end of the fifth potentiometer RP4 is electrically connected to the first input terminal of the operational amplifier U2, the second input terminal of the operational amplifier U2 is electrically connected to the first end of the balance resistor R7, the output terminal of the operational amplifier U2 is electrically connected to the first end of the feedback resistor R6, the second end of the feedback resistor R6 is electrically connected to the second input terminal of the operational amplifier U2, and the second end of the balance resistor R7 is electrically connected to the second end of the fifth potentiometer RP4.

[0054] Among them, the fifth potentiometer RP4 is a resistance element with three leads and a resistance value that can be adjusted according to a certain variation law, and is used to adjust the amplification factor of the operational amplifier U2. The operational amplifier U2 is a circuit structure with a high amplification factor, and the model of the operational amplifier U2 can be LM741. The feedback resistor R6 is connected in parallel between the second input terminal and the output terminal of the operational amplifier U2, which can reduce the output offset voltage and improve the accuracy and stability of the analog voltage signal. The balancing resistor R7 is connected in series between the second input terminal of the operational amplifier U2 and the ground GND, which can balance the impedance between the two input terminals of the operational amplifier U2. In this embodiment, the resistance value of the fifth potentiometer RP4 can be 100 kΩ, the resistance value of the feedback resistor R6 can be 2 kΩ, and the resistance value of the balancing resistor R7 can be 4.7 kΩ.

[0055] Specifically, after the second waveform is output from the second waveform output terminal 2 of the ICL8038 chip U1, if there is a difference in amplitude between the second waveform and the required standard second waveform, the fifth potentiometer RP4 in the amplitude modulation circuit 41 can be adjusted to change the amplification factor of the operational amplifier U2, so that the second waveform after passing through the operational amplifier U2 can reach the preset second waveform with the required amplitude.

[0056] Optionally, referring to Figures 4 to 6 , the second waveform adjustment circuit U4 further includes a first filter circuit 44, a second filter circuit 45, and a third filter circuit 46; the first filter circuit 44 is electrically connected between the second waveform output terminal 2 of the ICL8038 chip U1 and the first end of the fifth potentiometer RP4, the second filter circuit 45 is electrically connected between the adjustment end of the fifth potentiometer RP4 and the first input terminal of the operational amplifier U2, and the third filter circuit 46 is electrically connected to the output terminal of the operational amplifier U2.

[0057] Among them, the first filter circuit 44, the second filter circuit 45, and the third filter circuit 46 are all circuits for filtering the second waveform. In this embodiment, the first filter circuit 44, the second filter circuit 45, and the third filter circuit 46 are all RC filter circuits, which have a simple structure and strong anti-interference ability.

[0058] Specifically, referring to Figure 4 , when the second waveform is not adjusted, there is noise interference around the second waveform, such as Figure 4 the black shadow in. To eliminate the noise interference, this embodiment adds a multi-stage RC filter circuit in the amplitude modulation circuit 43, referring to Figure 6The first-stage RC filter circuit composed of R8 and C10, the second-stage RC filter circuit composed of R11 and C13, and the third-stage RC filter circuit composed of R9 and C11. After the second waveform is output from the second waveform output terminal 2 of the ICL8038 chip U1, the second waveform can greatly reduce noise after passing through the multi-stage RC filter circuit, so that the noise of the second waveform finally output from the output terminal of the operational amplifier U2 can be basically eliminated. The filtered second waveform can be referred to Figure 5 As shown, it can be seen that there is basically no noise around the second waveform, and the standard preset second waveform is realized.

[0059] Optionally, continue to refer to Figure 3 , the adjustable signal generation circuit further includes: a pull-up resistor R3; the first end of the pull-up resistor R3 is electrically connected to the sixth power supply V+, and the second end of the pull-up resistor R3 is electrically connected to the first waveform output terminal 9 of the ICL8038 chip U1.

[0060] Among them, the pull-up resistor R3 is a resistor element provided to realize the conversion between high level and low level. The voltage of the sixth power supply V+ can be +12V. In this embodiment, by electrically connecting the first end of the pull-up resistor R3 to the sixth power supply V+ and the second end of the pull-up resistor R3 to the first waveform output terminal 9 of the ICL8038 chip U1, the pull-up resistor R3 can realize the conversion between high level and low level, thereby generating the first waveform.

[0061] Optionally, continue to refer to Figure 3 , the adjustable signal generation circuit further includes: a second filter capacitor C1 and a third filter capacitor C2; the first end of the second filter capacitor C1 is electrically connected to the first power input terminal 6 of the ICL8038 chip U1, and the second end of the second filter capacitor C1 is grounded to GND; the first end of the third filter capacitor C2 is electrically connected to the second power input terminal 11 of the ICL8038 chip U1, and the second end of the third filter capacitor C2 is grounded to GND.

[0062] Among them, both the second filter capacitor C1 and the third filter capacitor C2 are capacitors used in DC or AC circuits; the second filter capacitor C1 and the third filter capacitor C2 have relatively large capacitance and small resistance values, and can achieve good on-off performance for high-frequency signals, playing a filtering role.

[0063] It should be understood that various forms of the flow shown above can be used, reordering, adding or deleting steps. For example, the steps recorded in the present invention can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved, and no limitation is made herein.

[0064] The above specific embodiments do not constitute a limitation on the protection scope of the present utility model. Those skilled in the art should understand that various modifications, combinations, sub - combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. An adjustable signal generating circuit, characterized in that: include: ICL8038 chip, a first waveform adjustment circuit and a second waveform adjustment circuit; The ICL8038 chip includes a first duty cycle adjustment input terminal, a second duty cycle adjustment input terminal, a scanning frequency signal input terminal, a second waveform output terminal, a first distortion adjustment input terminal, and a second distortion adjustment input terminal; the ICL8038 chip outputs a first waveform corresponding to the voltage ratio according to the voltage ratio of the first duty cycle adjustment input terminal and the second duty cycle adjustment input terminal; the ICL8038 chip outputs the first waveform at a preset frequency according to the voltage value of the scanning frequency signal input terminal; the ICL8038 chip outputs a second waveform according to different voltage values ​​of the first distortion adjustment input terminal and the second distortion adjustment input terminal; The output end of the first waveform adjustment circuit is electrically connected to the first duty cycle adjustment input end, the second duty cycle adjustment input end and the scanning frequency signal input end of the ICL8038 chip respectively, so as to provide different voltage ratios between the first duty cycle adjustment input end and the second duty cycle adjustment input end of the ICL8038 chip through the first waveform adjustment circuit, and provide different voltage values ​​to the scanning frequency signal input end of the ICL8038 chip through the first waveform adjustment circuit, so that the first waveform output end of the ICL8038 chip outputs a preset first waveform; The output end of the second waveform adjustment circuit is electrically connected to the second waveform output end, the first distortion adjustment input end and the second distortion adjustment input end of the ICL8038 chip, respectively, so as to provide different voltage values ​​to the first distortion adjustment input end and the second distortion adjustment input end of the ICL8038 chip through the second waveform adjustment circuit, so that the second waveform output end of the ICL8038 chip outputs a second waveform, and the amplitude of the second waveform is adjusted through the second waveform adjustment circuit so that the second waveform reaches a preset second waveform.

2. The adjustable signal generating circuit according to claim 1, characterized in that: The first waveform adjustment circuit includes a frequency modulation circuit, and the frequency modulation circuit includes a first potentiometer, a first current limiting resistor and a first filter capacitor; The first end of the first potentiometer is electrically connected to the first power supply, the second end of the first potentiometer is electrically connected to the first end of the first current limiting resistor, the second end of the first current limiting resistor is electrically connected to the second power supply, the adjustment end of the first potentiometer is electrically connected to the scanning frequency signal input end of the ICL8038 chip, the first filter capacitor is connected in parallel between the adjustment end of the first potentiometer and the first end of the first potentiometer, and the voltage of the first power supply is greater than the voltage of the second power supply.

3. The adjustable signal generating circuit according to claim 1, characterized in that: The first waveform adjustment circuit includes a duty cycle adjustment circuit, and the duty cycle adjustment circuit includes a second potentiometer, a first resistor and a second resistor; The adjustment end of the second potentiometer is electrically connected to the third power supply, the first end of the second potentiometer is electrically connected to the first end of the first resistor, the second end of the second potentiometer is electrically connected to the first end of the second resistor, and the second end of the first resistor and the second end of the second resistor are electrically connected to the first duty cycle adjustment input end and the second duty cycle adjustment input end of the ICL8038 chip respectively.

4. The adjustable signal generating circuit according to claim 1, characterized in that: The second waveform adjustment circuit includes a first distortion adjustment circuit and a second distortion adjustment circuit, the first distortion adjustment circuit includes a third potentiometer, and the second distortion adjustment circuit includes a fourth potentiometer; The adjustment end of the third potentiometer is electrically connected to the first end and to the fourth power supply, and the second end of the third potentiometer is electrically connected to the first distortion adjustment input end of the ICL8038 chip; the adjustment end of the fourth potentiometer is electrically connected to the first end and to the fifth power supply, and the second end of the fourth potentiometer is electrically connected to the second distortion adjustment input end of the ICL8038 chip; the voltage of the fifth power supply is greater than the voltage of the fourth power supply.

5. The adjustable signal generating circuit according to claim 1, characterized in that: The second waveform adjustment circuit includes an amplitude modulation circuit, and the amplitude modulation circuit includes a fifth potentiometer, a feedback resistor, a balancing resistor and an operational amplifier; The first end of the fifth potentiometer is electrically connected to the second waveform output end of the ICL8038 chip, the second end of the fifth potentiometer is grounded, the adjustment end of the fifth potentiometer is electrically connected to the first input end of the operational amplifier, the second input end of the operational amplifier is electrically connected to the first end of the balancing resistor, the output end of the operational amplifier is electrically connected to the first end of the feedback resistor, the second end of the feedback resistor is electrically connected to the second input end of the operational amplifier, and the second end of the balancing resistor is electrically connected to the second end of the fifth potentiometer.

6. The adjustable signal generating circuit according to claim 5, characterized in that: The second waveform adjustment circuit also includes a first filter circuit, a second filter circuit and a third filter circuit; The first filter circuit is electrically connected between the second waveform output end of the ICL8038 chip and the first end of the fifth potentiometer, the second filter circuit is electrically connected between the adjustment end of the fifth potentiometer and the first input end of the operational amplifier, and the third filter circuit is electrically connected to the output end of the operational amplifier.

7. The adjustable signal generating circuit according to claim 6, characterized in that: The first filter circuit, the second filter circuit and the third filter circuit are all RC filter circuits.

8. The adjustable signal generating circuit according to claim 1, characterized in that: Also includes: Pull-up resistor; The first end of the pull-up resistor is electrically connected to the sixth power supply, and the second end of the pull-up resistor is electrically connected to the first waveform output end of the ICL8038 chip.

9. The adjustable signal generating circuit according to claim 1, characterized in that: Also includes: Oscillation capacitor; The oscillation capacitor is electrically connected between the seventh power supply and the oscillation capacitor access terminal of the ICL8038 chip; The frequency range is provided to the ICL8038 chip through the oscillation capacitor.

10. The adjustable signal generating circuit according to claim 1, characterized in that: Also includes: A second filter capacitor and a third filter capacitor; The first end of the second filter capacitor is electrically connected to the first power input terminal of the ICL8038 chip, and the second end of the second filter capacitor is grounded; the first end of the third filter capacitor is electrically connected to the second power input terminal of the ICL8038 chip, and the second end of the third filter capacitor is grounded.

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