Capacitor howling suppression circuit

Abstract

The utility model provides a capacitor squeal suppression circuit. The capacitor squeal suppression circuit comprises a switch tube, a switch driving circuit, a first voltage sampling circuit for outputting first sampling voltage, a second voltage sampling circuit for outputting second sampling voltage, a master control circuit and a comparator. The switching tube comprises a first connecting end connected with the power input end and a second connecting end connected with the power output end. The main control circuit outputs a reference voltage according to the first sampling voltage. The comparator compares a second sampling voltage with the reference voltage and outputs a voltage comparison signal, and the switch driving circuit controls the switch-on or switch-off of the switch tube according to the voltage comparison signal output by the comparator. In this way, the ripple voltage in the input voltage can be filtered out, and then the purpose of reducing noise is achieved.

Description

Technical Field

[0001] The utility model relates to the technical field of circuit design, and particularly relates to a capacitor cawing suppression circuit.

Background Art

[0002] For EMC (Electromagnetic Compatibility) protection and filtering of high-frequency interference signals, multiple parallel MLCCs (Multilayer Ceramic Capacitors) are usually arranged at the power input end of a product. When the ripple of the input power supply is large and the frequency is between 20 and 20 KHz, the multilayer ceramic capacitor will generate cawing noise due to the deformation caused by the piezoelectric effect.

[0003] In the existing design solutions, the capacitance value of the electrolytic capacitor at the power input end is increased to reduce the ripple voltage of the input power supply, thereby reducing the ripple voltage of the MLCC and the noise of the MLCC.

[0004] However, this design still has the following problems:

[0005] 1) In order to reduce the noise, it is necessary to reduce the ripple voltage of the input power supply, so it is necessary to connect more electrolytic capacitors in parallel. The increase or enlargement of the electrolytic capacitor makes the surge current increase, which may exceed the surge current specification requirements, increasing the cost of problem-solving and the cost of components;

[0006] 2) With the increase in the number of capacitors, a larger PCB (Printed Circuit Board) layout area and a larger structural space are required, making it impossible for products with limited structural space to meet this design;

[0007] 3) The increase or enlargement of the electrolytic capacitor can only moderately reduce the ripple voltage of the input power supply, so the noise cannot be completely filtered out.

[0008] Therefore, it is necessary to propose a new technical solution to solve the above problems.

Content of the Utility Model

[0009] One of the purposes of the utility model is to provide a capacitor cawing suppression circuit, which can filter out the ripple voltage in the input voltage, thereby reducing the capacitor cawing noise.

[0010] To achieve the above object, the present utility model provides a capacitance cawing suppression circuit, which includes: a switching transistor, which includes a first connection end connected to a power input terminal, a second connection end connected to a power output terminal, and a control end; a switching drive circuit connected to the control end of the switching transistor; a first voltage sampling circuit connected to the power input terminal, which outputs a first sampling voltage through its output end; a main control circuit, one input end of which is connected to the output end of the first voltage sampling circuit and outputs a reference voltage through its output end; a second voltage sampling circuit connected to the power output terminal, which outputs a second sampling voltage; a comparator, which includes a first input end connected to the output end of the main control circuit, a second input end connected to the output end of the second voltage sampling circuit, and an output end, wherein the comparator compares the second sampling voltage with the reference voltage and outputs a voltage comparison signal, the input end of the switching drive circuit is connected to the output end of the comparator, and the switching drive circuit controls the conduction or cut-off of the switching transistor according to the voltage comparison signal output by the comparator.

[0011] Compared with the prior art, the present utility model can set the output voltage to a predetermined voltage value by obtaining the input voltage and according to the magnitude of the input voltage and the magnitude of the ripple (for example, when the input power supply is 12V with a ripple of ±1V and it is recognized that Vppmin is 11V, the output voltage is set to 11V, so that the ripple is eliminated). Therefore, almost all the ripple voltages at the power input terminal can be filtered out, and thus the capacitance value of the original circuit design can even be reduced. Therefore, the inrush current of the original circuit design will not be increased, and may even be reduced. At the same time, due to the filtering of the power supply ripple voltage, the MLCC noise can be reduced.

Description of the Drawings

[0012] In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present utility model. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts. Among them:

[0013] Figure 1 It is a schematic diagram of the capacitance cawing suppression circuit in an embodiment of the present utility model.

Detailed Embodiments

[0014] To make the above objects, features, and advantages of the present utility model more obvious and understandable, the present utility model will be further described in detail below with reference to the drawings and specific embodiments.

[0015] As used herein, the term "one embodiment" or "embodiment" refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present utility model. The appearances of "in one embodiment" in different places in this specification do not all refer to the same embodiment, nor are they separate or alternative embodiments that exclude each other. Unless otherwise specified, the terms indicating electrical connection such as "coupled", "connected", "joined", and "connected" in this article all mean directly or indirectly connected. For example, when A is connected to B, it includes both A and B being directly electrically connected, and also A being connected to B through electrical components or circuits.

[0016] In the description of the present utility model, it should be understood that the orientation or positional relationships indicated by the terms "upper", "lower", "front", "rear", "front side", "back side", "left", "right", "vertical", "perpendicular", "horizontal", "top", "bottom", "inner", "outer", etc. are based on the orientation or positional relationships shown in the drawings, and are only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present utility model.

[0017] Figure 1 It is a schematic diagram of a capacitor crosstalk suppression circuit 100 in one embodiment of the present utility model. As Figure 1 shown, the capacitor crosstalk suppression circuit 100 includes a switching transistor Q100, a switching drive circuit 120, a first voltage sampling circuit 110, a main control circuit 130, a second voltage sampling circuit 140, and a comparator 150.

[0018] The switching transistor Q100 includes a first connection end connected to the power input terminal, a second connection end connected to the power output terminal, and a control end. In one embodiment, the switching transistor Q100 is a PMOS (positive channel MetalOxide Semiconductor) transistor, the source electrode of the PMOS transistor serves as its first connection end, the drain electrode serves as its second connection end, and the gate electrode serves as its control end. The power input terminal can provide an input voltage Vin, and the power output terminal can provide an output voltage Vout. In another embodiment, the switching transistor Q100 can also be a PNP triode, or other switching transistors.

[0019] The switching drive circuit 120 is connected to the control end of the switching transistor Q100, and it can control the switching transistor Q100 to conduct or cut off.

[0020] The first voltage sampling circuit 110 is connected to the power input terminal, and it can output a first sampling voltage Vin_ADC through its output terminal. In one embodiment, the first voltage sampling circuit 110 includes a resistor R3 and a resistor R7 connected in series between the power input terminal and the ground terminal, and the middle node of the resistor R3 and the resistor R7 serves as the output terminal of the first sampling voltage circuit 110.

[0021] The second voltage sampling circuit 140 is connected to the power output terminal, and it can output a second sampling voltage through its output terminal. In one embodiment, the second sampling voltage circuit 140 includes a resistor R2 and a resistor R5 connected in series between the power output terminal and the ground terminal, and the middle node of the resistor R2 and the resistor R5 serves as the output terminal of the second sampling voltage circuit 140.

[0022] One input terminal of the main control circuit 130 is connected to the output terminal of the first voltage sampling circuit 110 to receive the first sampling voltage Vin_ADC, and outputs a reference voltage Vref through its output terminal according to the first sampling voltage Vin_ADC.

[0023] The comparator 150 includes a first input terminal connected to the output terminal of the main control circuit 130, a second input terminal connected to the output terminal of the second voltage sampling circuit 140, and an output terminal. The comparator 150 compares the second sampling voltage and the reference voltage Vref and outputs a voltage comparison signal Vo. The input terminal of the switch driving circuit 120 is connected to the output terminal of the comparator 150, and the switch driving circuit 120 controls the conduction or cutoff of the switch tube Q100 according to the voltage comparison signal Vo output by the comparator 150.

[0024] In one embodiment, when the second sampling voltage (i.e., the voltage V+ at the second input terminal of the comparator) is higher than the reference voltage Vref (i.e., the voltage V- at the first input terminal of the comparator), the switch driving circuit 120 controls the switch tube Q100 to cutoff, so that the second sampling voltage decreases. When the second sampling voltage is lower than the reference voltage Vref, the switch driving circuit 120 controls the switch tube Q100 to conduct, so that the second sampling voltage increases. Through the control of negative feedback, finally the second sampling voltage is stabilized at the reference voltage Vref.

[0025] In one embodiment, the main control circuit 130 obtains the minimum value Vppmin of the ripple voltage of the input voltage Vin at the power input terminal based on the first sampled voltage, and determines the reference voltage Vref according to the minimum value Vppmin of the ripple voltage, such that when the second sampled voltage is equal to the reference voltage Vref, the output voltage Vout at the power output terminal is equal to the minimum value Vppmin of the ripple voltage. In this way, the conduction and cutoff of the switching transistor Q100 are controlled in the form of negative feedback. Finally, when the system is stable, Vout = (Vref / R5)*(R2+R5), and the output voltage Vout is set to the minimum value Vppmin of the ripple voltage of the input voltage Vin, thereby filtering out the ripple voltage, and further achieving the purpose of reducing the system ripple voltage and the whistling noise of the MLCC.

[0026] Specifically, as Figure 1 shown, the main control circuit 130 includes a micro control circuit MCU and a reference voltage generation circuit 131. One input terminal of the micro control circuit MCU receives the first sampled voltage Vin_ADC, and one output terminal PWM is connected to the reference voltage generation circuit 131. The output terminal of the reference voltage generation circuit provides the reference voltage Vref. The output terminal of the reference voltage generation circuit is also connected to another input terminal Vout_ADC of the micro control circuit MCU to feedback the reference voltage Vref to the micro control circuit MCU. The micro control circuit MCU determines whether the reference voltage Vref reaches the expected value based on the reference voltage received at the other input terminal, and adjusts the signal of its output terminal PWM to make the reference voltage reach the expected value.

[0027] As Figure 1 shown, the reference voltage generation circuit 131 includes a resistor R11 and a capacitor C4 connected in series between the output terminal PWM of the micro control circuit MCU and the ground terminal. The output terminal of the micro control circuit outputs a pulse width modulation signal, and the duty cycle of the pulse width modulation signal is adjusted to make the reference voltage reach the expected value. In another alternative embodiment, the reference voltage generation circuit 131 can also be integrated into the micro control circuit MCU. In this case, the micro control circuit MCU is the main control circuit 130.

[0028] The switch driving circuit 120 includes: resistors R9, R10, R1, R4, R8, R6, and triodes Q1, Q2, Q3, Q4. Triodes Q1 and Q3 are PNP-type triodes, and triodes Q2 and Q4 are NPN-type triodes. Resistors R9 and R10 are connected in series between the input end and the ground end of the switch driving circuit 120. Resistors R1 and R4 are connected in series between the power input end and the collector of triode Q4. The base of triode Q4 is connected to the middle node of resistors R9 and R10, and the emitter of triode Q4 is connected to the ground end. The emitter of triode Q1 is connected to the power input end, the base of triode Q1 is connected to the middle node of resistors R1 and R4, and the collector of triode Q1 is connected to the ground end through resistor R8. The collector of triode Q2 is connected to the power input end. The emitters of triode Q2 and triode Q3 are connected and then connected to the control end of the switch tube Q100 through resistor R6. The bases of triode Q2 and triode Q3 are connected and then connected to the collector of triode Q1. The collector of triode Q3 is grounded.

[0029] Specifically, when the second sampled voltage is higher than the reference voltage, the comparator 150 outputs a high level. At this time, triodes Q4, Q1, and Q2 are turned on, triode Q3 is turned off, and the switch tube Q100 is turned off. When the second sampled voltage is lower than the reference voltage, the comparator 150 outputs a low level. At this time, triodes Q4, Q1, and Q2 are turned off, triode Q3 is turned on, and the switch tube Q100 is turned on.

[0030] The utility model can set the output voltage to the minimum value Vppmin of the ripple voltage. Therefore, almost all the ripple voltages at the power input end can be filtered out. Thus, the capacitance value of the original circuit design can even be reduced, so that the inrush current of the original circuit design will not increase, and may even be reduced. At the same time, due to the filtering of the power supply ripple voltage, the MLCC noise can be reduced. This solution does not have high components such as inductors and capacitors. Therefore, the PCBA (printed circuit board assembly) with limited structural space height can be better laid out.

[0031] In one embodiment, the capacitor crosstalk suppression circuit 100 further includes a low dropout voltage regulator circuit (LDO) 160. The input end of the low dropout voltage regulator circuit 160 is connected to the power input end, and the output end is connected to the power supply end of the main control circuit 130 and the power supply end of the comparator 150 to supply power to the main control circuit 130 and the comparator 150.

[0032] In one embodiment, the capacitor crosstalk suppression circuit 100 further includes: one or more capacitors connected in parallel between the power output end and the ground end; a load circuit RL connected to the power output end. Figure 1Among them, the capacitors are C1, C2, and C3, which can be multilayer ceramic capacitors (MLCC). In other embodiments, the capacitance connected in parallel between the power output terminal and the ground terminal can be reduced or increased.

[0033] Next, the implementation principle of the present invention will be introduced again in combination with Figure 1 the specific examples given.

[0034] When the input voltage Vin is powered on, the LDO 160 converts the input voltage Vin into VCC to supply power to the MCU U2 and the comparator U3. The MCU U2 samples and detects the first sampling voltage Vin_ADC through the input terminal ADC1 to obtain the minimum value Vppmin of the ripple voltage of the input voltage Vin. Through the formula Vout=(Vref / R5)*(R2 + R5), the MCU sets the reference voltage Vref so that Vout = Vppmin. If Vref is less than the target voltage value (expected value) of Vref, the duty cycle of the pulse width modulation signal can be increased, and vice versa, the duty cycle of the pulse width modulation signal is decreased, so that Vref finally reaches the expected value, and then Vout = Vppmin.

[0035] (1) When the voltage V+ (the second sampling voltage) at the second input terminal of the comparator is greater than the voltage V- (the reference voltage Vref) at the first input terminal, the comparator U3 outputs a high level. At this time, the base voltage Vb of the NPN transistor Q4 is equal to the voltage division of Vo (the voltage comparison signal output by the comparator U3) on the resistor R10. The Ube of the transistor Q4 is greater than the conduction voltage of 0.7V, and the transistor Q4 is in the saturation state. The base voltage Vb of the transistor Q1 is equal to (Vin - 0.3V)*(R4 / (R4 + R1)). Through the configuration of the resistors, the base voltage Vb of this transistor Q1 is set to be less than Vin - 0.7V. The Ve of the transistor Q1 = Vin, and the Ube of the PNP transistor Q1 satisfies the conduction voltage of -0.7V, and the transistor Q1 is in the saturation state.

[0036] At this time, the base voltage Vb of the transistors Q2 and Q3 is Vin - 0.3V. The Ve of the transistor Q2 is equal to Vc of Q1 - 0.7V≈Vin-(0.3 + 0.7)V. The transistor Q2 is turned on, and the transistor Q3 is in the cut-off state. The Vgs of the switching transistor Q100≈-(0.3 + 0.7)V is greater than Vgs(th), so the switching transistor Q100 is in the off state (cut-off). The actual output voltage Vout drops.

[0037] (2) When the voltage V+ (the second sampling voltage) at the second input terminal of the comparator is less than the voltage V- (the reference voltage Vref) at the first input terminal, the comparator U3 outputs a low level. The Vb on the NPN transistor Q4 is at a low level, Ube≈0V, and Q4 is in the off and cut-off state. The voltage Vb on the base of the PNP transistor Q1 is approximately equal to the input voltage Vin, the Ve of Q1 = Vin, and Ube≈0V does not meet the conduction condition, so Q1 is in the off state. At this time, the base voltage Vb of the transistors Q2 and Q3 is at a low level approximately equal to 0V, the transistor Q2 is in the off state. Due to the emitter diode of the transistor Q3, Vg of the switching transistor Q100 = 0.7V, Vgs≈-Vin + 0.7V is less than Vgs(th), so the switching transistor Q100 is in the on state (conducting), and at this time the output voltage Vout increases. After the system stabilizes, the output voltage Vout=(Vref / R5)*(R2 + R5). At this time, this output voltage is equal to the minimum value Vppmin of the ripple voltage of the input voltage Vin. Therefore, the ripple voltage of the input voltage is filtered out, and the ripple voltage across the MLCC at the front end of the load RL is filtered out, solving the problem of the whistling noise caused by the piezoelectric effect of the MLCC.

[0038] It should be noted that any modification made by those skilled in the art to the specific implementation manners of the present invention does not depart from the scope of the claims of the present invention. Correspondingly, the scope of the claims of the present invention is not limited solely to the foregoing specific implementation manners.

Claims

1. A capacitor howling suppression circuit, characterized in that: It includes: The switch tube comprises a first connection end connected to the power input end, a second connection end connected to the power output end, and a control end; A switch driving circuit connected to the control end of the switch tube; A first voltage sampling circuit connected to the power input terminal, which outputs a first sampling voltage through its output terminal; A main control circuit, one input end of which is connected to the output end of the first voltage sampling circuit, and outputs a reference voltage through its output end; A second voltage sampling circuit connected to the power output terminal, which outputs a second sampling voltage; A comparator, comprising a first input terminal connected to the output terminal of the main control circuit, a second input terminal connected to the output terminal of the second voltage sampling circuit, and an output terminal, wherein the comparator compares the second sampling voltage with the reference voltage and outputs a voltage comparison signal, the input terminal of the switch driving circuit is connected to the output terminal of the comparator, and the switch driving circuit controls the conduction or cutoff of the switch tube according to the voltage comparison signal output by the comparator.

2. The capacitor howling suppression circuit according to claim 1, characterized in that: When the second sampling voltage is higher than the reference voltage, the switch driving circuit controls the switch tube to be turned off, and when the second sampling voltage is lower than the reference voltage, the switch driving circuit controls the switch tube to be turned on, so that the second sampling voltage is finally stabilized at the reference voltage.

3. The capacitive howling suppression circuit according to claim 2, characterized in that: The main control circuit obtains a minimum ripple voltage value of the input voltage Vin at the power input end according to the first sampling voltage, and determines the reference voltage according to the minimum ripple voltage value, so that when the second sampling voltage is equal to the reference voltage, the output voltage Vout at the power output end is equal to the minimum ripple voltage value.

4. The capacitive howling suppression circuit according to claim 3, characterized in that: The main control circuit includes a micro control circuit and a reference voltage generating circuit. The microcontrol circuit has an input terminal that receives a first sampling voltage, and an output terminal that is connected to the reference voltage generating circuit. The output terminal of the reference voltage generating circuit provides the reference voltage. The output terminal of the reference voltage generating circuit is also connected to another input terminal of the microcontrol circuit to feed back the reference voltage to the microcontrol circuit. The microcontrol circuit determines whether the reference voltage reaches an expected value based on the reference voltage received at the other input terminal, and adjusts the signal at its output terminal so that the reference voltage reaches the expected value.

5. The capacitive howling suppression circuit according to claim 4, characterized in that: The reference voltage generating circuit includes a resistor R11 and a capacitor C4 connected in series between the output terminal of the microcontrol circuit and the ground terminal. The output terminal of the microcontrol circuit outputs a pulse width modulation signal. The reference voltage reaches the expected value by adjusting the duty cycle of the pulse width modulation signal.

6. The capacitive howling suppression circuit according to claim 1, characterized in that: The switch driving circuit includes: resistors R9, R10, R1, R4, R8, R6, transistors Q1, Q2, Q3, Q4, transistors Q1 and Q3 are PNP transistors, transistors Q2 and Q4 are NPN transistors, Resistors R9 and R10 are connected in series between the input terminal and the ground terminal of the switch driving circuit. The resistors R1 and R4 are connected in series between the power input terminal and the collector of the transistor Q4, the base of the transistor Q4 is connected to the middle node of the resistors R9 and R10, and the emitter of the transistor Q4 is connected to the ground terminal. The emitter of the transistor Q1 is connected to the power input terminal, the base of the transistor Q1 is connected to the middle node of the resistors R1 and R4, and the collector of the transistor Q1 is connected to the ground terminal through the resistor R8. The collector of the transistor Q2 is connected to the power input end, the emitter of the transistor Q2 is connected to the emitter of the transistor Q3 and then connected to the control end of the switch tube through the resistor R6, the base of the transistor Q2 is connected to the base of the transistor Q3 and then connected to the collector of the transistor Q1, and the collector of the transistor Q3 is grounded.

7. The capacitive howling suppression circuit according to claim 6, characterized in that: When the second sampling voltage is higher than the reference voltage, the comparator outputs a high level, transistors Q4, Q1, and Q2 are turned on, transistor Q3 is turned off, and the switch tube is turned off. When the second sampling voltage is lower than the reference voltage, the comparator outputs a low level, transistors Q4, Q1, and Q2 are turned off, transistor Q3 is turned on, and the switch tube is turned on.

8. The capacitive howling suppression circuit according to claim 1, characterized in that: It also includes a low dropout voltage regulation circuit, The input end of the low voltage difference voltage regulating circuit is connected to the power input end, and the output end is connected to the power end of the main control circuit and the power end of the comparator. The switch tube is a PMOS transistor, the source of the PMOS transistor is used as its first connection terminal, the drain is used as its second connection terminal, and the gate is used as its control terminal.

9. The capacitive howling suppression circuit according to claim 1, characterized in that: The first sampling voltage circuit includes a resistor R3 and a resistor R7 connected in series between the power input terminal and the ground terminal, and the middle node between the resistor R3 and the resistor R7 serves as the output terminal of the first sampling voltage circuit. The second sampling voltage circuit includes a resistor R2 and a resistor R5 connected in series between the power output terminal and the ground terminal, and an intermediate node between the resistor R2 and the resistor R5 serves as an output terminal of the second sampling voltage circuit.

10. The capacitive howling suppression circuit according to claim 1, characterized in that: It also includes: One or more capacitors connected in parallel between the power supply output terminal and the ground terminal; A load circuit is connected to the output end of the power supply.

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