Signal processing circuit and system

Abstract

The utility model discloses a signal processing circuit and system, and relates to the technical field of signal processing, and the signal processing circuit comprises a timing comparator which is used for carrying out counting reset and signal comparison according to an edge event obtained by detecting a zero crossing point of an excitation signal, and outputting a periodic event signal and a sampling trigger signal; the interrupt controller is connected with the timing comparator and is used for outputting an interrupt trigger signal according to the periodic event signal; the AD converter is respectively connected with the timing comparator and the rotary transformer and is used for carrying out sine and cosine electric signal sampling on the rotary transformer according to the sampling trigger signal to obtain a sampling signal; and the microcontroller is respectively connected with the interrupt controller and the AD converter, and is used for carrying out peak value sampling according to the excitation signal and the sampling signal when receiving the interrupt trigger signal so as to extract and obtain an envelope signal. According to the method and the device, the effect of improving the accuracy of envelope signal extraction and the accuracy of subsequent rotor angle calculation is achieved.

Description

Technical Field

[0001] This application relates to the technical field of signal processing, and particularly relates to a signal processing circuit and system. Background Art

[0002] In new energy vehicles, a single-chip microcomputer is generally used to calculate the rotor angle. Among them, it is necessary to first extract the Sin and Cos envelope signals from the collected Sin and Cos electrical signals. Currently, when using the peak sampling method to extract the envelope signal, it is easily affected by the phase deviation between the carrier wave and the Sin and Cos electrical signals, and the sampling points will deviate from the peaks, resulting in a decrease in the accuracy of envelope signal extraction, and thus a decrease in the calculation accuracy of the rotor angle. Summary of the Utility Model

[0003] The main purpose of this application is to provide a signal processing circuit and system, aiming to solve the technical problem that the phase deviation between the carrier wave and the Sin and Cos electrical signals in the related art leads to a decrease in the accuracy of envelope signal extraction.

[0004] To achieve the above purpose, this application proposes a signal processing circuit connected to a resolver. The signal processing circuit includes:

[0005] A timing comparator, configured to perform count reset and signal comparison according to the detected edge event, and output a periodic event signal and a sampling trigger signal; wherein, the edge event is obtained by detecting the zero crossing of the excitation signal;

[0006] An interrupt controller, connected to the timing comparator, configured to output an interrupt trigger signal according to the periodic event signal;

[0007] An AD converter, respectively connected to the timing comparator and the resolver, configured to sample the sine and cosine electrical signals of the resolver according to the sampling trigger signal to obtain a sampling signal;

[0008] A microcontroller, respectively connected to the interrupt controller and the AD converter, configured to perform peak sampling according to the excitation signal and the sampling signal when receiving the interrupt trigger signal to extract the envelope signal.

[0009] In an embodiment, the timing comparator includes:

[0010] A counter, connected to the interrupt controller, configured to perform count reset according to the detected edge event, and generate and output a periodic event signal;

[0011] A comparator, respectively connected to the counter, the microcontroller, and the AD converter, configured to compare the periodic event signal with the comparison signal provided by the microcontroller, and generate and output a sampling trigger signal.

[0012] In one embodiment, the signal processing circuit further includes:

[0013] A signal generator, which is connected to the resolver through a signal filtering circuit and a signal amplification circuit in sequence, is used to generate an excitation signal, and outputs the excitation signal to the excitation winding of the resolver through the signal filtering circuit and the signal amplification circuit in sequence, so that the sine winding and the cosine winding of the resolver respectively convert the rotor position of the motor into a sine electrical signal and a cosine electrical signal according to the excitation signal.

[0014] In one embodiment, the signal processing circuit further includes:

[0015] An edge capturer, which is connected to the zero-crossing detection circuit, is used to detect the rising edge or the falling edge of the zero-crossing square wave signal output by the zero-crossing detection circuit, and output an edge event signal; wherein, the zero-crossing square wave signal is obtained by the zero-crossing detection circuit detecting the zero-crossing point of the excitation signal;

[0016] A timing comparator, which is connected to the edge capturer, is used to perform count reset and signal comparison according to the edge event signal.

[0017] In one embodiment, the signal processing circuit further includes:

[0018] A timestamp capturer, which is connected to the timing comparator, is used to collect the sampling time of the AD converter according to the sampling trigger signal, and output a timestamp signal;

[0019] A microcontroller, which is also connected to the timestamp capturer, is used to perform peak sampling according to the excitation signal and the sampling signal when receiving the interrupt trigger signal and the timestamp signal.

[0020] In one embodiment, the AD converter includes:

[0021] A first channel, the control end of the first channel is connected to the timing comparator, the input end of the first channel is connected to the sine winding of the resolver through a first conditioning circuit, and the first channel is used to sample and convert the sine modulation signal output by the first conditioning circuit according to the sampling trigger signal to obtain a first sampling signal;

[0022] A second channel, the control end of the second channel is connected to the timing comparator, the input end of the second channel is connected to the cosine winding of the resolver through a second conditioning circuit, and the second channel is used to sample and convert the cosine modulation signal output by the second conditioning circuit according to the sampling trigger signal to obtain a second sampling signal;

[0023] A microcontroller, which is respectively connected to the output end of the first channel and the output end of the second channel, is also used to perform peak sampling according to the polarity of the excitation signal and the first sampling signal / second sampling signal.

[0024] In addition, to achieve the above object, the present application also proposes a signal processing system, including:

[0025] A signal processing circuit as described above;

[0026] A resolver, which is connected to the signal processing circuit through a signal amplification circuit and a signal filtering circuit in sequence, and is used to convert the rotor position of the motor into sine and cosine electrical signals according to the received excitation signal, so that the signal processing circuit samples;

[0027] A zero-crossing detection circuit, which is connected to the signal amplification circuit, is used to detect the zero-crossing point of the excitation signal, and output a zero-crossing square wave signal to the signal processing circuit, so that the signal processing circuit detects edge events.

[0028] In an embodiment, the signal processing system further includes:

[0029] A first conditioning circuit, which is respectively connected to the resolver and the signal processing circuit, and is used to perform modulation processing on the sine electrical signal generated by the resolver, and output a sine modulation signal to the signal processing circuit;

[0030] A second conditioning circuit, which is respectively connected to the resolver and the signal processing circuit, and is used to perform modulation processing on the cosine electrical signal generated by the resolver, and output a cosine modulation signal to the signal processing circuit.

[0031] One or more technical solutions proposed by the present application have at least the following technical effects:

[0032] A signal processing circuit is proposed. The timing comparator performs count reset and signal comparison according to the detected edge event, outputs a periodic event signal and a sampling trigger signal. The interrupt controller outputs an interrupt trigger signal according to the periodic event signal, and the AD converter samples the sine and cosine electrical signals of the resolver according to the sampling trigger signal to obtain a sampling signal. The microcontroller also performs peak sampling according to the excitation signal and the sampling signal when receiving the interrupt trigger signal to extract an envelope signal, solving the problem of phase deviation between the excitation signal and the sine and cosine electrical signals; by detecting the zero-crossing point of the excitation signal to obtain an edge event, and triggering an interrupt and AD sampling with the edge event, it can be realized that the interrupt trigger within one period corresponds to the detected edge event, and the sampling time of the AD converter is delayed after the interrupt trigger and corresponds to the peak value of the excitation signal, so that when the microcontroller receives the interrupt trigger signal and the sampling signal, the envelope signal extraction using the peak sampling method is no longer affected by the phase deviation, which can improve the accuracy of extracting the envelope signal and can also improve the accuracy of subsequent rotor angle calculation. Description of the Drawings

[0033] The accompanying drawings here are incorporated into the specification and form a part of this specification, showing embodiments consistent with this application, and are used together with the specification to explain the principles of this application.

[0034] To more clearly illustrate the technical solutions in the embodiments of this application or in related technologies, the following will briefly introduce the accompanying drawings required for use in the description of the embodiments or related technologies. Obviously, the accompanying drawings in the following description are only some embodiments of this application. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can also be obtained based on the structures shown in these drawings.

[0035] Figure 1 Schematic structural diagram of an embodiment of the signal processing circuit provided by this application;

[0036] Figure 2 For Figure 1 Schematic structural diagram of the timing comparator in

[0037] Figure 3 Schematic structural diagram of the signal processing system related to the embodiments of this application;

[0038] Figure 4 Schematic diagram of the waveform relationship of each signal in the embodiments of this application;

[0039] Figure 5 Schematic flowchart of the envelope signal extraction method related to the embodiments of this application;

[0040] Figure 6 Schematic flowchart of the working process of the microcontroller provided by the embodiments of this application;

[0041] Figure 7 For Figure 6 Schematic flowchart corresponding to the software process in stage 1 in

[0042] Figure 8 For Figure 7 Schematic flowchart corresponding to the execution of the optimization process in

[0043] Figure 9 Schematic diagram of the queue buffer in the microcontroller provided by the embodiments of this application;

[0044] Figure 10 Schematic diagram of the waveform relationship of each signal in an application example provided by this application.

[0045] The realization of the objectives, functional features, and advantages of this application will be further described with reference to the embodiments and the accompanying drawings. Detailed implementation manners

[0046] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts shall fall within the protection scope of the present application.

[0047] It should be noted that if there are directional indications (such as up, down, left, right, front, back...) involved in the embodiments of the present application, the directional indications are only used to explain the relative positional relationship and movement conditions between components in a specific posture. If the specific posture changes, the directional indications will also change accordingly. In addition, if there are descriptions such as "first" and "second" in the embodiments of the present application, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In addition, if "and / or" or "and / or" appears throughout the text, its meaning includes three parallel scenarios. Taking "A and / or B" as an example, it includes Scenario A, or Scenario B, or the scenario where A and B are satisfied simultaneously. In addition, the technical solutions between various embodiments can be combined with each other, but it must be based on the ability of those of ordinary skill in the art to implement. When the combination of technical solutions results in contradictions or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the protection scope required by the present application.

[0048] In new energy vehicles, the motor controller usually adopts FOC (Field-Oriented Control: magnetic field orientation control, also known as vector frequency conversion) to achieve torque control. Among them, the calculation of the rotor angle will directly affect the accuracy of torque control. The rotor angle is usually obtained by collecting the Sin electrical signal and Cos electrical signal of the motor by a resolver and then calculating through a single-chip microcomputer or a dedicated chip. Due to the high price of the dedicated chip, currently, a single-chip microcomputer is generally used to calculate the rotor angle. When calculating the rotor angle with a single-chip microcomputer, first, the Sin and Cos envelope signals are extracted from the collected Sin and Cos electrical signals, and then the Sin and Cos envelope signals are arctangent to obtain the rotor angle.

[0049] There are mainly two current methods for extracting envelope signals: the integration method and the peak sampling method. Among them, the integration method requires high-frequency sampling and a large number of sampling points, resulting in a large amount of computation and an increase in the CPU (Central Processing Unit) load rate. Although the peak sampling method only needs to sample peak points and has a small amount of computation, it is easily affected by the phase deviation between the carrier and the Sin and Cos electrical signals, and the sampling points will deviate from the peaks, resulting in a decrease in the accuracy of envelope signal extraction and thus a decrease in the calculation accuracy of the rotor angle.

[0050] In view of the above problems, the present application provides a signal processing circuit and system. The present application and the following embodiments will be described in detail below with reference to the accompanying drawings.

[0051] The present application proposes a signal processing circuit.

[0052] In an embodiment of the present application, referring to Figure 1 , Figure 1 is a schematic structural diagram of an embodiment of the signal processing circuit. The signal processing circuit 106 includes a timing comparator 203, an interrupt controller 204, an AD converter 202, and a microcontroller;

[0053] The timing comparator 203 is used to perform count reset and signal comparison according to the detected edge event, and output a periodic event signal and a sampling trigger signal; among them, the edge event is obtained by detecting the zero crossing of the excitation signal;

[0054] The interrupt controller 204 is connected to the timing comparator 203, and the interrupt controller 204 is used to output an interrupt trigger signal according to the periodic event signal;

[0055] The AD converter 202 is respectively connected to the timing comparator 203 and the resolver, and the AD converter 202 is used to sample the sine and cosine electrical signals of the resolver according to the sampling trigger signal to obtain a sampling signal;

[0056] The microcontroller is respectively connected to the interrupt controller 204 and the AD converter 202, and the microcontroller is used to perform peak sampling according to the excitation signal and the sampling signal when receiving the interrupt trigger signal to extract an envelope signal.

[0057] It should be noted that the signal processing circuit 106 can be implemented by a programmable controller device such as a single-chip microcomputer or an MCU (Microcontroller Unit) and its peripheral devices. The above timing comparator 203, interrupt controller 204, AD converter 202, and microcontroller ( Figure 1Devices such as those not shown in the figure can be used as hardware modules inside the programmable control device. For the software part of the programmable control device, it can be implemented by a microcontroller. For example, it can execute the envelope signal extraction method already existing in the related technology (such as the peak sampling method) or the envelope signal extraction method proposed later. In some examples, after the microcontroller performs peak sampling based on the excitation signal and the sampling signal to achieve envelope signal extraction based on the peak sampling method, it can continue to perform the arctangent operation based on the extracted envelope signal to obtain the rotor angle of the motor.

[0058] It should also be noted that the excitation signal is also called the carrier signal, which is generated by the signal processing circuit 106 and output to the resolver. The resolver is connected to the signal processing circuit 106 and also to the motor rotor. It can convert the rotor position signal of the motor into sine (Sin) and cosine (Cos) electrical signals according to the received excitation signal. The signal processing circuit 106 can perform self-detection of the zero crossing point for the output excitation signal to detect edge events, and the edge events include rising edges or falling edges. The timing comparator 203 uses the edge events to perform count reset to generate a periodic event signal, and then the periodic event signal can be compared with a preset reference signal or a comparison signal provided by the microcontroller to generate a sampling trigger signal. The interrupt controller 204 is connected to the timing comparator 203 and can periodically generate an interrupt trigger signal corresponding to the periodic event signal and output it to the microcontroller, enabling the microcontroller to interrupt the execution of envelope signal extraction. That is, the signal processing circuit 106 can execute an interrupt service program to perform accurate data processing, such as envelope signal extraction and rotor angle calculation.

[0059] In addition, it should be noted that after the AD converter 202 samples the Sin or Cos electrical signal, corresponding sampling signals can be obtained. The microcontroller can perform peak sampling on the sampling signal corresponding to the Sin electrical signal when the output excitation signal is a sine (Sin) signal, or perform peak sampling on the sampling signal corresponding to the Cos electrical signal when the output excitation signal is a cosine (Cos) signal, thereby realizing the extraction of the envelope signal. After receiving the interrupt trigger signal and the sampling signal, the microcontroller can interrupt to extract the envelope signal based on the sampling result.

[0060] This embodiment provides a signal processing circuit. The timing comparator performs count reset and signal comparison based on the detected edge event, outputs a periodic event signal and a sampling trigger signal. The interrupt controller outputs an interrupt trigger signal according to the periodic event signal, and the AD converter samples the sine and cosine electrical signals of the resolver according to the sampling trigger signal to obtain a sampling signal. The microcontroller also performs peak sampling according to the excitation signal and the sampling signal when receiving the interrupt trigger signal to extract the envelope signal, solving the problem of phase deviation between the excitation signal and the sine and cosine electrical signals. By detecting the zero crossing of the excitation signal to obtain an edge event, and using the edge event to trigger the interrupt and AD sampling, the interrupt trigger within one period can correspond to the detected edge event, and the sampling time of the AD converter can be delayed after the interrupt trigger and correspond to the peak value of the excitation signal. When the microcontroller receives the interrupt trigger signal and the sampling signal, the peak sampling method is used to extract the envelope signal without being affected by the phase deviation, which can improve the accuracy of extracting the envelope signal and the accuracy of subsequent rotor angle calculation.

[0061] In a feasible implementation, as Figure 1 shown, the AD converter 202 may include a first channel 2021 and a second channel 2022;

[0062] The control end of the first channel 2021 is connected to the timing comparator 203, the input end of the first channel 2021 is connected to the sine winding of the resolver, and the first channel 2021 is used to sample the sine signal according to the sampling trigger signal to obtain a first sampling signal;

[0063] The control end of the second channel 2022 is connected to the timing comparator 203, the input end of the second channel 2022 is connected to the cosine winding of the resolver, and the second channel 2022 is used to sample the cosine signal according to the sampling trigger signal to obtain a second sampling signal;

[0064] The microcontroller is respectively connected to the output ends of the first channel 2021 and the second channel 2022, and is also used to perform peak sampling according to the polarity of the excitation signal and the first sampling signal / second sampling signal.

[0065] It should be noted that the AD converter 202 has two channels, which are respectively used to sample the Sin and Cos electrical signals of the resolver. The operation of the first channel 2021 and the second channel 2022 is controlled by the sampling trigger signal output by the timing comparator 203. The polarity of the excitation signal refers to whether the current period of the excitation signal is the positive half-cycle or the negative half-cycle, and the polarity flags can be set correspondingly. For example, 1 represents the positive half-cycle and -1 represents the negative half-cycle. During peak sampling, the product of the AD value of the corresponding first sampling signal / second sampling signal and the polarity flag can be used as the calculated peak value, so as to use the obtained peak value as the envelope signal of the Sin electrical signal or the Cos electrical signal.

[0066] In this embodiment, when the microcontroller receives the interrupt trigger signal, peak sampling is performed according to the polarity of the excitation signal and the first sampling signal / second sampling signal to extract the envelope signal. On the basis of overcoming the adverse effects brought by the phase deviation between the excitation signal and the Sin and Cos signals, the peak sampling method is used to extract the envelope signal, which also has the advantages of fewer sampling points and lower CPU load rate.

[0067] In a feasible implementation manner, refer to Figure 2 , Figure 2 For Figure 1 is the structural schematic diagram of the timing comparator 203 in

[0068] The counter 2031 is connected to the interrupt controller 204. The counter 2031 is used to perform count reset according to the detected edge event, and generate and output a periodic event signal;

[0069] The comparator 2032 is respectively connected to the counter 2031, the microcontroller and the AD converter 202. The comparator 2032 is used to compare the periodic event signal with the comparison signal provided by the microcontroller, and generate and output a sampling trigger signal.

[0070] It should be noted that the counter 2031 can perform count reset according to the rising edge or falling edge event to generate a periodic event signal. The interrupt controller 204 is connected to the counter 2031 and can generate and output an interrupt trigger signal periodically according to the periodic event signal; the comparator 2032 cooperates with the counter 2031 to compare the periodic event signal output by the counter 2031 with the corresponding comparison values (such as Figure 2 CM0 / CM1 in

[0071] It should also be noted that before the comparator 2032 performs the comparison, the microcontroller can execute an optimization process based on a periodic interrupt to determine an appropriate comparison value, so as to provide a corresponding comparison signal to the comparator 2032. When the comparator 2032 outputs a sampling trigger signal to the AD converter 202, the sampling time for the AD converter 202 to perform sampling correspondingly can correspond to the peak value of the excitation signal. It should be noted that this optimization process can be implemented by using the gradient descent method or the Newton downhill method in related technologies, or can also be implemented by the optimization method provided later.

[0072] In another embodiment of the present application, the signal processing circuit 106 can be applied to a signal processing system. Referring to Figure 3 , Figure 3 is a schematic structural diagram of an embodiment of a signal processing system. The signal processing system can include the signal processing circuit 106, the signal filtering circuit 103, the signal amplification circuit 104, the resolver 100, and the zero-crossing detection circuit 105 as described above.

[0073] In an implementation manner of this embodiment, as Figure 1 and Figure 3 shown, the signal processing circuit 106 may further include a signal generator 200;

[0074] The signal generator 200 is sequentially connected to the resolver 100 through the signal filtering circuit 103 and the signal amplification circuit 104, and is used to generate an excitation signal, and output the excitation signal to the excitation winding of the resolver 100 through the signal filtering circuit 103 and the signal amplification circuit 104 in sequence, so that the sine winding and the cosine winding of the resolver 100 respectively convert the rotor position of the motor into a sine electrical signal and a cosine electrical signal according to the excitation signal.

[0075] It should be noted that the signal generator 200 can generate an excitation signal with a specific frequency. After being processed by the signal filtering circuit 103 and the signal amplification circuit 104 in sequence, the signal can generate a sine wave or a triangular wave and be sent to the excitation winding of the resolver 100.

[0076] It should also be noted that in the signal processing system, the signal filtering circuit 103 is connected to the signal processing circuit 106, specifically connected to the signal generator 200 here. The signal filtering circuit 103 can filter out the high-frequency components in the excitation signal output by the signal processing circuit 106 and send the excitation signal of the low-frequency component to the signal amplification circuit 104; the signal amplification circuit 104 is respectively connected to the signal filtering circuit 103 and the resolver 100. The signal amplification circuit 104 can amplify the power of the excitation signal output by the signal filtering circuit 103 and output the amplified excitation signal to the resolver 100, specifically sent to the excitation winding of the resolver 100; the resolver 100 is connected to the motor rotor. The resolver 100 can convert the rotor position of the motor into Sin and Cos electrical signals according to the received excitation signal for the signal processing circuit 106 to sample. Specifically, when the motor rotates, the sine (Sin) winding and cosine (Cos) winding of the resolver 100 can induce the modulated Sin and Cos electrical signals according to the excitation signal frequency and rotor angle, so that the signal processing circuit 106 can extract the envelope signal from the Sin and Cos electrical signals.

[0077] It can be understood that there is a phase deviation between the excitation signal output by the signal generator and the Sin and Cos electrical signals generated by the resolver. When extracting the envelope signal of the Sin and Cos electrical signals in the related art, the sampling points for sampling the Sin and Cos electrical signals will deviate from the peak value of the excitation signal, resulting in poor accuracy of the envelope signal extraction, which will affect the subsequent calculation accuracy of the rotor angle. However, in the signal processing circuit of this embodiment, the influence of this phase deviation can be overcome, so that the microcontroller can accurately extract the envelope signal.

[0078] In an implementation manner of this embodiment, as Figures 1-3 shown, the signal processing circuit 106 may further include an edge capturer 201;

[0079] The edge capturer 201 is connected to the zero-crossing detection circuit 105 and is used to detect the rising edge or falling edge of the zero-crossing square wave signal output by the zero-crossing detection circuit 105 and output an edge event signal; wherein, the zero-crossing square wave signal is obtained by the zero-crossing detection circuit 105 detecting the zero-crossing point of the excitation signal;

[0080] The timing comparator 203 is connected to the edge capturer 201 and is used to perform count reset and signal comparison according to the edge event signal.

[0081] It should be noted that the edge capturer 201 can capture the rising edge or falling edge of the zero-crossing square wave signal, that is, the edge event, and generate a signal corresponding to the rising edge or falling edge event, that is, the edge event signal, and send the edge event signal to the timing comparator 203.

[0082] It should also be noted that in the signal processing system, the zero-crossing detection circuit 105 is connected to the signal amplification circuit 104. The zero-crossing detection circuit 105 can perform zero-crossing detection on the amplified excitation signal output by the signal amplification circuit 104. When the excitation signal is greater than 0, the zero-crossing detection circuit 105 outputs a high level. When the excitation signal is less than 0, the zero-crossing detection circuit 105 outputs a low level, so as to output a zero-crossing square wave signal to the signal processing circuit 106, enabling the signal processing circuit 106 to detect edge events. Specifically, the zero-crossing square wave signal is output to the edge capture device 201 to detect the rising edge or falling edge correspondingly, so as to output an edge event signal.

[0083] In an implementation manner of this embodiment, as Figure 1 shown, the signal processing circuit 106 may further include a timestamp capture device 205;

[0084] The timestamp capture device 205 is connected to the timing comparator 203 and is used to collect the sampling time of the AD converter 202 according to the sampling trigger signal and output a timestamp signal;

[0085] The microcontroller is also connected to the timestamp capture device 205 and is used to perform peak sampling according to the excitation signal and the sampling signal when receiving the interrupt trigger signal and the timestamp signal.

[0086] It should be noted that the timestamp capture device 205 may be specifically connected to the output terminal of the comparator 2032 in the timing comparator 203, receive the sampling trigger signal to trigger the capture action, record the sampling time when the AD converter 202 performs sampling, and then output the timestamp signal to the microcontroller correspondingly. In some embodiments, this timestamp signal can be used for rotor angle compensation. Therefore, this timestamp signal can not only be used as a parameter for the microcontroller to perform related processes such as the optimization process, but also as a parameter for other processes such as the rotor angle calculation process after the envelope signal is extracted.

[0087] In a specific implementation manner, the signal processing system may further include a first conditioning circuit 101 and a second conditioning circuit 102. As Figure 1 and Figure 3 shown, the AD converter 202 may include a first channel 2021 and a second channel 2022;

[0088] The control end of the first channel 2021 is connected to the timing comparator 203. The input end of the first channel 2021 is connected to the sine winding of the resolver 100 through the first conditioning circuit 101. The first channel 2021 is used to sample and convert the sine modulation signal output by the first conditioning circuit 101 according to the sampling trigger signal to obtain a first sampling signal;

[0089] The control terminal of the second channel 2022 is connected to the timing comparator 203. The input terminal of the second channel 2022 is connected to the cosine winding of the resolver 100 through the second conditioning circuit 102. The second channel 2022 is used to sample and convert the cosine modulation signal output by the second conditioning circuit 102 according to the sampling trigger signal to obtain a second sampling signal;

[0090] The microcontroller is respectively connected to the output terminals of the first channel 2021 and the second channel 2022, and is further used to perform peak sampling according to the polarity of the excitation signal and the first sampling signal / second sampling signal.

[0091] It should be noted that the input terminal of the first conditioning circuit 101 is connected to the resolver 100, specifically to its sine winding, and the output terminal is connected to the signal processing circuit 106, specifically to the first channel 2021 of the AD converter 202 therein; the first conditioning circuit 101 processes the Sin electrical signal converted by the resolver 100 and sends it to the signal processing circuit 106. Specifically, it can filter and proportionally amplify the Sin electrical signal to facilitate sampling by the AD converter 202; the input terminal of the second conditioning circuit 102 is connected to the resolver 100, specifically to its cosine winding, and the output terminal is connected to the signal processing circuit 106, specifically to the second channel 2022 of the AD converter 202 therein; the second conditioning circuit 102 processes the Cos electrical signal converted by the resolver 100 and sends it to the signal processing circuit 106. Specifically, it can filter and proportionally amplify the Cos electrical signal to facilitate sampling by the AD converter 202; thereafter, the signal processing circuit 106 can complete subsequent operations, including extracting the envelope signal and then calculating the rotor angle.

[0092] It should also be noted that the control terminals of the first channel 2021 and the second channel 2022 are specifically connected to the output terminal of the comparator 2032 in the timing comparator 203 to receive the sampling trigger signal to trigger the sampling operation. The first channel 2021 samples the Sin modulation signal from the first conditioning circuit 101, performs analog-to-digital conversion to obtain a digital first sampling signal for subsequent processing by the microcontroller; the second channel 2022 samples the Cos modulation signal from the second conditioning circuit 102, performs analog-to-digital conversion to obtain a digital second sampling signal for subsequent processing by the microcontroller.

[0093] Exemplarily, to help understand the working principle of the signal processing circuit 106 proposed in the embodiments of the present application and the technical effects it has, the following refers to Figure 4 , Figure 4 which is a schematic diagram of the waveform relationship of each signal for a detailed description.

[0094] In this Figure 4In it, the horizontal axis represents time, and the vertical axis represents the waveform schematic of each signal. It should be noted that Figure 4 In it, the Sin modulation signal is the output of the first conditioning circuit 101, the Cos modulation signal is the output of the second conditioning circuit 102, the zero-crossing square wave signal is the output of the zero-crossing detection circuit 105, the edge event signal is the output of the edge capture unit 201, the periodic event signal is the output of the counter 2031 in the timing comparator 203, and the sampling trigger signal is the output of the comparator 2032 in the timing comparator 203.

[0095] Among them, the positive and negative half-cycles of the Sin modulation signal / Cos modulation signal correspond to the positive and negative half-cycles of the excitation signal output by the signal generator 200, and the zero-crossing square wave signal corresponds to the excitation signal. When the excitation signal output by the signal amplification circuit 104 is greater than 0, the zero-crossing square wave signal is at a high level; when the excitation signal output by the signal amplification circuit 104 is less than 0, the zero-crossing square wave signal is at a low level. Therefore, the zero-crossing square wave signal corresponds to the positive and negative half-cycles of the Sin modulation signal / Cos modulation signal, as Figure 4 shown. However, due to the influence of many factors such as the connection harness of the resolver 100 and external circuit filtering, there is a phase deviation Φ between the zero-crossing square wave signal and the Sin modulation signal / Cos modulation signal.

[0096] As Figure 4 shown, the rising edge of the zero-crossing square wave signal can be captured by the edge capture unit 201 to generate a rising edge event. Similarly, a falling edge event can also be generated, and then the corresponding edge event signal is output to the timing counter 2031. Based on the rising edge or falling edge event corresponding to the edge event signal, the counter 2031 in the timing comparator 203 can be reset to start counting from zero, realizing a periodic interruption, and corresponding periodic event signals are generated. In this timing comparator 203, after the periodic event signal output by the counter 2031 is compared with the comparison values CM0 / CM1 in the comparator 2032, a pulse signal, that is, a sampling trigger signal, is generated. For this sampling trigger signal, on the one hand, it can trigger the first channel 2021 / second channel 2022 in the AD converter 202 to perform AD sampling and conversion, and on the other hand, it can trigger the timestamp capture unit 205 to collect the sampling time of the AD converter 202. For the aforementioned periodic event signal, the interrupt controller 204 can correspondingly generate an interrupt trigger signal periodically and output it to the microcontroller. After that, when the microcontroller receives the interrupt trigger signal and the first sampling signal / second sampling signal output by the AD converter 202, it can perform peak sampling correspondingly to realize envelope signal extraction.

[0097] In the above signal processing system, the signal filtering circuit 103, the signal amplification circuit 104, the zero-crossing detection circuit 105, the first conditioning circuit 101, and the second conditioning circuit 102 form the peripheral circuit of the signal processing circuit 106. When the signal processing circuit 106 is implemented by a single-chip microcomputer, accurate envelope signal extraction can be achieved through the single-chip microcomputer and its peripheral circuit.

[0098] Based on this, in another embodiment of the present application, an envelope signal extraction method based on the above signal processing circuit 106 and signal processing system is proposed. Referring to Figure 5 , Figure 5 which is a schematic flowchart of the envelope signal extraction method. The envelope signal extraction method may include steps S10 to S40:

[0099] Step S10, the timing comparator 203 performs count reset and signal comparison according to the detected edge event, and outputs a periodic event signal and a sampling trigger signal; wherein, the edge event is obtained by detecting the zero-crossing point of the excitation signal;

[0100] Step S20, the interrupt controller 204 outputs an interrupt trigger signal according to the periodic event signal;

[0101] Step S30, the AD converter 202 samples the sine and cosine electrical signals of the resolver 100 according to the sampling trigger signal to obtain a sampling signal;

[0102] Step S40, when the microcontroller receives the interrupt trigger signal, peak sampling is performed according to the excitation signal and the sampling signal to extract the envelope signal.

[0103] In a feasible implementation manner, step S10 may include steps S11 to S12:

[0104] Step S11, the microcontroller obtains the target sampling signal corresponding to the target channel, performs iterative optimization using the gradient descent method or the Newton downhill method, obtains the time delay between the edge event of the current period and the peak point of the target sampling signal, generates a comparison signal according to the time delay and the working frequency of the timing comparator 203, and outputs it to the timing comparator 203; wherein, the target channel is the channel corresponding to the sine electrical signal or cosine electrical signal far from the zero value, and the optimization target of the iterative optimization is that the sampling time of the target sampling signal corresponds to the signal peak of the target channel;

[0105] Step S12: The timing comparator 203 performs count reset according to the edge event to generate a periodic event signal, compares the periodic event signal with the comparison signal to generate a sampling trigger signal, and outputs the periodic event signal and the sampling trigger signal respectively. In this way, the microcontroller can execute this optimization process to determine the optimal comparison value corresponding to the comparison signal in the comparator 2032, so as to ensure that the sampling time for triggering the AD converter 202 in the subsequent stage corresponds to the signal peak value of the target channel.

[0106] Optionally, before executing step S11, the microcontroller can also first determine the target channel, that is, the microcontroller can first determine the target channel, then execute the optimization process, and then output the comparison signal to the timing comparator 203, so that the timing comparator 203 can execute the above step S11.

[0107] In another feasible implementation manner, after receiving the interrupt trigger signal, the microcontroller can interrupt based on the sampling result and use the peak sampling method to extract the envelope signal. That is, step S40 may include step S41:

[0108] Step S41: The microcontroller determines the edge type of the current cycle edge event to obtain the polarity flag value of the excitation signal, and calculates the peak value according to the product of the sampling value of the target sampling signal and the polarity flag value to obtain the envelope signal corresponding to the target sampling signal.

[0109] Exemplarily, referring to Figure 6 , Figure 6 is a schematic diagram of the microcontroller working process. In order to implement envelope signal extraction, the microcontroller can specifically execute the following processes S1 to S3:

[0110] S1: Initialization operation.

[0111] After the microcontroller is started, it can perform operations such as clock parameter setting, signal generator 200 initialization, edge capturer 201 initialization, AD converter 202 initialization, timing comparator 203 initialization, interrupt controller 204 initialization, and other necessary initializations to implement the initialization operations of various peripherals and software modules in the signal processing circuit 106.

[0112] S2: Software process in stage 1.

[0113] Referring to Figure 7 , Figure 7 is a schematic diagram corresponding to the software process in stage 1. This process may specifically include: determining the target channel and executing the optimization process.

[0114] Among them, when the microcontroller determines the target channel, it can select the channel corresponding to the Sin or Cos electrical signal as the target channel, including the corresponding sampling channels in the conditioning circuit and the AD converter 202. Since when the angle of the motor rotor is such that the value of the Sin or Cos electrical signal is exactly 0 or close to 0, it will bring a large error to subsequent operations. Therefore, the law that the values of Sin and Cos cannot be 0 at the same time can be utilized, and the channel corresponding to the Sin electrical signal or Cos electrical signal far from 0 value is used as the target channel.

[0115] Exemplarily, as Figure 7 shown, it can specifically include:

[0116] Step S21, first select the Sin electrical signal as the initial target;

[0117] Step S22, at the interruption of the first cycle, obtain the time delay τ = 0;

[0118] Step S23, at the interruption of the second cycle, obtain the time delay τ = T s / 4, where T s is the excitation signal period;

[0119] Step S24, determine whether the sampled AD values in the previous two cycles are both close to 0. If so, execute Step S25; otherwise, execute Step S26;

[0120] Step S25, use the channel corresponding to the Cos electrical signal as the target channel;

[0121] Step S26, use the channel corresponding to the Sin electrical signal as the target channel;

[0122] Step S27, execute the optimization process.

[0123] Among them, when the microcontroller executes the optimization process, it can be executed on the target channel, iteratively optimizing the time delay τ between the rising edge (or falling edge) of the zero-crossing square wave signal and the peak point of the Sin or Cos modulation signal k . This iterative optimization can be executed during the process of the microcontroller executing the cycle interruption.

[0124] Specifically, iteratively calculate the time delay τ k between the rising edge (or falling edge) of the zero-crossing square wave signal and the AD sampling point corresponding to the sampling trigger signal of the AD converter 202, and finally find an optimal value τ pk such that the AD sampling point corresponds to the peak point of the Sin or Cos modulation signal of the target channel; then, based on this optimal value τ pkGenerate a comparison signal to set a comparison value for the comparator 2032 in the timing comparator 203. Thereafter, when a periodic event signal is generated by the counter 2031 in the timing comparator 203, the comparator 2032 can compare the count value corresponding to the periodic event signal with the aforementioned set comparison value to generate and output a sampling trigger signal when the comparison value is reached.

[0125] Exemplarily, referring to Figure 8 , Figure 8 which is a schematic diagram of the process corresponding to the execution of the optimization process, the execution of the optimization process in the microcontroller may specifically include the following steps:

[0126] Step A1, at the k-th cycle interruption, read the AD value (sampling value) F(τ k-1 ).

[0127] Obtain the target sampling signal (Sin or Cos modulation signal) corresponding to the target channel, and read the AD value f(τ k-1 ) of the target sampling signal. Among them, τ k-1 represents the time delay calculated by the microcontroller when executing the sampling result interruption in the previous cycle (the (k - 1)-th cycle). As Figure 4 shown, the time delay τ can determine the trigger sampling time corresponding to the sampling trigger signal output by the comparator 2032. Therefore, it can be considered that the sampling AD value corresponding to the Sin or Cos modulation signal based on the target sampling signal is a function of the time delay τ k-1 .

[0128] Step A2, calculate the derivative: f′(τ k*1 ).

[0129] The adopted calculation formula is:

[0130]

[0131] Among them, f′(τ k-1 ) is the derivative of the AD value calculated in the current cycle k, f(τ k-1 ), f(τ k-2 ) are the AD values of the Sin or Cos modulation signal read within the interruption of the current cycle k and the interruption of the previous cycle (k - 1) respectively, and τ k*1 , τ k-2 are the time delays calculated within the interruption of the previous cycle (k - 1) and the cycle before the previous cycle (k - 2) respectively.

[0132] Step A3, determine whether f′(τ k-1 ) is less than a preset threshold value ε. If so, execute step A8; otherwise, execute step A4.

[0133] The threshold value ε is a value close to 0 to indicate that at the time delay τ k the corresponding sampling point after is the peak point of the target sampling signal.

[0134] Step A4, calculate the time delay τ for k iterations k .

[0135] The calculation formula used is:

[0136] τ k = τ k-1 + α * f′(τ k-1 ),

[0137] where α is the step factor, which determines the change range of the time delay τ in the current period k k relative to the time delay τ in the previous period (k - 1). k-1 α depends on the specific application scenario and usually takes values of 1, 10, or 20.

[0138] It should be noted that the gradient descent method is used here to calculate the time delay τ in the current period k k .

[0139] Step A5, determine whether the time delay τ k is less than 0. If so, execute Step A6; otherwise, execute Step A7.

[0140] When τ k < 0, it means that the sampling point will be ahead of the rising edge (or falling edge) of the zero-crossing square wave signal corresponding to the excitation signal, but this is impossible. Therefore, if it is found that the obtained time delay τ k is less than 0, the time delay τ k needs to be corrected.

[0141] Step A6, correct the time delay τ by cycle folding k .

[0142] The calculation formula used is:

[0143] τ k = τ k + T s ,

[0144] Here, using the periodicity of the Sin and Cos modulation signals, this point is folded by one excitation signal period T s to obtain the corrected time delay τ k , which can ensure the normal progress of subsequent operations.

[0145] Step A7, set the comparison values CM0 and CM1.

[0146] Specifically, it can be based on the time delay τ calculated in the foregoing step A4 k or the time delay τ after correction in step A6 k , to set the comparison values CM0 and CM1 in the comparator 2032. Assume that the rising edge moment of the pulse signal output by the comparator 2032, i.e., the sampling trigger signal, is determined by CM1, and the falling edge moment of the sampling trigger signal is determined by CM0. Then the calculation formulas for CM0 and CM1 are:

[0147] CM1 = F clk *τ k ,

[0148] CM0 = F clk *(τ k + n*T clk ),

[0149] where F cll , T clk are respectively the working frequency and working period of the timing comparator 203, and n*T clk determines the pulse width of the sampling trigger signal.

[0150] It should be noted that steps A1 - A7 are only one cycle. After the waiting counter 2031 generates a periodic interruption according to the rising edge (or falling edge) event, it can return to step A1. In the new current cycle k, read the AD value f(τ l-1 ) of the target sampling signal (Sin or Cos modulation signal) again, calculate the derivative f′(τ k-1 ) of the AD value, and repeat the subsequent steps. Then, according to this cycle, until the derivative f′(τ k-1 ) of the AD value obtained at the time of the current periodic interruption is less than the preset threshold value ε, and then execute step A8.

[0151] Step A8, exit.

[0152] When f′(τ k-1 ) is less than the preset threshold value ε, it indicates that the sampling point corresponding to the time delay τ k is the peak point of the target sampling signal. At this time, the corresponding time delay τ k can be used as the optimal value τ pk , and thus the iterative optimization is completed.

[0153] In an alternative implementation, different from the above method of obtaining the optimal value τ pk using the gradient descent method, the Newton downhill method can also be used to perform iterative optimization of the time delay τ k to determine the optimal value τ pk . Specifically, the time delay τ calculated in step A4 in the above process kReplace the calculation formula with the following calculation formula, while keeping other operations unchanged. Here, the time delay τ k The calculation formula is:

[0154]

[0155] where λ is the step factor, and λ depends on the specific application scenario and usually takes values between 0 and 1.

[0156] In some embodiments, such as Figure 6 shown, after the microcontroller reaches the optimization target after process S2, it can also set the comparison value of the timing comparator 203 and enable the sampling result interrupt to execute process S3.

[0157] Specifically, after obtaining the optimal value τ pk the microcontroller can reset the comparison values CM0 and CM1 of the comparator 2032 according to this optimal value τ pk so that the signal processing circuit 106 can overcome the adverse effects brought by the phase deviation Φ between the zero-crossing square wave signal and the Sin and Cos modulation signals. Assuming that the rising edge time of the sampling trigger signal output by the comparator 2032 is determined by CM1 and the falling edge time is determined by CM0, the calculation formulas for CM0 and CM1 are:

[0158]

[0159] where % represents the modulo operation.

[0160] S3: Software process of stage 2.

[0161] This process may specifically include: performing rectification operations according to the edge type of the zero-crossing square wave signal; calculating the peak values of the Sin and Cos electrical signals.

[0162] Among them, after the microcontroller receives the interrupt trigger signal, it can perform envelope signal extraction using the peak sampling method based on the sampling result interrupt. First, determine the edge type of the current cycle edge event to obtain the polarity flag value of the excitation signal, and then calculate the peak value according to the product of the sampling value of the target sampling signal and the polarity flag value to obtain the envelope signal corresponding to the target sampling signal.

[0163] Exemplarily, after the AD converter 202 completes sampling and conversion according to the sampling trigger signal output by the timing comparator 203 and outputs the sampling signal, the microcontroller generates a sampling result interrupt according to the received interrupt trigger signal, and at this time, envelope signal extraction can be performed, which may specifically include the following steps:

[0164] First, obtain the edge type of the zero-crossing square wave signal corresponding to the excitation signal in the current period, and determine whether it is a rising edge or a falling edge, so as to obtain the polarity flag value CgSgn of the excitation signal. Among them, if it is a rising edge, it means that the excitation signal is in the positive half-cycle, and CgSgn = 1; if it is a falling edge, it means that the excitation signal is in the negative half-cycle, and CgSgn = -1.

[0165] Then, wait for the AD converter 202 to complete sampling and conversion. After obtaining the target sampling signal corresponding to the Sin modulation signal or the Cos modulation signal, read the AD value (sampling value) of the target sampling signal to obtain the AD value of Sin or Cos; at the same time, obtain the time stamp of the sampling moment through the time stamp capturer 205.

[0166] Next, calculate the peak value according to the product of the AD value and the polarity flag value CgSgn. The specific calculation formula is:

[0167] Peak value = AD value * CgSgn,

[0168] This peak value is the envelope of the Sin or Cos modulation signal.

[0169] According to this method, the peak values of the Sin and Cos electrical signals, that is, the Sin peak value and the Cos peak value, can be correspondingly obtained, realizing the extraction of the envelope signal of the Sin or Cos modulation signal.

[0170] In some embodiments, as Figure 6 shown, after the microcontroller obtains the Sin peak value and the Cos peak value and realizes the extraction of the envelope signal, it can write the Sin peak value, the Cos peak value and the time stamp into the queue buffer for subsequent calculation of the rotor angle of the motor.

[0171] It should be noted that when storing the Sin peak value, the Cos peak value and the time stamp into the queue buffer together, the Sin peak value, the Cos peak value and the time stamp stored in the queue buffer must be values at the same moment to ensure data consistency. By introducing a queue buffer in the microcontroller, the problem that the different rates of data writing and data reading will affect data consistency is solved.

[0172] Exemplarily, referring to Figure 9 , Figure 9 , as the schematic diagram of the queue buffer in the microcontroller, in this queue buffer, data is cached in an array structure and accessed according to the first-in-first-out (FIFO) rule. In the array structure, each data element is composed of the Sin peak value, the Cos peak value and the time stamp. ReadIdx and WriteIdx are array subscripts, which are used to represent the reading and writing of data elements respectively. Specifically:

[0173] The data writing process is as follows: using WriteIdx as the array subscript to perform the writing operation. Specifically, write the Sin peak value, Cos peak value, and timestamp to the cell at the position WriteIdx. Then, move WriteIdx to the position of the next element. Determine whether WriteIdx has reached the end of the queue. If WriteIdx has reached the end of the queue, WriteIdx needs to return to the head of the queue, which can be achieved by clearing WriteIdx to 0. Otherwise, continue to write the Sin peak value, Cos peak value, and timestamp.

[0174] The data reading process is as follows: using ReadIdx as the array subscript to perform the reading operation. Specifically, first determine whether ReadIdx is equal to WriteIdx. If they are equal, it means the queue is empty and there is no need to read, so directly exit. If they are not equal, it means the queue is not empty and there is data to be read. At this time, the Sin peak value, Cos peak value, and timestamp can be read from the position ReadIdx. Then, move ReadIdx to the position of the next element. Determine whether ReadIdx has reached the end of the queue. If ReadIdx has reached the end of the queue, ReadIdx needs to return to the head of the queue, which can be achieved by clearing ReadIdx to 0. Otherwise, continue to read the Sin peak value, Cos peak value, and timestamp.

[0175] To facilitate the understanding of the implementation process or working flow of the signal processing circuit and system proposed in the embodiments of this application, an application example is proposed. In this application example, the specific structures of the signal processing circuit and the signal processing system are as Figures 1-3 shown.

[0176] Among them, the signal processing circuit is implemented by a single-chip microcomputer. Specifically, the Infineon Aurix series TC3xx single-chip microcomputer is used to implement signal processing and envelope signal extraction. The microcontroller is the processor in this single-chip microcomputer. The signal generator 200 uses the excitation generator inside the EDSADC module in this single-chip microcomputer. The AD converter 202 uses the EVADC module in this single-chip microcomputer. The edge capturer 201 uses the GTM_TIM0_CH0 module in this single-chip microcomputer. The timestamp capturer 205 uses the GTM_TIM0_CH2 module in this single-chip microcomputer. The timing comparator 203 uses the GTM_TOM0 module in this single-chip microcomputer. Among them, the channel GTM_TOM0_CH0 works in the counter mode, and the channel GTM_TOM0_CH1 works in the comparator mode. Correspondingly, the waveform relationship diagram of each signal in this application example can be obtained Figure 10 as shown.

[0177] As Figure 10As shown, the zero-crossing square wave signal corresponds to the positive and negative half-cycles of the excitation signal, and there is a phase deviation Φ between the zero-crossing square wave signal and the Sin modulation signal / Cos modulation signal. GTM_TIM0_CH0 captures the rising edge of the zero-crossing square wave signal, generates a rising edge event, and this rising edge event resets the counter of channel GTM_TOM0_CH0, making it start counting from zero. The output of the counter is compared with the comparison values CM0 and CM1 of the comparator of channel GTM_TOM0_CH1, and a pulse signal is output, that is, a sampling trigger signal is obtained. Using this sampling trigger signal, the AD sampling and conversion of the first channel and the second channel in the EVADC module can be triggered, and at the same time, the GTM_TIM0_CH2 module is triggered to record the sampling time values of the first channel and the second channel in the EVADC module. The counter periodically generates a periodic event signal according to the input edge event signal, causing the interrupt controller to output an interrupt trigger signal.

[0178] In this single-chip microcomputer, initialization operations are first performed, including: clock parameter setting, initialization of the excitation generator inside EDSADC, initialization of the GTM_TIM0_CH0 module, initialization of the EVADC module, initialization of GTM_TOM0_CH0 and GTM_TOM0_CH1, initialization of the GTM_TIM0_CH2 module, initialization of the interrupt controller, and initialization of the OS (Operating System).

[0179] Then, the target channel is determined, and an optimization process is executed. Specifically, it can be combined with Figures 7-8 , and refer to the foregoing description, which will not be elaborated here. Here, the step factor α of the gradient descent method is specifically set to 20, and the step factor λ of the Newton downhill method is 0.5. Iterative optimization is performed to obtain the optimal value τ pk After that, the AD sampling points correspond to the peak values of the Sin or Cos signals of the target channel. Then, it is assumed that the rising edge of the output pulse of this timing comparator is determined by CM1, and CM0 determines the falling edge moment. Correspondingly, according to the optimal value τ pk The comparison values CM0 and CM1 of GTM_TOM0_CH1 are reset again.

[0180] Next, the EVADC module can complete sampling according to the sampling trigger signal of GTM_TOM0_CH1, generate a sampling result interrupt, and trigger the subsequent envelope signal extraction process, that is, the execution of the software process in the aforementioned stage 2. For specific details, please refer to the previous description and will not be elaborated here. Specifically, in the current cycle, the edge type of the zero-crossing square wave signal can be judged according to the value of the register ECNT in the single-chip microcomputer. After waiting for the AD conversion to complete, obtaining the AD values of Sin and Cos and the time stamp at the sampling moment, the Sin and Cos peak values are calculated based on the AD values of Sin and Cos, that is, the envelope of the Sin and Cos modulation signals is obtained. Finally, the Sin peak value, Cos peak value, and time stamp are stored in the queue buffer.

[0181] In this application example, the advantages of fewer sampling points and lower CPU load rate of the peak sampling method are fully utilized. At the same time, the adverse effects brought by the phase deviation between the generated excitation signal and the Sin and Cos electrical signals are overcome.

[0182] It should be noted that the above examples are only for understanding this application and do not constitute a limitation to the theme of this application. Based on this technical concept, more forms of simple transformations are within the protection scope of this application.

[0183] This application also proposes a signal processing system.

[0184] In an embodiment of the signal processing system of this application, refer to Figure 3 , Figure 3 For the structural schematic diagram of the signal processing system, the signal processing system includes a signal processing circuit 106, a resolver 100, and a zero-crossing detection circuit 105;

[0185] Among them, the resolver 100 is connected to the signal processing circuit 106 through a signal amplification circuit 104 and a signal filtering circuit 103 in sequence, and is used to convert the rotor position of the motor into sine and cosine electrical signals according to the received excitation signal, so that the signal processing circuit 106 can sample;

[0186] The zero-crossing detection circuit 105 is connected to the signal amplification circuit 104, and is used to perform zero-crossing detection on the excitation signal and output a zero-crossing square wave signal to the signal processing circuit 106, so that the signal processing circuit 106 can detect edge events.

[0187] In another embodiment of the signal processing system of this application, the signal processing system further includes a first conditioning circuit 101 and a second conditioning circuit 102;

[0188] The first conditioning circuit 101 is respectively connected to the resolver 100 and the signal processing circuit 106, and is used to perform modulation processing on the sine electrical signal generated by the resolver 100 and output a sine modulation signal to the signal processing circuit 106;

[0189] The second conditioning circuit 102 is respectively connected to the resolver 100 and the signal processing circuit 106, and is used for modulating the cosine electrical signal generated by the resolver 100 and outputting a cosine modulation signal to the signal processing circuit 106.

[0190] It should be noted that the specific structure of the signal processing circuit refers to the above-mentioned embodiments, and more implementation manners in this signal processing system can refer to the specific descriptions of the above-mentioned embodiments. Since this signal processing system adopts all the technical solutions of the above-mentioned embodiments, it has at least all the beneficial effects brought by the technical solutions of the above-mentioned embodiments, which will not be elaborated herein one by one.

[0191] This application also proposes an envelope signal extraction method.

[0192] In an embodiment of the envelope signal extraction method of this application, referring to Figure 5 , Figure 5 is a schematic flowchart of the envelope signal extraction method, and this envelope signal extraction method includes steps S10 to S40:

[0193] Step S10, the timing comparator performs count reset and signal comparison according to the detected edge event, and outputs a periodic event signal and a sampling trigger signal; wherein, the edge event is obtained by detecting the zero crossing of the excitation signal;

[0194] Step S20, the interrupt controller outputs an interrupt trigger signal according to the periodic event signal;

[0195] Step S30, the AD converter samples the sine and cosine electrical signals of the resolver according to the sampling trigger signal to obtain a sampling signal;

[0196] Step S40, when the microcontroller receives the interrupt trigger signal, it performs peak sampling according to the excitation signal and the sampling signal to extract the envelope signal.

[0197] In another embodiment of the envelope signal extraction method of this application, step S10 includes steps S11 to S12:

[0198] Step S11, the microcontroller obtains the target sampling signal corresponding to the target channel, uses the gradient descent method or the Newton downhill method to perform iterative optimization, obtains the time delay between the edge event of the current period and the peak point of the target sampling signal, generates a comparison signal according to the time delay and the working frequency of the timing comparator, and outputs it to the timing comparator; wherein, the target channel is the channel corresponding to the sine or cosine electrical signal far from the zero value, and the optimization target of the iterative optimization is that the sampling time of the target sampling signal corresponds to the signal peak of the target channel;

[0199] Step S12: According to the edge event, the timer comparator performs counting reset to generate a periodic event signal, compares the periodic event signal with the comparison signal to generate a sampling trigger signal, and outputs the periodic event signal and the sampling trigger signal respectively.

[0200] In another embodiment of the envelope signal extraction method of the present application, step S40 includes step S41:

[0201] Step S41: The microcontroller determines the edge type of the current cycle edge event to obtain the polarity flag value of the excitation signal, calculates the peak value according to the product of the sampling value of the target sampling signal and the polarity flag value, and obtains the envelope signal corresponding to the target sampling signal.

[0202] It should be noted that the specific structure of the signal processing circuit refers to the above embodiment, and more implementation manners in this envelope signal extraction method can refer to the specific description of the above embodiment. Since this envelope signal extraction method can be applied to any technical solution of the above signal processing circuit embodiment, it at least has all the beneficial effects brought by the technical solutions of the above embodiment, which will not be elaborated here one by one.

[0203] The above are only partial embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structural transformation made under the technical concept of the present application by using the content of the specification and drawings of the present application, or any direct / indirect application in other related technical fields is included in the patent protection scope of the present application.

Claims

1. A signal processing circuit, characterized in that, Connected to the resolver, the signal processing circuit includes: A timing comparator for performing count reset and signal comparison based on the detected edge event, and outputting a periodic event signal and a sampling trigger signal; wherein, the edge event is obtained by detecting the zero crossing point of the excitation signal; An interrupt controller connected to the timing comparator for outputting an interrupt trigger signal according to the periodic event signal; An AD converter respectively connected to the timing comparator and the resolver for sampling the sine and cosine electrical signals of the resolver according to the sampling trigger signal to obtain a sampling signal; A microcontroller respectively connected to the interrupt controller and the AD converter for performing peak sampling according to the excitation signal and the sampling signal when receiving the interrupt trigger signal to extract an envelope signal.

2. The signal processing circuit according to claim 1, wherein The timing comparator includes: A counter connected to the interrupt controller for performing count reset according to the detected edge event, generating and outputting the periodic event signal; A comparator respectively connected to the counter, the microcontroller and the AD converter for comparing the periodic event signal with the comparison signal provided by the microcontroller, generating and outputting the sampling trigger signal.

3. The signal processing circuit according to claim 1, characterized in that The signal processing circuit further includes: A signal generator connected to the resolver through a signal filtering circuit and a signal amplification circuit in sequence for generating the excitation signal, and outputting the excitation signal to the excitation winding of the resolver through the signal filtering circuit and the signal amplification circuit in sequence, so that the sine winding and the cosine winding of the resolver respectively convert the rotor position of the motor into a sine electrical signal and a cosine electrical signal according to the excitation signal.

4. The signal processing circuit according to claim 1, characterized in that The signal processing circuit further includes: An edge capturer connected to the zero-crossing detection circuit for detecting the rising edge or falling edge of the zero-crossing square wave signal output by the zero-crossing detection circuit, and outputting an edge event signal; wherein, the zero-crossing square wave signal is obtained by the zero-crossing detection circuit detecting the zero crossing point of the excitation signal; The timing comparator connected to the edge capturer for performing count reset and signal comparison according to the edge event signal.

5. The signal processing circuit according to claim 1, wherein The signal processing circuit further includes: A timestamp capturer connected to the timing comparator for collecting the sampling time of the AD converter according to the sampling trigger signal and outputting a timestamp signal; The microcontroller is further connected to the timestamp capturer for performing peak sampling according to the excitation signal and the sampling signal when receiving the interrupt trigger signal and the timestamp signal.

6. The signal processing circuit according to claim 1, wherein The AD converter includes: A first channel, the control end of the first channel is connected to the timing comparator, the input end of the first channel is connected to the sine winding of the resolver through a first conditioning circuit, and the first channel is used for sampling and converting the sine modulation signal output by the first conditioning circuit according to the sampling trigger signal to obtain a first sampling signal; A second channel, the control end of the second channel is connected to the timing comparator, the input end of the second channel is connected to the cosine winding of the resolver through a second conditioning circuit, and the second channel is used to sample and convert the cosine modulation signal output by the second conditioning circuit according to the sampling trigger signal to obtain a second sampling signal; The microcontroller is respectively connected to the output end of the first channel and the output end of the second channel, and is further configured to perform peak sampling according to the polarity of the excitation signal and the first sampling signal / the second sampling signal.

7. A signal processing system, characterized in that, Comprising: The signal processing circuit according to any one of claims 1 to 6; A resolver, which is sequentially connected to the signal processing circuit through a signal amplification circuit and a signal filtering circuit, and is configured to convert the rotor position of the motor into sine and cosine electrical signals according to the received excitation signal, so that the signal processing circuit samples; A zero-crossing detection circuit, connected to the signal amplification circuit, for performing zero-crossing detection on the excitation signal and outputting a zero-crossing square wave signal to the signal processing circuit, so that the signal processing circuit detects edge events.

8. The signal processing system according to claim 7, wherein Further comprising: A first conditioning circuit, respectively connected to the resolver and the signal processing circuit, for modulating the sine electrical signal generated by the resolver and outputting a sine modulation signal to the signal processing circuit; A second conditioning circuit, respectively connected to the resolver and the signal processing circuit, for modulating the cosine electrical signal generated by the resolver and outputting a cosine modulation signal to the signal processing circuit.

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