Current sampling DC working point lifting circuit and standard electric energy meter thereof

Abstract

The utility model relates to the technical field of standard electric energy meters, in particular to a current sampling direct current working point lifting circuit and a standard electric energy meter thereof, and the current sampling direct current working point lifting circuit comprises a first operational amplifier circuit which is used for providing reference voltage; the second operational amplifier circuit is respectively connected with the first operational amplifier circuit and the target mutual inductor and is used for performing voltage boosting on the current signal according to the reference voltage; the gain change-over switch is respectively connected with the input end and the output end of the second operational amplifier circuit and is used for carrying out gain optimization on the lifted current signal to obtain a current signal conforming to the sampling range of the target AD chip; the voltage follower circuit is connected with the gain change-over switch so as to increase the load of the current signal; and the fully differential operational amplifier circuit is respectively connected with the voltage follower circuit and the target AD chip so as to convert the enhanced current signal into a differential signal and provide the differential signal to the target AD chip. Therefore, the problems that noise introduced into an existing standard meter current sampling circuit is large, the accuracy of output signals is affected and the like are solved.

Description

Technical Field

[0001] The utility model relates to the technical field of standard energy meters, in particular to a current sampling DC operating point lifting circuit and a standard energy meter thereof. Background Art

[0002] As the source of electric energy measurement, standard energy meters are mainly used in high-precision detection devices and value traceability in the field of electric energy measurement such as electric energy measurement calibration and laboratory measurement reference. At present, several standard energy meters have been developed in China, but there are still a series of problems such as the long-term stability not meeting the standard requirements, the large temperature coefficient, and the serious influence of small current sampling by noise.

[0003] Compared with ordinary energy meters, standard meters have higher requirements for measurement accuracy, measurement range, long-term operation stability, anti-interference ability, etc. For example, in high-precision standard meters, the minimum current required for the standard meter to maintain measurement accuracy and stability is 1 mA. For such a small current sampling requirement, the reliability and stability of the current sampling circuit are required to be higher.

[0004] As Figure 1 shown, in the related current sampling circuit, generally a high-precision current transformer is used to convert the actual current into a corresponding measured current signal. The differential signals (I+, I-) output by the transformer are connected to the input end of a transimpedance amplifier U1 with high gain, low distortion, and high precision. The operational amplifier is powered by dual power supplies, and the input signal V+ of the operational amplifier is grounded. Since the input current range is too large, different sampling resistors R1 and R3 need to be matched according to the magnitude of the output current at the output end for gain switching. K1 and K2 are gain switching switches, and U2 is a voltage follower circuit, whose main function is to improve the driving ability of the circuit. The output signal of U2 is input to the AD chip after passing through a single-ended to differential circuit composed of operational amplifiers U3 and U4. The input end V+ of U4 is connected to the +2.5V power supply, so that the output signals (OUT_P, OUT_N) are lifted 2.5V with respect to the ground.

[0005] However, in this kind of current sampling circuit, as Figure 2 shown, after the signal is converted into a differential signal by two-stage operational amplifiers U3 and U4, the offset voltage will be amplified along with the signal. When the current is small, the offset voltage will account for a very large proportion of the output voltage, and there is an obvious deviation between the offset of the output waveform (channel 1) and the theoretical offset, which will affect the accuracy of the output signal. As Figure 3 shown, also because the signal is converted into a differential signal by two-stage operational amplifiers U3 and U4, each stage of the operational amplifier will introduce a certain amount of noise. Therefore, the overall noise at the output end of the circuit is large, which also affects the accuracy of the output signal. Summary of the Invention

[0006] The utility model provides a current sampling DC operating point boosting circuit and a standard watt-hour meter to solve the problems of large introduced noise and affecting the accuracy of output signals in the current sampling circuit of the existing standard meter.

[0007] In the first aspect of the utility model, a current sampling DC operating point boosting circuit is provided, including:

[0008] A first operational amplifier circuit for providing a reference voltage;

[0009] A second operational amplifier circuit, the input terminals of the second operational amplifier circuit are respectively connected to the output terminal of the first operational amplifier circuit and a target current transformer, so as to boost the voltage of the current signal input by the target current transformer according to the reference voltage to obtain a boosted current signal;

[0010] A gain switching switch, the gain switching switch is respectively connected to the input terminal and the output terminal of the second operational amplifier circuit, so as to optimize the gain of the boosted current signal by opening or closing to obtain a current signal that meets the sampling range of the target AD chip;

[0011] A voltage follower circuit, the input terminal of the voltage follower circuit is connected to the gain switching switch through a first switch and a second switch, so as to increase the load of the current signal that meets the sampling range of the target AD chip to obtain an enhanced current signal;

[0012] A fully differential operational amplifier circuit, the input terminal of the fully differential operational amplifier circuit is connected to the output terminal of the voltage follower circuit, and the output terminal of the fully differential operational amplifier circuit is connected to the target AD chip, so as to convert the enhanced current signal into a differential signal and provide it to the target AD chip.

[0013] Optionally, the first operational amplifier circuit, the second operational amplifier circuit, the voltage follower circuit and the fully differential operational amplifier circuit are all powered by a single power supply.

[0014] Optionally, the first operational amplifier circuit includes a first input resistor and a first operational amplifier. Wherein, one end of the first input resistor is connected to the target current transformer, the other end of the first input resistor is connected to the positive input terminal of the first operational amplifier, the negative input terminal of the first operational amplifier is connected to the output terminal of the first operational amplifier, and the output terminal of the first operational amplifier is connected to the positive input terminal of the second operational amplifier circuit.

[0015] Optionally, the gain switching switch is connected to the input terminal of the second operational amplifier circuit through a sampling resistor group.

[0016] Optionally, the gain switching switch includes a first gain switch and a second gain switch, and the sampling resistor group includes a first sampling resistor and a second sampling resistor. Among them, the first gain switch is connected to the first gain switch, the second gain switch is connected to the second gain switch, and both the first gain switch and the second gain switch are connected to the input end of the second operational amplifier circuit.

[0017] Optionally, the resistance values of the first sampling resistor and the second sampling resistor are different.

[0018] Optionally, the fully differential operational amplifier circuit includes a second input resistor, a third input resistor, a fourth input resistor, a second operational amplifier, a first load resistor, and a capacitor. Among them, one end of the second input resistor is grounded, the other end of the second input resistor is connected to the positive input end of the second operational amplifier, one end of the third input resistor is connected to the output end of the voltage follower circuit, the other end of the third input resistor is respectively connected to the negative input end of the second operational amplifier and one end of the fourth input resistor, the output end of the second operational amplifier is connected to one end of the first load resistor, one end of the first load resistor and the other end of the fourth input resistor are both connected to one end of the capacitor, and the other end of the capacitor is connected to one end of the third input resistor.

[0019] In a second aspect of the present invention, a standard electric energy meter is provided, and this standard electric energy meter adopts the above-mentioned current sampling DC operating point lifting circuit.

[0020] For the current sampling DC operating point lifting circuit and the standard electric energy meter proposed by the present invention, the operational amplifier circuit is powered by a single power supply, which reduces the design cost and there is no situation of mutual influence between dual power supplies, improving the stability and usability of the current sampling circuit of the standard meter; the signal is converted into a differential signal through a single operational amplifier circuit, introducing less noise, reducing the overall noise at the output end of the circuit, and reducing the influence of the single operational amplifier offset voltage on the output signal; the operational amplifier circuit is designed with a multi-gain method, and a suitable gain gear is selected according to the magnitude of the input current to achieve a wide dynamic range.

[0021] Additional aspects and advantages of the present invention will be given in part in the following description, will become apparent in part from the following description, or will be understood through the practice of the present invention. Description of the Drawings

[0022] The above-mentioned and / or additional aspects and advantages of the present invention will become apparent and easy to understand from the following description of the embodiments in conjunction with the drawings, where:

[0023] Figure 1 is a structural schematic diagram of an existing current sampling circuit;

[0024] Figure 2Schematic diagram of waveform changes of signal input and output signals of an existing current sampling circuit, where the input signals (I+, I-) are channel 3, and the output signals (OUT_P, OUT_N) are channel 1;

[0025] Figure 3 Schematic diagram of waveform changes of output signals when the small signal input (500 mA) of an existing current sampling circuit;

[0026] Figure 4 Schematic diagram of the structure of a current sampling DC operating point lifting circuit provided by the present invention;

[0027] Figure 5 Schematic diagram of waveform changes of signal input and output signals of the current sampling DC operating point lifting circuit provided by the present invention, where the input signals (I+, I-) are channel 3, and the output signals (OUT_P, OUT_N) are channel 1;

[0028] Figure 6 Schematic diagram of waveform changes of output signals when the small signal input (500 mA) of the current sampling DC operating point lifting circuit provided by the present invention.

[0029] Description of reference numerals:

[0030] U1 - First operational amplifier circuit, R5 - First input resistor, u1 - First operational amplifier, U2 - Second operational amplifier circuit, D1 and D2 - Parallel diode group, u2 - Third operational amplifier, K1 - First switch, K2 - Second switch, R1 - First sampling resistor, R3 - Second sampling resistor, U3 - Voltage follower circuit, K3-1 - First switch, K3-2 - Second switch, R2 - Fifth input resistor, R3 - Second load resistor, u3 - Fourth operational amplifier, U4 - Fully differential operational amplifier circuit, R6 - Second input resistor, R8 - Third input resistor, R9 - Fourth input resistor, u4 - Second operational amplifier, R7 - First load resistor, and C1 - Capacitor. Detailed implementation manners

[0031] The embodiments of the present invention are described in detail below. Examples of the embodiments are shown in the drawings, where the same or similar reference numerals indicate the same or similar elements or elements with the same or similar functions from beginning to end. The embodiments described below by referring to the drawings are exemplary and are intended to explain the present invention and should not be construed as limiting the present invention.

[0032] The current sampling DC operating point boosting circuit of the present invention and its standard watt-hour meter will be described below with reference to the accompanying drawings. In view of the problems mentioned in the above background technology that the existing standard meter current sampling circuit uses dual power supplies, has higher requirements for power supply stability, and has higher power supply design costs, larger areas, and after actual test verification, the noise and offset voltage have a greater impact on the output signal after two-stage cascaded operational amplifiers, the present invention provides a current sampling DC operating point boosting circuit, which uses a single power supply and a single operational amplifier circuit. Thus, the problems of large introduced noise and affecting the accuracy of the output signal in the existing standard meter current sampling circuit are solved.

[0033] Specifically, Figure 2 is a schematic structural diagram of the current sampling DC operating point boosting circuit provided by the present invention.

[0034] As Figure 2 shown, the current sampling DC operating point boosting circuit includes: a first operational amplifier circuit U1, a second operational amplifier circuit U2, gain switching switches K1 and K2, a voltage follower circuit U3, and a fully differential operational amplifier circuit U4.

[0035] Among them, the first operational amplifier circuit U1 is used to provide a reference voltage. The input terminals of the second operational amplifier circuit U2 are respectively connected to the output terminal of the first operational amplifier circuit U1 and the target current transformer, so as to boost the voltage of the current signal input by the target current transformer according to the reference voltage to obtain a boosted current signal. The gain switching switches K1 and K2 are respectively connected to the input terminal and the output terminal of the second operational amplifier circuit, so as to optimize the gain of the boosted current signal by turning on or off to obtain a current signal that meets the sampling range of the target AD chip. The input terminal of the voltage follower circuit U3 is connected to the gain switching switches K1 and K2 through a first switch and a second switch to increase the load of the current signal that meets the sampling range of the target AD chip to obtain an enhanced current signal. The input terminal of the fully differential operational amplifier circuit U4 is connected to the output terminal of the voltage follower circuit U3, and the output terminal of the fully differential operational amplifier circuit U4 is connected to the target AD chip to convert the enhanced current signal into a differential signal and provide it to the target AD chip.

[0036] In some embodiments, the first operational amplifier circuit U1, the second operational amplifier circuit U2, the voltage follower circuit U3, and the fully differential operational amplifier circuit U4 all use a single power supply.

[0037] Specifically, the positive power supply pins (+Vcc or Vcc+ or V+) of the first operational amplifier circuit U1, the second operational amplifier circuit U2, the voltage follower circuit U3, and the fully differential operational amplifier circuit U4 are all connected to the positive power supply 5V voltage, and the negative power supply pins (-Vcc or Vcc- or V-) are all grounded (GND), thereby reducing the power supply design cost and eliminating the mutual influence of dual power supplies, making the circuit more stable.

[0038] In some embodiments, the first operational amplifier circuit U1 includes a first input resistor R5 and a first operational amplifier u1. One end of the first input resistor R5 is connected to the target mutual inductor, the other end of the first input resistor R5 is connected to the positive input terminal of the first operational amplifier u1, the negative input terminal of the first operational amplifier u1 is connected to the output terminal of the first operational amplifier u1, and the output terminal of the first operational amplifier u1 is connected to the positive input terminal of the second operational amplifier circuit U2.

[0039] Specifically, one end of the first input resistor R5 is connected to the target mutual inductor to introduce a 2.5V reference voltage. The other end of the first input resistor R5 is connected to the positive input terminal of the first operational amplifier u1. The negative input terminal of the first operational amplifier u1 is connected to the output terminal of the first operational amplifier u1 to output 2.5V and provide 2.5V to the positive input terminal of the second operational amplifier circuit U2, so as to raise the entire output signal by 2.5V, so that there is no negative voltage in the entire signal after passing through the second operational amplifier circuit U2.

[0040] It should be noted that the second operational amplifier circuit U2 includes a parallel diode group D1 and D2 and a third operational amplifier u2. The third operational amplifier u2 is in parallel with the parallel diode group D1 and D2 to protect the input terminal of the third operational amplifier u2 or provide specific bias conditions. The positive input terminal and the negative input terminal of the third operational amplifier u2 are connected to the target mutual inductor to receive the input current signal. The positive input terminal of the third operational amplifier u2 is also connected to the output terminal of the first operational amplifier u1 to introduce the 2.5V reference voltage and raise the voltage value of the received input current signal.

[0041] In some embodiments, the gain switching switch is connected to the input terminal of the second operational amplifier circuit through a sampling resistor group.

[0042] Specifically, the gain switching switch includes a first gain switch K1 and a second gain switch K2, which are connected to the input terminal of the second operational amplifier circuit U2 through sampling resistors R1 and R3. Among them, the sampling resistor R1 is in series with the first gain switch K1, the sampling resistor group R3 is in series with the second gain switch K2, the sampling resistor R1 and the first gain switch K1 are in parallel with the sampling resistor group R3 and the second gain switch K2, and the sampling resistor R1 and the sampling resistor group R3 are directly connected to the negative input terminal of the second operational amplifier u2, so as to optimize the gain of the lifted current signal by turning on or off the first gain switch K1 or the second gain switch K2, obtain a current signal that meets the sampling range of the target AD chip, and transmit it to the voltage follower circuit U3. It should be noted that the resistance values of the sampling resistor R1 (i.e., the first sampling resistor) and the sampling resistor R3 (i.e., the second sampling resistor) need to be different, so that a current signal that meets the sampling range of the target AD chip can be obtained by turning on or off different switches.

[0043] In some embodiments, the voltage follower circuit U3 includes a fifth input resistor R2, a second load resistor R3, and a fourth operational amplifier u3. One end of the fifth input resistor R2 is respectively connected to a first switch K3-1 and a second switch K3-2. The first switch K3-1 is connected to a first gain switch K1, and the first switch K3-2 is connected to a first gain switch K2. The other end of the fifth input resistor R2 is connected to the positive input terminal of the fourth operational amplifier u3 to introduce a current signal within the sampling range of the target AD chip into the fourth operational amplifier u3. The output terminal of the fourth operational amplifier u3 is connected to one end of the second load resistor R3. The other end of the second load resistor R3 is respectively connected to the negative input terminal of the fourth operational amplifier u3 and a fully differential operational amplifier circuit U4 to increase the load of the current signal within the sampling range of the target AD chip, obtain an enhanced current signal, and transmit it to the fully differential operational amplifier circuit U4.

[0044] In some embodiments, the fully differential operational amplifier circuit U4 includes a second input resistor R6, a third input resistor R8, a fourth input resistor R9, a second operational amplifier u4, a first load resistor R7, and a capacitor C1. One end of the second input resistor R6 is grounded, and the other end of the second input resistor R6 is connected to the positive input terminal of the second operational amplifier u4. One end of the third input resistor R8 is connected to the output terminal of the voltage follower circuit U3 to introduce the enhanced current signal into the second operational amplifier u4. The other end of the third input resistor R8 is respectively connected to the negative input terminal of the second operational amplifier u4 and one end of the fourth input resistor R9. The output terminal of the second operational amplifier u4 is connected to one end of the first load resistor R7. One end of the first load resistor R7 and the other end of the fourth input resistor R9 are both connected to one end of the capacitor c1. The other end of the capacitor c1 is connected to one end of the third input resistor R8 to convert the enhanced current signal into a differential signal. One end and the other end of the capacitor c1 are connected to the target AD chip to supply the differential signal to the target AD chip.

[0045] The working principle of the current sampling DC operating point lifting circuit proposed by the present invention will be described below through a specific example.

[0046] Assume that the current signal input by the target current transformer is divided into two segments, I1 and I2 (I1 < I2), and input to the second operational amplifier circuit U2. In the figure, the sampling resistor R1 > R3. When the input current is I1, the corresponding sampling resistor is R1, and when the input current is I2, the corresponding sampling resistor is R3.

[0047] (1) When the input current is the current signal I1 (I1 ≤ I), the first switch K1 is closed. According to the magnitude of the current signal I1, a suitable sampling resistor R1 is selected to make the output voltage of the operational amplifier suitable for the sampling range of the target AD chip. At this time, the output voltage of the second operational amplifier circuit U2 is U OUT = I1 * R1, U OUT After being converted into differential signals (OUT_P, OUT_N) by the fully differential operational amplifier circuit U4, it is input to the target AD chip for sampling.

[0048] (2) When the input current is the current signal I2 (I2 ≥ I), the second switch K2 is closed. According to the magnitude of the current signal I2, a suitable feedback resistor R3 is selected to make the output voltage of the operational amplifier suitable for the sampling range of the target AD chip. At this time, the output voltage of the second operational amplifier circuit U2 is UOUT = I2 * R3. After UOUT is converted into differential signals (OUT_P, OUT_N) by the fully differential operational amplifier circuit U4, it is input to the target AD chip for sampling.

[0049] Furthermore, as Figure 5 and 6 shown, according to the measured results of the input and output waveforms of the current sampling DC operating point lifting circuit proposed by the present invention, it can be seen that the offset of the output waveform (channel 1) is equal to the theoretical offset. According to the output signal waveform when a small current (500 mA) is input and measured using the AC gear of the oscilloscope, it can be seen that the output signal noise is significantly reduced.

[0050] In summary, for the current sampling DC operating point lifting circuit proposed by the present invention, the operational amplifier circuit is powered by a single power supply, which reduces the design cost and there is no mutual influence between the dual power supplies, improving the stability and usability of the standard meter current sampling circuit; the signal is converted into differential signals by a single operational amplifier circuit, introducing less noise, the overall noise at the output end of the circuit becomes smaller, and the influence of the single operational amplifier offset voltage on the output signal becomes smaller; the operational amplifier circuit is designed with multiple gain modes, and a suitable gain gear is selected according to the magnitude of the input current to achieve a wide dynamic range.

[0051] Secondly, a standard watt-hour meter provided by the present invention adopts the above-mentioned current sampling DC operating point lifting circuit.

[0052] In the description of this specification, the descriptions with reference to terms such as "one embodiment", "some embodiments", "examples", "specific examples", or "some examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present utility model. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or N embodiments or examples in a suitable manner. In addition, without contradiction, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0053] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of the present utility model, the meaning of "N" is at least two, such as two, three, etc., unless otherwise specifically and clearly defined.

Claims

1. A current sampling DC operating point lifting circuit, characterized in that, Comprising: A first operational amplifier circuit for providing a reference voltage; A second operational amplifier circuit, the input terminals of the second operational amplifier circuit are respectively connected to the output terminal of the first operational amplifier circuit and the target current transformer, so as to perform voltage boosting on the current signal input by the target current transformer according to the reference voltage to obtain a boosted current signal; A gain switching switch, the gain switching switch is respectively connected to the input terminal and the output terminal of the second operational amplifier circuit, so as to perform gain optimization on the boosted current signal by opening or closing to obtain a current signal that meets the sampling range of the target AD chip; A voltage follower circuit, the input terminal of the voltage follower circuit is connected to the gain switching switch through a first switch and a second switch, so as to increase the load of the current signal that meets the sampling range of the target AD chip to obtain an enhanced current signal; A fully differential operational amplifier circuit, the input terminal of the fully differential operational amplifier circuit is connected to the output terminal of the voltage follower circuit, and the output terminal of the fully differential operational amplifier circuit is connected to the target AD chip, so as to convert the enhanced current signal into a differential signal and provide it to the target AD chip.

2. The flow sampling DC operating point boosting circuit according to claim 1, wherein The first operational amplifier circuit, the second operational amplifier circuit, the voltage follower circuit and the fully differential operational amplifier circuit are all powered by a single power supply.

3. The current sampling DC operating point lifting circuit according to claim 1, wherein The first operational amplifier circuit includes a first input resistor and a first operational amplifier. Wherein, one end of the first input resistor is connected to the target current transformer, the other end of the first input resistor is connected to the positive input terminal of the first operational amplifier, the negative input terminal of the first operational amplifier is connected to the output terminal of the first operational amplifier, and the output terminal of the first operational amplifier is connected to the positive input terminal of the second operational amplifier circuit.

4. The current sampling DC operating point lifting circuit according to claim 1, wherein The gain switching switch is connected to the input terminal of the second operational amplifier circuit through a sampling resistor group.

5. The current sampling DC operating point lifting circuit according to claim 4, characterized in that, The gain switching switch includes a first gain switch and a second gain switch, and the sampling resistor group includes a first sampling resistor and a second sampling resistor. Wherein, the first gain switch is connected to the first gain switch, the second gain switch is connected to the second gain switch, and both the first gain switch and the second gain switch are connected to the input terminal of the second operational amplifier circuit.

6. The current sampling DC operating point lifting circuit according to claim 5, wherein The resistance values of the first sampling resistor and the second sampling resistor are different.

7. The current sampling DC operating point lifting circuit according to claim 1, wherein, The fully differential operational amplifier circuit includes a second input resistor, a third input resistor, a fourth input resistor, a second operational amplifier, a first load resistor and a capacitor. Wherein, one end of the second input resistor is grounded, the other end of the second input resistor is connected to the positive input terminal of the second operational amplifier, one end of the third input resistor is connected to the output terminal of the voltage follower circuit, the other end of the third input resistor is respectively connected to the negative input terminal of the second operational amplifier and one end of the fourth input resistor, the output terminal of the second operational amplifier is connected to one end of the first load resistor, one end of the first load resistor and the other end of the fourth input resistor are both connected to one end of the capacitor, and the other end of the capacitor is connected to one end of the third input resistor.

8. A standard electricity meter, characterized in that, The standard watt-hour meter adopts the anti-alternating magnetic field interference circuit of the voltage sampling loop described in any one of claims 1-7.

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