Resistivity signal processing module
Through the integrated resistivity signal processing module, four-channel input isolation circuit and high-performance components are adopted to solve the problems of large size, heavy weight and low resolution of resistivity logging instruments, and flexible and accurate conductivity and porosity measurements are achieved.
Patent Information
- Application Number
- CN202422234716.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-12
- Publication Date
- 2025-07-08
- Estimated Expiration
- 2034-09-12
AI Technical Summary
The circuit design of existing resistivity logging instruments results in the downhole instrument being too long and too heavy, making it impossible to accurately measure formation conductivity and porosity, and the signal processing circuit resolution is low.
It adopts four-channel input isolation circuit, preamplifier and programmable gain control circuit, analog switch and differential amplifier circuit and bias adjustment circuit, combined with low-pass filtering circuit, and integrates resistivity signal processing modules, including tantalum electrolytic capacitor arrays and high-speed instrumentation amplifiers, programmable gain controllers, analog switches and operational amplifiers and other components.
The four-channel measurement mode is realized, which improves measurement flexibility and accuracy, effectively removes formation interference signals, protects the later-stage circuit, adapts to different measurement needs, and reduces the volume and weight of downhole instruments.
Smart Images

Figure CN223078484U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of oil logging, in particular to a resistivity signal processing module. Background Art
[0002] Resistivity logging is the earliest and most basic logging method in geophysical logging methods. Resistivity logging is based on the resistivity difference of rocks and ores. By measuring the change of the artificial DC electric field along the borehole profile, the borehole geological profile is studied. The basic principle of resistivity logging is to supply power to the bottom layer constant current source through the power supply electrodes A and B, forming a stable spherical electric field in the formation near the power supply electrodes. The distribution of the electric field current lines is affected by the conductivity difference of the surrounding rocks. At the same time, there are measurement electrodes M and N in the spherical electric field, which receive and measure the change of the weak potential difference signal between M and N in the electric field. After comparing and comprehensively analyzing with the measurement of other parameters of the same formation, the change curve of the resistivity along the wellbore moving with the fixed electrode arrangement can be understood, and then the conductivity and porosity of the formation can be calculated and other information can be obtained to identify rock types, aquifers, oil and gas reservoirs, etc.
[0003] In the related art, most of the resistivity logging instrument circuits use discrete devices. The resistivity signal input isolation circuit and the signal processing circuit are two physically separated circuits, and the circuit size is too large, making the downhole instrument too long and too heavy. Moreover, the resistivity signal input channel adopts a three-channel measurement mode, and the gain adjustment method of the three-channel resistivity signal input preamplification circuit is to adjust the external resistor, and the channel gain cannot be programmably adjusted, resulting in a low resolution and unable to accurately measure the formation conductivity and porosity. Summary of the Utility Model
[0004] In order to solve the above problems, the utility model provides a resistivity signal processing module to solve this problem.
[0005] To achieve the above object, the present application provides the following technical solutions:
[0006] A resistivity signal processing module includes a four-channel input isolation circuit, a preamplification and programmable gain control circuit, an analog switch and a differential amplification circuit, and a bias adjustment circuit. The bias adjustment circuit is connected with a low-pass filter circuit.
[0007] Further configured as: the input isolation circuit includes an IN1+ pin and an IN1- pin as input terminals, a PGA1+ pin and a PGA1- pin as input terminals, a polar capacitor C1, a polar capacitor C2, a polar capacitor C3, a polar capacitor C4, a polar capacitor C5, a resistor R1, and a resistor R2. Among them, the IN1+ pin is connected to the polar capacitor C1, the negative electrodes of the polar capacitor C1 and the polar capacitor C2 are connected, the polar capacitor C2 is connected to the resistor R1, the IN1- pin is connected to the polar capacitor C3, the negative electrodes of the polar capacitor C3 and the polar capacitor C4 are connected, the polar capacitor C4 is connected to the resistor R2, and the resistor R1 and the resistor R2 are connected and grounded.
[0008] Further configured as: the preamplifier and programmable gain control circuit includes an instrumentation amplifier U1 and a programmable gain controller U2. The 3rd pin and the 2nd pin of the instrumentation amplifier U1 are respectively connected to a REG1A pin and a REG1B pin to adjust the preamplifier gain by an external resistor. The preamplifier and programmable gain control circuit also includes a PGA1+ pin, a PGA1- pin, a series resistor R9, and a series resistor R10. Specifically, the PGA1+ pin and the PGA1- pin respectively pass through the series resistor R9 and the series resistor R10, and the non-inverting input terminal and the inverting input terminal of the instrumentation amplifier U1 are connected.
[0009] Further configured as: the 3rd pin and the 4th pin of the programmable gain controller U2 are respectively connected to the SCK and SDA ports. SDA is a data IO port, and SCK is a clock port to connect to the I2C interface of the microcontroller. The 10th pin of the programmable gain controller U2 is connected to the PGA1 port as the output terminal of the preamplifier and programmable gain control circuit.
[0010] Further configured as: the analog switch and differential amplifier circuit includes an analog switch U3 and a differential amplifier U4. Among them, the 2nd NC terminal and the 7th NO terminal of the analog switch U3 are respectively connected to the PGA1 input terminals. The 4th NO terminal and the 9th NC terminal of the analog switch U3 are grounded. The 3rd common terminal COM1 of the analog switch U3 is connected to the inverting input terminal of the differential amplifier U4 through a resistor R11. The 8th common terminal COM1 of the analog switch U3 is connected to the non-inverting input terminal of the differential amplifier U4 through a resistor R12. The output terminal of the differential amplifier U4 is provided with a CH pin, and the FB terminal is used as the control terminal of the analog switch U3 to connect the four IN terminals of the analog switch U3 to effectively remove interference signals of non-FB control frequencies.
[0011] Further set as: The low-pass filter circuit includes an operational amplifier U5, a resistor R24, a capacitor C24, a resistor R19, and also includes a resistor R20, a resistor R21, and a capacitor C23. Among them, the CH pin is connected to the resistor R24. The resistor R24 and the capacitor C24 form a first-order low-pass filter, which is connected to the 3rd pin of the operational amplifier U5 through the resistor R19. The inverting terminal of the operational amplifier U5 is connected to the resistor R20, the resistor R21, and the capacitor C23.
[0012] Further set as: The bias adjustment circuit includes an operational amplifier U6, a resistor R22, and a resistor R23. Among them, the non-inverting terminal of the operational amplifier U6 is connected to the output of the operational amplifier U5. The resistor R22 and the resistor R23 are respectively connected to the 1st pin and the 5th pin of the operational amplifier U6. The inverting terminal of the operational amplifier U6 is connected to its own output. The operational amplifier U6 adjusts the output bias by changing the resistance values of the resistor R22 and the resistor R23.
[0013] Further set as: The instrumentation amplifier U1 uses an instrumentation amplifier U1 of model AD8421AR. The programmable gain controller U2 uses a programmable gain controller U2 of model PGA1020A, and the programmable gain controller U2 is provided with an I2C interface. The analog switch U3 uses an analog switch U3 of model MAX333A. The differential amplifier U4 uses a differential amplifier U4 of model OP2177. The operational amplifier U5 uses an operational amplifier U5 of model OP07. The operational amplifier U6 uses an operational amplifier U6 of model CA3140.
[0014] Further set as: The resistor R24 uses a resistor R24 with a resistance value of 39 kΩ. The resistor R19 uses a resistor R19 with a resistance value of 51 kΩ. The resistor R22 uses a resistor R22 with a resistance value of 75 KΩ. The resistor R23 uses a resistor R23 with a resistance value of 24 KΩ.
[0015] Further set as: The capacitor C24 uses a capacitor C24 with a capacitance value of 10 uf.
[0016] Compared with the prior art, the beneficial technical effects of the present utility model are:
[0017] 1. The present utility model adopts a four-channel measurement mode, which can simultaneously receive and process four resistivity signals of 4-meter gradient, 2.5-meter gradient, 0.45-meter gradient, and 0.4-meter potential, improving the flexibility and accuracy of measurement.
[0018] 2. The input isolation circuit composed of tantalum electrolytic capacitor arrays in the present utility model can effectively remove high-voltage pulses, power frequency interference, and DC signals in the formation, protecting the subsequent preamplifier circuit; the high-speed instrumentation amplifier with the model number AD8421 is adopted in the present utility model, which has the characteristics of low power consumption, extremely low noise, and ultra-low offset current, and is suitable for various signal conditioning and data acquisition applications; the programmable gain controller with the model number PGA1020 is used in the present utility model, which has an I2C interface and can flexibly adjust the gain to adapt to different measurement requirements; the phase-sensitive detection circuit composed of analog switches and differential amplifiers in the present utility model can convert the square wave signal into a DC voltage signal, improving the usability of the signal; the operational amplifier with the model number CA3140 is adopted, which has the function of adjusting the offset error and can eliminate the weak voltage offset caused by the DC signal interference in the formation; the first-order low-pass filter is used to process the DC voltage signal output by the phase-sensitive detection, removing the sawtooth wave and making the signal smoother.
[0019] 3. High integration: The input isolation circuit is integrated inside the module, reducing the need for external components and making the downhole instrument more compact and portable. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the specific embodiments of the present utility model or the technical solutions in the prior art, the following will briefly introduce the drawings required for the description of the specific embodiments or the prior art. Obviously, the following drawings are some embodiments of the present utility model. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0021] Figure 1 is the internal connection schematic diagram of the present utility model;
[0022] Figure 2 is the schematic diagram of the input isolation circuit of the present utility model;
[0023] Figure 3 is the schematic diagram of the preamplification and programmable gain control circuit of the present utility model;
[0024] Figure 4 is the schematic diagram of the analog switch and differential amplifier circuit of the present utility model;
[0025] Figure 5 is the schematic diagram of the bias adjustment circuit of the present utility model;
[0026] Figure 6 is the external shape schematic diagram of the present utility model. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0027] The technical solution of the present utility model will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are some, but not all, of the embodiments of the present utility model. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present utility model without creative efforts shall fall within the protection scope of the present utility model.
[0028] In the description of the present utility model, it should be noted that unless otherwise clearly defined and limited, the terms "installation", "connection", and "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.
[0029] Embodiment
[0030] Refer to Figures 1 - 6 , a resistivity signal processing module disclosed by the present utility model, includes a four-channel input isolation circuit, a preamplifier and programmable gain control circuit, an analog switch and differential amplifier circuit, and a bias adjustment circuit that can eliminate the negative drift in the amplifier circuit.
[0031] The resistivity signal processing module of the present utility model has a four-channel measurement mode; it can simultaneously receive and process four-way resistivity signals of 4-meter gradient, 2.5-meter gradient, 0.45-meter gradient, and 0.4-meter potential, and internally integrates an input isolation circuit.
[0032] Refer to Figure 2 , the input isolation circuit includes an IN1+ pin and an IN1- pin as the input terminals, a PGA1+ pin and a PGA1- pin as the input terminals, a polarized capacitor C1, a polarized capacitor C2, a polarized capacitor C3, a polarized capacitor C4, a polarized capacitor C5, a resistor R1, and a resistor R2. Among them, the IN1+ pin is connected to the polarized capacitor C1, the negative electrodes of the polarized capacitor C1 and the polarized capacitor C2 are connected, the polarized capacitor C2 is connected to the resistor R1, the IN1- pin is connected to the polarized capacitor C3, the negative electrodes of the polarized capacitor C3 and the polarized capacitor C4 are connected, the polarized capacitor C4 is connected to the resistor R2, and the resistor R1 and the resistor R2 are connected and grounded.
[0033] Furthermore, the capacitance values of the polarized capacitors C1, C2, C3, and C4 are 100u / 16v, the resistance values of the resistors R1 and R2 are 100k ohms, and this input isolation circuit is an isolation circuit composed of 8 groups of RC, which is used to isolate the low-frequency interference signals in the formation and finally output by the PGA1+ pin and the PGA1- pin.
[0034] Reference Figure 3 As shown in Figure 3 , the preamplifier and programmable gain control circuit includes an instrumentation amplifier U1 of model AD8421AR and a programmable gain controller U2 of model PGA1020A with an I2C interface. The 3rd pin and the 2nd pin of the instrumentation amplifier U1 are respectively connected to the REG1A pin and the REG1B pin to adjust the gain of the preamplifier by an external resistor. The preamplifier and programmable gain control circuit also includes the PGA1+ pin, the PGA1- pin, a series resistor R9, and a serial resistor R10. Specifically, the PGA1+ pin and the PGA1- pin respectively pass through the series resistor R9 and the serial resistor R10, and the non-inverting terminal and the inverting terminal of the instrumentation amplifier U1 are connected together;
[0035] The 3rd pin and the 4th pin of the programmable gain controller U2 are respectively connected to the SCK and SDA ports. SDA is the data IO port, and SCK is the clock port to connect to the I2C interface of the microcontroller. The 10th pin of the programmable gain controller U2 is connected to the PGA1 port as the output terminal of the preamplifier and programmable gain control circuit.
[0036] Reference Figure 4 As shown in Figure 4 , the two resistivity channels of the analog switch and differential amplification circuit share an analog switch U3 of model MAX333A with four single-pole double-throw switches and a differential amplifier U4 of model OP2177. Among them, the 2nd NC terminal and the 7th NO terminal of the analog switch U3 are respectively connected to the PGA1 input terminal. The 4th NO terminal and the 9th NC terminal of the analog switch U3 are grounded. The 3rd common terminal COM1 of the analog switch U3 is connected to the inverting terminal of the differential amplifier U4 through a resistor R11. The 8th common terminal COM1 of the analog switch U3 is connected to the non-inverting terminal of the differential amplifier U4 through a resistor R12. The output terminal of the differential amplifier U4 is provided with a CH pin, and the FB terminal is used as the control terminal of the analog switch U3 to connect to the four IN terminals of the analog switch U3 to effectively remove the interference signals of non-FB control frequencies.
[0037] Reference Figure 5 As shown in Figure 5 , the bias adjustment circuit is connected to a low-pass filter circuit. Specifically, the low-pass filter circuit includes an operational amplifier U5 of model OP07, a resistor R24 with a resistance value of 39 kΩ, a capacitor C24 with a capacitance value of 10 μF, a resistor R19 with a resistance value of 51 kΩ, and also includes a resistor R20, a resistor R21, and a capacitor C23. Among them, the CH pin is connected to the resistor R24. The resistor R24 and the capacitor C24 form a first-order low-pass filter and are connected to the 3rd pin of the operational amplifier U5 through the resistor R19. The inverting terminal of the operational amplifier U5 is connected to the resistor R20, the resistor R21, and the capacitor C23. The CH pin has a large ripple. After being processed by the low-pass filter, a DC voltage signal with a low ripple is output.
[0038] The bias adjustment circuit includes an operational amplifier U6 of model CA3140, a resistor R22 with a resistance value of 75 KΩ, and a resistor R23 with a resistance value of 24 KΩ. Among them, the non-inverting input terminal of the operational amplifier U6 is connected to the output of the operational amplifier U5, the resistor R22 and the resistor R23 are respectively connected to the 1st pin and the 5th pin of the operational amplifier U6, the inverting input terminal of the operational amplifier U6 is connected to its own output, and the operational amplifier U6 adjusts the output bias by changing the resistance values of the resistor R22 and the resistor R23.
[0039] The working principle and beneficial effects of the present utility model are as follows:
[0040] The resistivity signal enters the input isolation circuit composed of a tantalum electrolytic capacitor array. The input isolation circuit is mainly composed of capacitors and resistors. The negative electrodes of the capacitors are connected relatively, which can effectively remove high-voltage pulses, power frequency interference, and DC signals in the formation, and has the function of protecting the subsequent preamplifier circuit. Then the resistivity signal enters the preamplifier from the input isolation circuit. The preamplifier uses a high-speed instrumentation amplifier U1 of model AD8421 with low power consumption, extremely low noise, and ultra-low bias current, which is suitable for various signal conditioning and data acquisition applications and has a relatively high common-mode rejection ratio (CMRR) at present. It can extract low-level signals in the case of high-frequency common-mode noise within a wide temperature range. The bandwidth of the instrumentation amplifier U1 is 10 MHz, and the slew rate is 35 V / μs, which is suitable for measuring low-level signals. The instrumentation amplifier U1 adopts a unique input protection method. Its input protection circuit usually includes a series of clamping diodes and resistor networks, which are connected in parallel with the input terminal and are used to limit the change range of the input voltage. When the input voltage exceeds a predetermined threshold, the clamping diodes conduct, discharging the excess voltage to the ground or the power supply rail, thereby protecting the internal circuit from overvoltage or undervoltage damage and ensuring a robust input while maintaining extremely low noise. With this input protection function, even if the voltage difference from the opposite power supply rail reaches 40 V, no damage will be caused.
[0041] After the resistivity signal is output from the preamplifier, it enters a programmable gain controller U2 of model PGA1020. The programmable gain controller U2 has an I2C interface and is an ideal choice for systems processing wide dynamic range signals. It operates with a power supply of ±4.5 V to ±18 V.
[0042] The phase-sensitive detection circuit is composed of an analog switch and a differential amplifier. The phase-sensitive detection circuit is a detection circuit with the ability to discriminate the phase of the modulation signal and select frequencies. The resistivity signal after phase-sensitive detection is converted from a square-wave signal into a DC voltage signal. The resistivity signal processing module circuit uses a precision, four-channel, single-pole double-throw analog switch U3, and the analog switch U3 is powered with a working voltage ranging from ±4.5V to ±20V. The analog switch U3 provides a low on-resistance (less than 35Ω), ensures a channel-to-channel matching of 2Ω, and remains flat within the analog signal range (maximum Δ3Ω). It also provides a break-before-make switch (typical value: 10ns), with a turn-off time less than 145ns and a turn-on time less than 175ns. The analog switch U3 is suitable for portable operation because the quiescent current is less than 50μA when all inputs are high or low.
[0043] There are still sawtooth waves in the DC voltage signal output by the phase-sensitive detection, so it still needs to be processed by a first-order low-pass filter. Due to the interference of DC signals in the formation, there is a weak voltage offset in the signal output by the phase-sensitive detection. The voltage offset adjustment circuit uses an operational amplifier U5 of model CA3140 with the function of adjusting the offset error. This device provides high-speed performance, extremely high input impedance, and low input current. The output stage uses bipolar transistors and includes built-in protection to prevent damage caused by the load terminal short-circuiting to the power supply rail or ground.
[0044] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the various embodiments of the present invention.
Claims
1. A resistivity signal processing module, characterized in that, It includes a four-channel input isolation circuit, a preamplifier and programmable gain control circuit, an analog switch and differential amplifier circuit, and a bias adjustment circuit. The bias adjustment circuit is connected to a low-pass filter circuit.
2. The resistivity signal processing module according to claim 1, characterized in that, The input isolation circuit includes an IN1+ pin and an IN1- pin as input terminals, a PGA1+ pin and a PGA1- pin of the input terminal, a polarized capacitor C1, a polarized capacitor C2, a polarized capacitor C3, a polarized capacitor C4, a polarized capacitor C5, a resistor R1, and a resistor R2. Among them, the IN1+ pin is connected to the polarized capacitor C1, the negative electrodes of the polarized capacitor C1 and the polarized capacitor C2 are connected, the polarized capacitor C2 is connected to the resistor R1, the IN1- pin is connected to the polarized capacitor C3, the negative electrodes of the polarized capacitor C3 and the polarized capacitor C4 are connected, the polarized capacitor C4 is connected to the resistor R2, and the resistor R1 and the resistor R2 are connected and grounded.
3. The resistivity signal processing module according to claim 2, wherein The preamplifier and programmable gain control circuit includes an instrumentation amplifier U1 and a programmable gain controller U2. The 3rd pin and the 2nd pin of the instrumentation amplifier U1 are respectively connected to the REG1A pin and the REG1B pin to adjust the gain of the preamplifier by an external resistor. The preamplifier and programmable gain control circuit also includes a PGA1+ pin, a series resistor R9, and a series resistor R10. Specifically, the PGA1+ pin and the PGA1- pin respectively pass through the series resistor R9 and the series resistor R10, and the non-inverting terminal and the inverting terminal of the instrumentation amplifier U1 are connected.
4. The resistivity signal processing module according to claim 3, characterized in that, The 3rd pin and the 4th pin of the programmable gain controller U2 are respectively connected to the SCK and SDA ports. SDA is the data IO port, and SCK is the clock port to connect to the I2C interface of the microcontroller. The 10th pin of the programmable gain controller U2 is connected to the PGA1 port as the output terminal of the preamplifier and programmable gain control circuit.
5. A resistivity signal processing module according to claim 4, characterized in that The analog switch and differential amplifier circuit includes an analog switch U3 and a differential amplifier U4. Among them, the 2nd NC terminal and the 7th NO terminal of the analog switch U3 are respectively connected to the PGA1 input terminal, the 4th NO terminal and the 9th NC terminal of the analog switch U3 are grounded, the 3rd common terminal COM1 of the analog switch U3 is connected to the inverting terminal of the differential amplifier U4 through the resistor R11, the 8th common terminal COM1 of the analog switch U3 is connected to the non-inverting terminal of the differential amplifier U4 through the resistor R12, the output terminal of the differential amplifier U4 is provided with a CH pin, and the FB terminal is used as the control terminal of the analog switch U3 to connect to the four IN terminals of the analog switch U3 to effectively remove interference signals of non-FB control frequencies.
6. The resistivity signal processing module according to claim 5, wherein The low-pass filter circuit includes an operational amplifier U5, a resistor R24, a capacitor C24, a resistor R19, and also includes a resistor R20, a resistor R21, and a capacitor C23. Among them, the CH pin is connected to the resistor R24, and the resistor R24 and the capacitor C24 form a first-order low-pass filter and are connected to the 3rd pin of the operational amplifier U5 through the resistor R19. The inverting terminal of the operational amplifier U5 is connected to the resistor R20, the resistor R21, and the capacitor C23.
7. The resistivity signal processing module according to claim 6, wherein The bias adjustment circuit includes an operational amplifier U6, a resistor R22, and a resistor R23. Among them, the non-inverting input terminal of the operational amplifier U6 is connected to the output of the operational amplifier U5. The resistor R22 and the resistor R23 are respectively connected to the 1st pin and the 5th pin of the operational amplifier U6. The inverting input terminal of the operational amplifier U6 is connected to its own output. The operational amplifier U6 adjusts the output bias by changing the resistance values of the resistor R22 and the resistor R23.
8. The resistivity signal processing module according to claim 7, characterized in that, The instrumentation amplifier U1 uses an instrumentation amplifier U1 of model AD8421AR. The programmable gain controller U2 uses a programmable gain controller U2 of model PGA1020A, and the programmable gain controller U2 is provided with an I2C interface. The analog switch U3 uses an analog switch U3 of model MAX333A. The differential amplifier U4 uses a differential amplifier U4 of model OP2177. The operational amplifier U5 uses an operational amplifier U5 of model OP07. The operational amplifier U6 uses an operational amplifier U6 of model CA3140.
9. The resistivity signal processing module according to claim 7, characterized in that, The resistor R24 uses a resistor R24 with a resistance value of 39 kΩ. The resistor R19 uses a resistor R19 with a resistance value of 51 kΩ. The resistor R22 uses a resistor R22 with a resistance value of 75 KΩ. The resistor R23 uses a resistor R23 with a resistance value of 24 KΩ.
10. A resistivity signal processing module according to claim 7, wherein The capacitor C24 uses a capacitor C24 with a capacitance value of 10 uf.