Brushless direct current motor driver circuit system

Abstract

The utility model belongs to the technical field of motors, and particularly relates to a brushless direct current motor driver circuit system which comprises a master control circuit, a driving circuit, a power circuit, an analog signal acquisition circuit and a power supply circuit. The output end of the main control circuit is connected with the driving circuit and is used for outputting a control signal to the driving circuit according to the feedback signal; the output end of the driving circuit is connected with the power circuit and is used for adjusting the output current and the output voltage of the power circuit according to the control signal; the power circuit is connected with the brushless direct current motor and is used for outputting the three-phase current and the three-phase voltage which are adjusted according to the driving circuit; one end of the analog signal acquisition circuit is connected with the power circuit, the other end of the analog signal acquisition circuit is connected with the main control circuit, and the analog signal acquisition circuit is used for acquiring feedback signals of output current and output voltage of the power circuit and transmitting the feedback signals to the main control circuit; the power supply circuit is connected with the master control circuit, the drive circuit and the power circuit and used for providing power.

Description

Technical Field

[0001] The utility model belongs to the technical field of motors, and particularly relates to a brushless DC motor driver circuit system. Background Art

[0002] In recent years, with the development of industrial automation and intelligence, the requirements for motor drive technology have become increasingly high.

[0003] With the continuous progress and development of power electronics technology, the cost of using power devices [such as MOSFET (field effect transistor), IGBT (insulated gate bipolar transistor), etc.] in motor drivers has been continuously decreasing, and the power density has been continuously increasing, thus providing a better technical foundation for the application of brushless DC motors. The current control accuracy of brushless DC motors directly affects the performance, stability, and efficiency of equipment. Therefore, how to improve the current control accuracy of brushless DC motors, especially the current acquisition accuracy in power electronic devices or electrical control systems, has become a technical problem to be solved.

[0004] Based on the above problems, the utility model proposes a brushless DC motor driver circuit system. Summary of the Utility Model

[0005] The purpose of the utility model is to provide a brushless DC motor driver circuit system. To achieve the above purpose, the technical solution adopted by the utility model is as follows:

[0006] The brushless DC motor driver circuit system includes a main control circuit, a drive circuit, a power circuit, an analog signal acquisition circuit, and a power supply circuit;

[0007] The output end of the main control circuit is connected to the drive circuit, and is used for outputting a control signal to the drive circuit according to a feedback signal;

[0008] The output end of the drive circuit is connected to the power circuit, and is used for adjusting the output current and output voltage of the power circuit according to the control signal;

[0009] The power circuit is connected to the brushless DC motor, and is used for outputting three-phase current and three-phase voltage adjusted according to the drive circuit;

[0010] One end of the analog signal acquisition circuit is connected to the power circuit, and the other end of the analog signal acquisition circuit is connected to the main control circuit. The analog signal acquisition circuit is used for acquiring feedback signals of the output current and output voltage of the power circuit and transmitting them to the main control circuit;

[0011] The power supply circuit is respectively connected to the main control circuit, the drive circuit, and the power circuit, and is used for providing power.

[0012] Further, the brushless DC motor driver circuit system further includes a communication circuit, a host computer, and an external power supply circuit;

[0013] The host computer is connected to the main control circuit through the communication circuit;

[0014] The external power supply circuit is connected to the power supply circuit.

[0015] Further, the power supply circuit includes a power management chip U1, a first input capacitor C1, a second input capacitor C2, a first voltage dividing resistor R1, a second voltage dividing resistor R2, a first output capacitor C3, a first bootstrap capacitor C4, and a filter inductor L1;

[0016] The IN pin, EN pin, and RON pin of the power management chip U1 are connected to the external power supply circuit;

[0017] Both the first input capacitor C1 and the second input capacitor C2 are connected to the IN pin of the power management chip U1, and the first input capacitor C1 and the second input capacitor C2 are commonly connected to the PGND pin;

[0018] The BS pin and the LX pin of the power management chip U1 are connected through the first bootstrap capacitor C4;

[0019] The LX pin of the power management chip U1 is externally connected to the filter inductor L1;

[0020] The first voltage dividing resistor R1 is connected between the output end of the filter inductor L1 and the FB pin of the power management chip U1, and the second voltage dividing resistor R2 is connected between the FB pin of the power management chip U1 and the PGND pin.

[0021] Further, the power supply pin of the power chip in the power circuit is connected to the power supply pin for inputting 28V DC voltage of the power supply circuit, the power supply pin of the drive chip in the drive circuit is connected to the power supply pin for outputting 15V DC voltage of the power supply circuit, and the power supply pins of the functional chips in the main control circuit, communication circuit, and analog signal acquisition circuit are all connected to the power supply pin for outputting 3.3V DC voltage of the power supply circuit.

[0022] Further, the drive circuit includes a drive chip U2, a bootstrap diode V1, a second bootstrap capacitor C5, a first gate resistor R3, and a second gate resistor R4;

[0023] The VB pin of the drive chip U2 is connected to the cathode of the bootstrap diode V1, and the anode of the bootstrap diode V1 is connected to the power supply;

[0024] The VS pin of the driving chip U2 is connected to the second bootstrap capacitor C5, and the other end of the second bootstrap capacitor C5 is connected to the negative electrode of the bootstrap diode V1;

[0025] The HO pin and the LO pin of the driving chip U2 are respectively output to the power circuit through the first gate resistor R3 and the second gate resistor R4 connected thereto.

[0026] Further, the power circuit includes a first MOSFET Q1, a second MOSFET Q2, a third MOSFET Q3, a fourth MOSFET Q4, a fifth MOSFET Q5, a sixth MOSFET Q6, a first sampling resistor R5, a second sampling resistor R6, and a third sampling resistor R7;

[0027] The drains D of the first MOSFET Q1, the third MOSFET Q3, and the fifth MOSFET Q5 are connected to the power supply pin inputting 28V DC voltage of the power supply circuit. The source S of the first MOSFET Q1 is connected to the drain D of the fourth MOSFET Q4. The source S of the third MOSFET Q3 is connected to the drain D of the sixth MOSFET Q6. The source S of the fifth MOSFET Q5 is connected to the drain D of the second MOSFET Q2. The gates G of the first MOSFET Q1, the second MOSFET Q2, the third MOSFET Q3, the fourth MOSFET Q4, the fifth MOSFET Q5, and the sixth MOSFET Q6 are connected to the HO pin and the LO pin of the driving chip of the driving circuit. The sources S of the fourth MOSFET Q4, the sixth MOSFET Q6, and the second MOSFET Q2 are respectively connected to the first sampling resistor R5, the second sampling resistor R6, and the third sampling resistor R7. The first sampling resistor R5, the second sampling resistor R6, and the third sampling resistor R7 are connected to the analog signal acquisition circuit.

[0028] Further, the analog signal acquisition circuit includes a filter circuit, a bias circuit, and an operational amplifier;

[0029] The filter circuit is connected to the bias circuit, the bias circuit is connected to the operational amplifier, and the operational amplifier is connected to the main control circuit;

[0030] The filter circuit is used to receive the sampling signals output by the first sampling resistor R5, the second sampling resistor R6, and the third sampling resistor R7;

[0031] The filter circuit filters the sampling signals and delivers them to the bias circuit. The bias circuit delivers the filtered sampling signals to the operational amplifier. The operational amplifier feeds back the sampling signals to the main control circuit;

[0032] Furthermore, the A pin, B pin, Z pin, and Y pin of the communication circuit are all connected to the host computer. The VCC pin of the communication circuit is connected to the power supply pin that outputs 3.3V DC voltage of the power supply circuit. The RO pin and DI pin of the communication circuit are both connected to the main control circuit.

[0033] Compared with the existing technology, due to the adoption of the above technical solutions, the present utility model has the following advantages:

[0034] In the brushless DC motor driver circuit system of the present utility model, the analog signal acquisition circuit acquires the feedback signal of the power circuit. The analog signal acquisition circuit feeds the acquired feedback signal back to the main control circuit. The main control circuit is used to adjust the control signal of the drive circuit according to the feedback signal. The drive circuit is used to adjust the output current and output voltage of the power circuit according to the control signal, so as to achieve the purpose of controlling the accuracy of the current and the utilization rate of the voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 It is a structural block diagram of the brushless DC motor driver circuit system of the present utility model.

[0036] Figure 2 It is a schematic diagram of the power supply circuit in the brushless DC motor driver circuit system of the present utility model.

[0037] Figure 3 It is a schematic diagram of the main control circuit in the brushless DC motor driver circuit system of the present utility model.

[0038] Figure 4 It is a schematic diagram of the drive circuit in the brushless DC motor driver circuit system of the present utility model.

[0039] Figure 5 It is a schematic diagram of the power circuit in the brushless DC motor driver circuit system of the present utility model.

[0040] Figure 6 It is a schematic diagram of the communication chip SIT3490 of the communication circuit in the brushless DC motor driver circuit system of the present utility model.

[0041] Figure 7 It is a schematic diagram of the communication chip CA-IF1051VS of the communication circuit in the brushless DC motor driver circuit system of the present utility model.

[0042] Figure 8 It is a schematic diagram of the analog signal acquisition circuit in the brushless DC motor driver circuit system of the present utility model.

[0043] Figure 9 It is a simplified diagram of the schematic diagram of the analog signal acquisition circuit in the brushless DC motor driver circuit system of the present utility model.

[0044] The attached drawing reference numerals are as follows: 1 - main control circuit, 2 - drive circuit, 3 - power circuit, 4 - analog signal acquisition circuit, 5 - power supply circuit, 6 - communication circuit, 7 - host computer, 8 - external power supply circuit. Specific embodiments

[0045] The preferred embodiments of the present utility model will be described in detail below in conjunction with the attached drawings, so as to more clearly understand the purpose, features and advantages of the present utility model. It should be understood that the embodiments shown in the attached drawings are not a limitation on the scope of the present utility model, but only to illustrate the essential spirit of the technical solution of the present utility model.

[0046] The embodiment of the present utility model provides a brushless DC motor driver circuit system, as Figure 1 shown, including a main control circuit 1, a drive circuit 2, a power circuit 3, and an analog signal acquisition circuit 4. The output end of the main control circuit 1 is connected to the drive circuit 2. The main control circuit 1 is used to output a control signal to the drive circuit 2 according to the feedback signal. The output end of the drive circuit 2 is connected to the power circuit 3. The drive circuit 2 is used to adjust the output current and output voltage of the power circuit 3 according to the control signal. The power circuit 3 is connected to the brushless DC motor. The power circuit 3 is used to output three-phase current and three-phase voltage adjusted according to the drive circuit 2. One end of the analog signal acquisition circuit 4 is connected to the power circuit 3, and the other end of the analog signal acquisition circuit 4 is connected to the main control circuit 1. The analog signal acquisition circuit 4 is used to collect the feedback signals of the output current and output voltage of the power circuit 3 and transmit them to the main control circuit 1. The power supply circuit 5 is respectively connected to the main control circuit 1, the drive circuit 2 and the power circuit 3, and is used to provide power.

[0047] Further, the feedback signal includes three-way current feedback signals and one-way voltage feedback signal. The three-way current feedback signals are used to feedback the output current of the power circuit 3, and the one-way voltage feedback signal is used to feedback the output voltage of the power circuit 3.

[0048] Further, the brushless DC motor driver circuit system further includes a communication circuit 6, a host computer 7 and an external power supply circuit 8; the host computer 7 is connected to the main control circuit 1 through the communication circuit 6; the external power supply circuit 8 is connected to the power supply circuit 5.

[0049] Specifically, as Figure 2As shown, the power supply circuit 5 includes a power management chip U1, a first input capacitor C1, a second input capacitor C2, a first voltage-dividing resistor R1, a second voltage-dividing resistor R2, a first output capacitor C3, a first bootstrap capacitor C4, and a filter inductor L1. The IN pin of the power management chip U1 is connected to a 28V DC voltage, the EN pin is connected to the 28V DC voltage through a 100k first resistor R8, and the RON pin is connected to the 28V DC voltage through a 1.6M second resistor R9. The IN pin, EN pin, and RON pin of the power management chip U1 are commonly connected to the 28V DC voltage. The IN pin is also connected to the first input capacitor C1 and the second input capacitor C2, and the first input capacitor C1 and the second input capacitor C2 are commonly connected to the PGND pin. The first input capacitor C1 is used to filter the pulsating current at the input end and provide a stable voltage for the input end of the power management chip U1. The magnitude of the first input capacitance determines the voltage ripple at the input end of the power management chip U1. A first bootstrap capacitor C4 is connected between the BS pin and the LX pin of the power management chip U1. The LX pin of the power management chip U1 is externally connected to the filter inductor L1. A first voltage-dividing resistor R1 is connected between the FB pin of the power management chip U1 and the output end of the filter inductor L1, and a second voltage-dividing resistor R2 is connected between the FB pin of the power management chip U1 and the PGND pin; a second output capacitor C6 is connected between the FB pin of the power management chip U1 and the output end of the filter inductor L1. The first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 are used to adjust the output voltage by selecting appropriate resistance values. To reduce the loss of the voltage-dividing resistors, the resistance values of the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 generally range from 10kΩ to 1MΩ. The filter inductor is used to filter the current ripple at the output end. The function of the first output capacitor C3 is to withstand the pulsation of the inductor current, reduce the output voltage ripple, and simultaneously take into account the steady-state characteristics and dynamic characteristics; the first bootstrap capacitor is used for internal bootstrap power supply.

[0050] Further, the power supply pin for inputting a 28V DC voltage of the power supply circuit 5 is connected to the power supply pin of the power chip of the power circuit 3, the power supply pin for outputting a 15V DC voltage of the power supply circuit 5 is connected to the power supply pin of the drive chip of the drive circuit 2, and the power supply pins for outputting 3.3V DC voltages of the power supply circuit 5 are respectively connected to the power supply pins of the functional chips of the main control circuit 1, the communication circuit 6, and the analog signal acquisition circuit 4.

[0051] As a preference, the model of the power management chip U1 is preferably the chip XC8821.

[0052] Furthermore, the power management chip U1 always operates in the PWM fixed-frequency mode, which can meet the application requirements without low-frequency ripple. At the same time, the chip XC8821 has functions of peak current protection, short-circuit protection, and thermal protection, ensuring the reliability of operation. The IN of the power management chip U1 is the input power supply pin, and a first input capacitor C1 and a second input capacitor C2 are added between the IN pin and the PGND pin to form a protection capacitor; the EN of the power management chip U1 is the external enable control pin. When it is set high, the power management chip U1 works. The EN pin cannot be left floating, so a first resistor R8 is added to the EN pin for current limiting protection. The RON pin of the power management chip U1 sets the conduction time of the internal switching transistor through a second resistor R9 connected to the IN pin. The VCC pin of the power management chip U1 is for internal input power supply. The first output capacitor C3 added between the VCC pin and the PGND pin is used together to filter the pulsating current at the input end, providing a stable voltage for the input end of the power management chip U1. The size of the input capacitance determines the voltage ripple at the input end of the power management chip U1. The FB of the power management chip U1 is the feedback pin, and the output voltage is changed by adjusting the resistance values of the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2; the BS of the power management chip U1 is the bootstrap capacitor pin, and a first bootstrap capacitor C4 needs to be connected for internal bootstrap power supply. The LX of the power management chip U1 is the switching node pin, and an external filter inductor L1 is used to stabilize the current ripple to determine the inductance. The function of the second output capacitor C6 is to provide the pulsation of the inductor current, reduce the output voltage ripple, and simultaneously take into account the steady-state characteristics and dynamic characteristics.

[0053] Specifically, as Figure 3 shown, the model of the main control chip of the main control circuit 1 is preferably QJ32F407RGT6. The I / O pins of CANTX, CANRX, RX3, and TX3 defined by the main control chip of the main control circuit 1 are connected to the output pins with the same definition of the communication circuit. The I / O pins of PWM3A and PWM3B defined by the drive signal of the main control chip of the main control circuit are connected to the output pins with the same definition of the drive chip of the drive circuit. The defined pins G2 and G5 of the drive chip are connected to the pins with the same definition of the field effect transistor of the power circuit. Then, the output pin of the analog operational amplifier is connected to the I / O pin of IFA defined by the main control chip, and the collected signal is fed back to the main control chip to form a closed loop.

[0054] Specifically, as Figure 4 shown, the drive circuit 2 includes a drive chip U2, a bootstrap diode V1, a second bootstrap capacitor C5, a first gate resistor R3, and a second gate resistor R4;

[0055] The VCC pin of the driving chip U2 is connected to the power supply circuit 5, the HIN pin of the driving chip U2 is connected to the PWM3A pin of the main control chip of the main control circuit 1, and the LIN pin of the driving chip U2 is connected to the PWM3B pin of the main control chip of the main control circuit 1; the VB pin of the driving chip U2 is connected to the negative electrode of the bootstrap diode V1, and the positive electrode of the bootstrap diode V1 is connected to the power supply through the seventh resistor R14; the VS pin of the driving chip U2 is connected to the second bootstrap capacitor C5, and the other end of the second bootstrap capacitor C5 is connected to the negative electrode of the bootstrap diode V1; the HO pin of the driving chip U2 is connected to the first gate resistor R3, the LO pin of the driving chip U2 is connected to the second gate resistor R4, and the HO pin and the LO pin of the driving chip U2 are respectively connected to the gate G of the MOSFET in the power circuit 3 through the first gate resistor R3 and the second gate resistor R4. The function of the driving circuit 2 is half-bridge driving, undervoltage protection, and strong high-side withstand voltage ability. The function of the bootstrap diode V1 is fast recovery time, strong withstand voltage ability, and large steady-state current; the second bootstrap capacitor C5 is used for internal bootstrap power supply to provide driving voltage for the power circuit; the function of the first gate resistor R3 and the second gate resistor R4 is low power consumption and fast driving speed.

[0056] Further, the model of the driving chip U2 is selected as IR2181. IR2181 is a high-voltage, high-speed power MOSFET and IGBT driver with independent high-side and low-side reference output channels.

[0057] Specifically, as Figure 5 shown, the power circuit 3 includes a first MOSFET Q1, a second MOSFET Q2, a third MOSFET Q3, a fourth MOSFET Q4, a fifth MOSFET Q5, a sixth MOSFET Q6, a first sampling resistor R5, a second sampling resistor R6, and a third sampling resistor R7. The power circuit 3 adopts a three-phase bridge circuit connection method.

[0058] The power supply circuit 5 provides a 28V DC voltage and inputs it to the drains D of the first MOSFET Q1, the third MOSFET Q3, and the fifth MOSFET Q5 in the power circuit, as well as the third input capacitor C7, the fourth input capacitor C8, and the fifth input capacitor C9. The source S of the first MOSFET Q1 is connected to the drain D of the fourth MOSFET Q4, the source S of the third MOSFET Q3 is connected to the drain D of the sixth MOSFET Q6, and the source S of the fifth MOSFET Q5 is connected to the drain D of the second MOSFET Q2. The gates G of the first MOSFET Q1, the second MOSFET Q2, the third MOSFET Q3, the fourth MOSFET Q4, the fifth MOSFET Q5, and the sixth MOSFET Q6 are connected to the HO and LO pins of the driving chip of the driving circuit. The source S of the fourth MOSFET Q4 is connected to the first sampling resistor R5, the source S of the sixth MOSFET Q6 is connected to the second sampling resistor R6, and the source S of the second MOSFET Q2 is connected to the third sampling resistor R7. The first sampling resistor R5, the second sampling resistor R6, and the third sampling resistor R7 are all connected to the analog signal acquisition circuit 4.

[0059] By controlling the conduction angle of the rectifier, the power circuit can achieve precise controllability of the voltage. While the voltage is controllable, by controlling the load resistance, the conduction angle of the rectifier, and the trigger pulse width, the current can be made controllable. The rectifier conducts the current in the positive or negative half cycle, which can reduce energy consumption and losses, improve efficiency, reduce interference to the power supply, and the output waveform is relatively smooth with a low harmonic level, enabling functions such as rapid reverse rotation and multi-speed control of the brushless DC motor.

[0060] Specifically, two analog signal acquisition circuits 4 are provided, as Figure 8 shown. Each analog signal acquisition circuit 4 includes a filtering circuit, a biasing circuit, and an operational amplifier. The filtering circuit is used to receive the sampling signals output by the first sampling resistor R5, the second sampling resistor R6, and the third sampling resistor R7. After filtering the sampling signals, the filtering circuit delivers them to the biasing circuit, and the biasing circuit delivers the filtered sampling signals to the operational amplifier. The operational amplifier feeds back the sampling signals to the main control circuit 1.

[0061] Furthermore, the filtering circuit is composed of the third resistor R10, the fourth resistor R11, the fifth capacitor C10, and the sixth capacitor C11, and the biasing circuit is composed of the seventh capacitor C12, the fifth resistor R12, and the eighth capacitor C13. The sampling signal first enters a filtering circuit composed of the third resistor R10, the fourth resistor R11, the fifth capacitor C10, and the sixth capacitor C11 for filtering, then enters the biasing circuit composed of the seventh capacitor C12, the fifth resistor R12, and the eighth capacitor C13, and then passes through the sixth resistor R13 to enter the positive input of the operational amplifier, and finally outputs and feeds back to the main control circuit 1.

[0062] Further, as Figure 9 shown, the filtering bandwidth of the filtering circuit is designed to be 2 MHz; Figure 9 Among them, the voltage U0 is the common-mode voltage between GND1 and GND2, U1 = I×R + U0, R is the sampling resistor, the voltage U2 is the bias voltage, and the voltage U OUT is the output voltage of the analog signal acquisition.

[0063] Figure 9 Among them, the resistance values of the sixth resistor R13 and the eighth resistor R22 are the same, which is Ra, Figure 9 Among them, the resistance value of the ninth resistor R25 is Rb, Figure 9 Among them, the resistance value of the tenth resistor R24 is Rc, Figure 9 Among them, the resistance value of the eleventh resistor R23 is Rd.

[0064]

[0065] To eliminate the common-mode voltage U0, let: Rc×Rd - Rb×Rc - Rb×Rd = 0 ②,

[0066] That is, Rb = (Rc×Rd) / (Rc + Rd), let Rc = Rd, and we get:

[0067] Substitute 3.3V into U2, and R, Ra, and Rb are 0.005Ω, 5.1k, and 300Ω respectively. Substituting them in, we get:

[0068] U OUT = 1.65 + 0.085×I ④

[0069] As a preference, the model of the operational amplifier of the analog signal acquisition circuit is preferably CBM8656AMS8. The core of the analog signal acquisition circuit is to be able to amplify the tiny high-frequency voltage signal, filter out the interference signals caused by the switching of power devices and the parasitic parameters of resistors, cancel the influence of the common-mode voltage between the power ground and the analog ground on the acquisition accuracy, and be able to cooperate with the voltage bias within the AD acquisition range.

[0070] Specifically, as Figures 6-7 shown, the A pin, B pin, Z pin, and Y pin of the communication circuit are all connected to the host computer 7, and the VCC pin of the communication circuit is connected to the output terminal of the 3.3V DC voltage of the power supply circuit. The RO pin of the communication circuit is connected to the RX3 pin of the main control circuit, and the DI pin is connected to the TX3 pin of the main control circuit.

[0071] Further, the communication circuit includes a communication chip U3 and a CAN communication chip U4. The model of the communication chip U3 is preferably SIT3490, and the model of the CAN communication chip U4 is preferably CA-IF1051VS. SIT3490 is an RS-485 transceiver powered by a 3.3V DC voltage, full-duplex, and low-power, fully meeting the requirements of the TIA / EIA-485 standard. SIT3490 includes a driver and a receiver, both of which can transmit signals independently. SIT3490 has a 1 / 8 load, allowing 256 SIT3490 transceivers to be connected in parallel on the same communication bus, enabling error-free data transmission of up to 10 Mbps.

[0072] The instructions of the communication circuit 6 are input to the signal communication pin of the main control chip of the main control circuit 1 through the communication pin. The main control chip of the main control circuit 1 outputs a drive signal to the drive chip of the drive circuit 2 through the drive signal output pin for control, so that it outputs a signal to the switch pin of the power chip of the power circuit 3 according to the instructions of the main control circuit 1 for control, and then is input to the input pin of the operational amplifier of the analog signal acquisition circuit 4 through the sampling resistor of the power circuit 3 for signal acquisition. The output pin of the operational amplifier is then connected to the input pin of the main control chip, and the acquired signal is fed back to the main control chip to form a closed loop.

[0073] As Figures 1-9 shown. The power circuit of the present utility model adopts a three-phase bridge connection method, and uses the method of using three high-precision sampling resistors in the lower bridge arm to collect three-phase currents, and outputs them to the analog signal acquisition circuit. The analog signal acquisition circuit composed of two high-precision operational amplifiers respectively collects the three-phase currents and power voltages, filters and amplifies the small current signals, and strictly aligns with the MOSFET switching timing of the power circuit in the acquisition timing. By the above method, the acquisition accuracy of the current is improved. By dynamically collecting the transformation of the three-phase currents and power voltages respectively through the analog signal acquisition circuit, while ensuring the high voltage utilization rate of the driver, the current control accuracy at low modulation degrees is improved.

Claims

1. Brushless DC motor driver circuit system, characterized in that: It includes a main control circuit (1), a drive circuit (2), a power circuit (3), an analog signal acquisition circuit (4), and a power supply circuit (5); The output end of the main control circuit (1) is connected to the drive circuit (2), and is used to output a control signal to the drive circuit (2) according to the feedback signal; The output end of the drive circuit (2) is connected to the power circuit (3), and is used to adjust the output current and output voltage of the power circuit (3) according to the control signal; The power circuit (3) is connected to a brushless DC motor, and is used to output three-phase current and three-phase voltage adjusted according to the drive circuit (2); One end of the analog signal acquisition circuit (4) is connected to the power circuit (3), and the other end of the analog signal acquisition circuit (4) is connected to the main control circuit (1). The analog signal acquisition circuit (4) is used to collect the feedback signals of the output current and output voltage of the power circuit (3) and transmit them to the main control circuit (1); The power supply circuit (5) is respectively connected to the main control circuit (1), the drive circuit (2), and the power circuit (3), and is used to provide power supply.

2. The brushless DC motor driver circuit system according to claim 1, characterized in that: The brushless DC motor driver circuit system further includes a communication circuit (6), a host computer (7), and an external power supply circuit (8); The host computer (7) is connected to the main control circuit (1) through the communication circuit (6); The external power supply circuit (8) is connected to the power supply circuit (5).

3. The brushless DC motor driver circuit system according to claim 1 or 2, characterized in that: The power supply circuit (5) includes a power management chip U1, a first input capacitor C1, a second input capacitor C2, a first voltage dividing resistor R1, a second voltage dividing resistor R2, a first output capacitor C3, a first bootstrap capacitor C4, and a filter inductor L1; The IN pin, EN pin, and RON pin of the power management chip U1 are connected to the external power supply circuit (8); Both the first input capacitor C1 and the second input capacitor C2 are connected to the IN pin of the power management chip U1, and the first input capacitor C1 and the second input capacitor C2 are commonly connected to the GND pin; The BS pin and the LX pin of the power management chip U1 are connected through the first bootstrap capacitor C4; The LX pin of the power management chip U1 is externally connected to the filter inductor L1; A first voltage dividing resistor R1 is connected between the output end of the filter inductor L1 and the FB pin of the power management chip U1, and a second voltage dividing resistor R2 is connected between the FB pin of the power management chip U1 and the GND pin.

4. The brushless DC motor driver circuit system according to claim 1, characterized in that: The power supply pin of the power chip of the power circuit (3) is connected to the power supply pin for inputting 28V DC voltage of the power supply circuit (5), the power supply pin of the drive chip of the drive circuit (2) is connected to the power supply pin for outputting 15V DC voltage of the power supply circuit (5), and the power supply pins of the functional chips of the main control circuit (1), the communication circuit (6), and the analog signal acquisition circuit (4) are respectively connected to the power supply pin for outputting 3.3V DC voltage of the power supply circuit (5).

5. The brushless DC motor driver circuit system according to claim 4, characterized in that: The drive circuit (2) includes a drive chip U2, a bootstrap diode V1, a second bootstrap capacitor C5, a first gate resistor R3, and a second gate resistor R4; The VB pin of the driving chip U2 is connected to the negative electrode of the bootstrap diode V1, and the positive electrode of the bootstrap diode V1 is connected to the power supply; The VS pin of the driving chip U2 is connected to the second bootstrap capacitor C5, and the other end of the second bootstrap capacitor C5 is connected to the negative electrode of the bootstrap diode V1; The HO pin and the LO pin of the driving chip U2 are respectively output to the power circuit (3) through the first gate resistor R3 and the second gate resistor R4 connected thereto.

6. The brushless DC motor driver circuit system according to claim 5, characterized in that: The power circuit (3) includes a first MOSFET Q1, a second MOSFET Q2, a third MOSFET Q3, a fourth MOSFET Q4, a fifth MOSFET Q5, a sixth MOSFET Q6, a first sampling resistor R5, a second sampling resistor R6, and a third sampling resistor R7; The drains D of the first MOSFET Q1, the third MOSFET Q3, and the fifth MOSFET Q5 are connected to the power supply pins for inputting 28V DC voltage of the power supply circuit (5). The source S of the first MOSFET Q1 is connected to the drain D of the fourth MOSFET Q4. The source S of the third MOSFET Q3 is connected to the drain D of the sixth MOSFET Q6. The source S of the fifth MOSFET Q5 is connected to the drain D of the second MOSFET Q2. The gates G of the first MOSFET Q1, the second MOSFET Q2, the third MOSFET Q3, the fourth MOSFET Q4, the fifth MOSFET Q5, and the sixth MOSFET Q6 are connected to the HO pin and the LO pin of the driving chip of the driving circuit. The sources S of the fourth MOSFET Q4, the sixth MOSFET Q6, and the second MOSFET Q2 are respectively connected to the first sampling resistor R5, the second sampling resistor R6, and the third sampling resistor R7. The first sampling resistor R5, the second sampling resistor R6, and the third sampling resistor R7 are connected to the analog signal acquisition circuit (4).

7. The brushless DC motor driver circuit system according to claim 6, characterized in that: The analog signal acquisition circuit (4) includes a filter circuit, a bias circuit, and an operational amplifier; The filter circuit is connected to the bias circuit, the bias circuit is connected to the operational amplifier, and the operational amplifier is connected to the main control circuit (1); The filter circuit is used to receive the sampling signals output by the first sampling resistor R5, the second sampling resistor R6, and the third sampling resistor R7; The filter circuit filters the sampling signals and delivers them to the bias circuit. The bias circuit delivers the filtered sampling signals to the operational amplifier. The operational amplifier feeds back the sampling signals to the main control circuit (1).

8. The brushless DC motor driver circuit system according to claim 2, characterized in that: The A pin, B pin, Z pin, and Y pin of the communication circuit (6) are all connected to the host computer (7). The VCC pin of the communication circuit (6) is connected to the power supply pin for outputting 3.3V DC voltage of the power supply circuit (5). The RO pin and the DI pin of the communication circuit (6) are both connected to the main control circuit (1).

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