Pulse width detection device

Abstract

The utility model provides a pulse width detection device, and belongs to the technical field of pulse detection. The pulse width detection device comprises a signal acquisition module, a switch module, a first preprocessing module, a second preprocessing module and a pulse width detection module, the signal acquisition module is connected with the switch module. The switch module is connected with the first preprocessing module and the second preprocessing module. The first preprocessing module and the second preprocessing module are connected with the pulse width detection module; the signal acquisition module is configured to acquire pulse signals; the first preprocessing module is configured to process signals smaller than a preset data volume, and the second preprocessing module is configured to process signals larger than the preset data volume; the pulse width detection module is configured to detect the width of the pulse signal. According to the invention, signals with different data volumes can be processed in stages, so that the processing efficiency and accuracy are improved.

Description

Technical Field

[0001] The present disclosure relates to the technical field of pulse detection, and particularly to a pulse width detection device. Background Art

[0002] Pulse detection technology covers multiple fields, from basic physics, electronic engineering to information technology, and has gradually been integrated into modern intelligent applications, having a wide and profound impact. In electronic devices and circuit systems, pulse detection is used to diagnose fault points, such as short circuits, open circuits, and component aging. In the prior art, the pulse detection efficiency is low and the scalability is poor, which greatly affects the research progress of projects. Utility Model Content

[0003] Embodiments of the present disclosure provide a pulse width detection device to solve the problems of low pulse detection efficiency and poor scalability in the prior art.

[0004] In a first aspect, embodiments of the present disclosure provide a pulse width detection device, including:

[0005] A signal acquisition module, a switch module, a first preprocessing module, a second preprocessing module, and a pulse width detection module;

[0006] The signal acquisition module is connected to the switch module, and the switch module is respectively connected to the first preprocessing module and the second preprocessing module; both the first preprocessing module and the second preprocessing module are connected to the pulse width detection module;

[0007] The signal acquisition module is configured to acquire pulse signals; the first preprocessing module is configured to process signals with a data volume less than a preset value, and the second preprocessing module is configured to process signals with a data volume greater than the preset value;

[0008] The pulse width detection module is configured to detect the width of the pulse signal.

[0009] In an exemplary embodiment of the present disclosure, the switch module includes a single-pole double-throw switch and a control unit;

[0010] The control unit is connected to the signal acquisition module;

[0011] The moving end of the single-pole double-throw switch is connected to the control unit, the first fixed end is connected to the first preprocessing module, and the second fixed end is connected to the second preprocessing module;

[0012] The control unit is configured to control the working state of the single-pole double-throw switch according to the pulse signal data acquired by the signal acquisition module.

[0013] In an exemplary embodiment of the present disclosure, the pulse width detection module includes:

[0014] Chip U1, capacitor C1, capacitor C2, capacitor C3, resistor R1, resistor R2, resistor R3, resistor R4, potentiometer P1, transistor Q1, and transistor Q2;

[0015] For the chip U1, the first terminal GND is connected to the first terminal of the capacitor C3, the second terminal TRIG is respectively connected to the second terminal of the resistor R2 and the collector of the transistor Q1, the third terminal OUT is connected to the first terminal of the resistor R4, the fourth terminal PST is respectively connected to the eighth terminal VCC of the chip U1, the first terminal of the potentiometer P1, the first terminal of the resistor R2, and the external power supply VCC, the fifth terminal CV is respectively connected to the second terminal of the capacitor C3, the second terminal of the capacitor C2, the emitter of the transistor Q1, the second terminal of the capacitor R1, the emitter of the transistor Q2, and the ground terminal GND, and the sixth terminal THRS is respectively connected to the seventh terminal DIS of the chip U1, the first terminal of the capacitor C2, and the second terminal of the potentiometer P1;

[0016] The base of the transistor Q1 is respectively connected to the second terminal of the capacitor C1 and the first terminal of the resistor R1, the base of the transistor Q2 is connected to the second terminal of the resistor R4, and the collector of the transistor Q2 is respectively connected to the output terminal Vout1 and the second terminal of the resistor R3;

[0017] The first terminal of the capacitor C1 is respectively connected to the first terminal of the resistor R3 and the input terminal Vin1.

[0018] In an exemplary embodiment of the present disclosure, the pulse width detection module further includes a diode D5;

[0019] The positive electrode of the diode D5 is connected to VCC, and the negative electrode of the diode D5 is respectively connected to the first terminal of the resistor R2, the first terminal of the potentiometer P1, the eighth terminal VCC of the chip U1, and the fourth terminal PST of the chip U1.

[0020] In an exemplary embodiment of the present disclosure, the first preprocessing module includes a first high-speed sampling A / D circuit;

[0021] The high-speed sampling A / D circuit is configured to collect the amplitude of the pulse signal.

[0022] In an exemplary embodiment of the present disclosure, the second preprocessing module includes:

[0023] A second high-speed sampling A / D circuit and a signal amplification and limiting circuit;

[0024] The signal amplification and limiting circuit is connected to the second high-speed sampling A / D circuit;

[0025] The signal amplification and limiting circuit includes:

[0026] Amplifier U2, amplifier U3, resistor R5, resistor R6, resistor R7, resistor R8, resistor R9, resistor R10, diode D1, diode D2, diode D3, and diode D4;

[0027] The fifth terminal of the amplifier U2 is connected to the second terminal of the resistor R5. The sixth terminal of the amplifier U2 is respectively connected to the second terminal of the resistor R6 and the first terminal of the resistor R7. The seventh terminal of the amplifier U2 is respectively connected to the first terminal of the resistor R6, the first terminal of the resistor R8, the negative electrode of the diode D1, and the positive electrode of the diode D2;

[0028] The fifth terminal of the amplifier U3 is connected to the second terminal of the resistor R8. The sixth terminal of the amplifier U3 is respectively connected to the second terminal of the resistor R9 and the first terminal of the resistor R10. The seventh terminal of the amplifier U3 is respectively connected to the first terminal of the resistor R9, the positive electrode of the diode D3, the positive electrode of the diode D4, and the output Vout2;

[0029] The first terminal of the resistor R5 is connected to the input Vin2. The second terminal of the resistor R7 and the negative electrode of the diode D2 are both connected to GND. The second terminal of the resistor R10 and the negative electrode of the diode D4 are both connected to GND. The positive electrode of the diode D1 is connected to -VCC, and the negative electrode of the diode D3 is connected to VCC.

[0030] In an exemplary embodiment of the present disclosure, the pulse width detection device further includes:

[0031] A filtering circuit;

[0032] The filtering circuit is respectively connected to the first preprocessing module and the second preprocessing module.

[0033] In an exemplary embodiment of the present disclosure, the pulse width detection device further includes:

[0034] An alarm module;

[0035] The alarm module is connected to the second preprocessing module.

[0036] The beneficial effects of a pulse width detection device provided by an embodiment of the present disclosure are:

[0037] First, the present disclosure realizes intelligent shunt processing of pulse signals by introducing a switch module. This means that the pulse width detection device can automatically select the most suitable preprocessing module for processing according to different signal characteristics (such as being greater than or less than a preset data volume), greatly improving the efficiency and accuracy of signal processing.

[0038] Secondly, the device adopts a dual preprocessing module design, which not only ensures fast processing of signals less than the preset data volume but also meets the complex processing requirements of signals greater than the preset data volume. This design not only improves the flexibility of the device but also enhances its adaptability and scalability, enabling the device to handle more diverse application scenarios.

[0039] Finally, the pulse width detection module can accurately measure the start and end times of the pulse signal, thereby calculating the accurate pulse width. This function is crucial for applications that require high-precision time measurement, such as communication and control systems. By outputting the detected pulse width data, the device can provide strong support for subsequent analysis, control, or storage. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following will briefly introduce the drawings required for use in the embodiments or the description of the prior art. Obviously, the following-described drawings are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0041] Figure 1 FIG. is a schematic structural diagram of a pulse width detection device provided by an embodiment of the present disclosure;

[0042] Figure 2 FIG. is a schematic structural diagram of a pulse width detection device provided by another embodiment of the present disclosure;

[0043] Figure 3 FIG. is a circuit diagram of a pulse width detection module provided by an embodiment of the present disclosure;

[0044] Figure 4 FIG. is a circuit diagram of a signal amplification and limiting circuit provided by an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0045] In order to enable those skilled in the art to better understand this solution, the following will clearly describe the technical solutions in the embodiments of this solution with reference to the drawings in the embodiments of this solution. Obviously, the described embodiments are some, but not all, of the embodiments of this solution. Based on the embodiments in this solution, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the scope of protection of this solution.

[0046] In the description and claims of this solution, and in the above-mentioned drawings, the term "including" and any other variations thereof mean "including but not limited to", intending to cover non-exclusive inclusion and not limited only to the examples listed in the text. In addition, terms such as "first" and "second" are used to distinguish different objects, rather than to describe a specific order.

[0047] The implementation of the present disclosure will be described in detail below with reference to specific drawings:

[0048] Figure 1 It is a schematic structural diagram of a pulse width detection device provided for an embodiment of the present disclosure. Referring to Figure 1 ,the pulse width detection device includes:

[0049] A signal acquisition module 11, a switch module 12, a first preprocessing module 13, a second preprocessing module 14, and a pulse width detection module 15;

[0050] The signal acquisition module 11 is connected to the switch module 12, and the switch module 12 is respectively connected to the first preprocessing module 13 and the second preprocessing module 14; both the first preprocessing module 13 and the second preprocessing module 14 are connected to the pulse width detection module 15;

[0051] The signal acquisition module 11 is configured to acquire pulse signals; the first preprocessing module 13 is configured to process signals with a data volume less than a preset value, and the second preprocessing module 14 is configured to process signals with a data volume greater than the preset value;

[0052] The pulse width detection module 15 is configured to detect the width of the pulse signal.

[0053] In this embodiment, the signal acquisition module 11 is responsible for capturing the pulse signals to be detected. These pulse signals may come from different sources, such as sensors, signal generators, or other electronic devices. The signal acquisition module 11 sends the acquired pulse signals to the switch module 12, and the switch module 12 decides which preprocessing module to route the signal to according to the characteristics of the pulse signal (such as being less than the preset data volume).

[0054] The first preprocessing module 13 is responsible for processing signals with a data volume less than the preset value. These signals may not require complex processing or can be directly subjected to pulse width detection. The second preprocessing module 14 is designed to process signals with a data volume greater than the preset value. This usually involves some complex digital signal processing algorithms, such as amplification, digitization, etc., to prepare the signals for subsequent pulse width detection. The main purpose of the preprocessing module is to convert the original signal into a format suitable for processing by the pulse width detection module 15 and remove noise, interference, or other unwanted components.

[0055] The preprocessed signal is sent to the pulse width detection module 15. This module is responsible for measuring the width of the pulse signal. The pulse width detection module 15 can accurately measure the start and end times of the pulse, thereby calculating the width of the pulse. The detected pulse width can be used as output data for subsequent analysis, control, or storage.

[0056] As can be seen from the above, first of all, the present disclosure realizes intelligent shunt processing of pulse signals by introducing the switch module 12. This means that the pulse width detection device can automatically select the most suitable preprocessing module for processing according to different signal characteristics (such as being greater than or less than the preset data volume), greatly improving the efficiency and accuracy of signal processing.

[0057] Secondly, the device adopts a dual preprocessing module design, which not only ensures the rapid processing of signals less than the preset data volume but also meets the complex processing requirements of signals greater than the preset data volume. This design not only improves the flexibility of the device but also enhances its adaptability and scalability, enabling the device to handle more diverse application scenarios.

[0058] Finally, the pulse width detection module 15 can accurately measure the start and end times of the pulse signal, thereby calculating the accurate pulse width. This function is crucial for applications that require high-precision time measurement, such as communication and control systems. By outputting the detected pulse width data, the device can provide strong support for subsequent analysis, control, or storage.

[0059] In summary, through functions such as intelligent shunt processing, dual preprocessing module design, and accurate pulse width detection, the present disclosure significantly improves the efficiency and accuracy of signal processing, providing reliable technical support for various application scenarios.

[0060] In an embodiment of the present disclosure, referring to Figure 2 , the switch module 12 includes a single-pole double-throw switch 201 and a control unit 202;

[0061] The control unit 202 is connected to the signal acquisition module 11;

[0062] The moving end of the single-pole double-throw switch 201 is connected to the control unit 202, the first fixed end is connected to the first preprocessing module 13, and the second fixed end is connected to the second preprocessing module 14;

[0063] The control unit is configured to control the working state of the single-pole double-throw switch 201 according to the pulse signal data collected by the signal acquisition module 11.

[0064] In this embodiment, the control unit 202 determines the operating state of the single-pole double-throw switch 201 according to the magnitude of the data volume of the pulse signal sent by the signal acquisition module 11. If the data volume of the pulse signal is small, the control unit 202 controls the moving end of the single-pole double-throw switch 201 to connect to the first fixed end, that is, routes the signal to the first preprocessing module 13; if the data volume of the pulse signal is large, the control unit 202 controls the moving end of the single-pole double-throw switch 201 to connect to the second fixed end, that is, routes the signal to the second preprocessing module 14.

[0065] From the above, it can be obtained that the control unit 202 can automatically switch the signal processing path by intelligently judging whether the pulse signal is greater than or less than the preset data volume, directly send the signal less than the preset data volume to the first preprocessing module 13, and send the signal greater than the preset data volume to the second preprocessing module 14, realizing the optimization of signal processing. This design not only improves the efficiency and accuracy of signal processing, but also reduces the overall complexity of the system and enhances the flexibility and adaptability of the device.

[0066] In an embodiment of the present disclosure, referring to Figure 3 , the pulse width detection module 15 includes:

[0067] Chip U1, capacitor C1, capacitor C2, capacitor C3, resistor R1, resistor R2, resistor R3, resistor R4, potentiometer P1, triode Q1 and triode Q2;

[0068] For chip U1, the first terminal GND is connected to the first terminal of capacitor C3, the second terminal TRIG is respectively connected to the second terminal of resistor R2 and the collector of triode Q1, the third terminal OUT is connected to the first terminal of resistor R4, the fourth terminal PST is respectively connected to the eighth terminal VCC of chip U1, the first terminal of potentiometer P1, the first terminal of resistor R2 and the external power supply VCC, the fifth terminal CV is respectively connected to the second terminal of capacitor C3, the second terminal of capacitor C2, the emitter of triode Q1, the second terminal of capacitor R1, the emitter of triode Q2 and the ground terminal GND, and the sixth terminal THRS is respectively connected to the seventh terminal DIS of chip U1, the first terminal of capacitor C2 and the second terminal of potentiometer P1;

[0069] The base of triode Q1 is respectively connected to the second terminal of capacitor C1 and the first terminal of resistor R1, the base of triode Q2 is connected to the second terminal of resistor R4, and the collector of triode Q2 is respectively connected to the output terminal Vout1 and the second terminal of resistor R3;

[0070] The first terminal of capacitor C1 is respectively connected to the first terminal of resistor R3 and the input terminal Vin1.

[0071] In an embodiment of the present disclosure, the pulse width detection module 15 further includes a diode D5;

[0072] The positive electrode of diode D5 is connected to VCC, and the negative electrode of diode D5 is respectively connected to the first end of resistor R2, the first end of sliding rheostat P1, the eighth end VCC of chip U1, and the fourth end PST of chip U1.

[0073] In this embodiment, the pulse signal enters from the input terminal Vin1 and first passes through a simple RC circuit composed of resistor R3 and capacitor C1. This circuit plays a certain filtering role and reduces the high-frequency noise in the input signal. The filtered pulse signal is sent to the base of transistor Q1. When the base voltage reaches a certain level, transistor Q1 conducts and sends the signal to the second end TRIG of chip U1. This end is the trigger terminal of the chip and is responsible for detecting the presence of the input pulse signal.

[0074] The chip U1 further processes and conditions the input pulse signal internally. It uses capacitors C2 and C3 and resistor R2 to set the detection threshold of the pulse width, and adjusts the threshold size through the sliding rheostat P1. At the same time, the chip may contain a comparator or other logic circuits internally to detect whether the width of the pulse signal exceeds the set threshold.

[0075] When the width of the pulse signal exceeds the set threshold, the third end OUT of chip U1 outputs a signal. This signal is sent to the base of transistor Q2 after passing through resistor R4, causing Q2 to conduct. The collector of Q2 is connected to the output terminal Vout1. Therefore, when Q2 conducts, Vout1 outputs a signal indicating that the pulse width exceeds the threshold.

[0076] The fourth end PST and the eighth end VCC of chip U1 are connected to the external power supply VCC to provide the operating voltage for the chip. At the same time, the first end GND and the fifth end CV of the chip are grounded to ensure the stable operation of the chip.

[0077] It can be concluded from the above that through the precise circuit design inside chip U1 and the precise configuration of external components, the pulse width detection module 15 can achieve high-precision detection of the pulse signal width, meeting the measurement accuracy requirements of various application scenarios. The sliding rheostat P1 allows users to adjust the detection threshold of the pulse width according to actual needs, increasing the flexibility and adaptability of the module. The reasonable circuit design and component layout ensure the stability and reliability of the module, and it can maintain an accurate working state even in a complex environment. The pulse width detection module 15 has a fast response speed, can detect the pulse signal in real time and output the corresponding results, meeting the application requirements with high real-time requirements.

[0078] In an embodiment of the present disclosure, referring to Figure 2 , the first preprocessing module 13 includes a first high-speed sampling A / D circuit 301;

[0079] The high-speed sampling A / D circuit is configured to collect the amplitude of the pulse signal.

[0080] In this embodiment, the high-speed sampling A / D circuit is an indispensable key component in pulse signal processing. Its main function is to convert the input continuous analog pulse signal into a discrete digital signal for subsequent digital processing and analysis. Specifically, the high-speed sampling A / D circuit captures the amplitude of the pulse signal in real time at an extremely high sampling rate, ensuring that every subtle change in the signal is captured within an extremely short time.

[0081] This high-speed sampling function has significant beneficial effects on pulse width detection. First of all, it can accurately capture the amplitude information of the pulse signal, providing an accurate data basis for subsequent pulse width calculation. Secondly, due to the real-time nature of the high-speed sampling A / D circuit, it can sample immediately when the pulse signal appears, ensuring a fast response and timely processing of the signal. In addition, the high-precision characteristic of the high-speed sampling A / D circuit also guarantees the accuracy of the sampling result, thereby improving the performance of the entire pulse width detection system.

[0082] In an embodiment of the present disclosure, refer to Figure 2 and Figure 4 , the second preprocessing module 14 includes:

[0083] The second high-speed sampling A / D circuit 402, the signal amplification and limiting circuit 401;

[0084] The signal amplification and limiting circuit 401 is connected to the second high-speed sampling A / D circuit 402;

[0085] The signal amplification and limiting circuit 401 includes:

[0086] Amplifiers U2, U3, resistors R5, R6, R7, R8, R9, R10, diodes D1, D2, D3, and D4;

[0087] The 5th terminal of amplifier U2 is connected to the second terminal of resistor R5. The 6th terminal of amplifier U2 is respectively connected to the second terminal of resistor R6 and the first terminal of resistor R7. The 7th terminal of amplifier U2 is respectively connected to the first terminal of resistor R6, the first terminal of resistor R8, the negative electrode of diode D1, and the positive electrode of diode D2;

[0088] The 5th terminal of amplifier U3 is connected to the second terminal of resistor R8. The 6th terminal of amplifier U3 is respectively connected to the second terminal of resistor R9 and the first terminal of resistor R10. The 7th terminal of amplifier U3 is respectively connected to the first terminal of resistor R9, the positive electrode of diode D3, the positive electrode of diode D4, and output Vout2;

[0089] The first end of resistor R5 is connected to input Vin2. The second end of resistor R7 and the cathode of diode D2 are both connected to GND. The second end of resistor R10 and the cathode of diode D4 are both connected to GND. The anode of diode D1 is connected to -VCC, and the cathode of diode D3 is connected to VCC.

[0090] In this embodiment, the pulse signal enters from input terminal Vin2 and first passes through resistor R5 to enter the signal amplification and limiting circuit 401. The signal first undergoes preliminary amplification by amplifier U2. Resistors R6 and R7 form the feedback network of amplifier U2 for setting the amplification factor. Diodes D1 and D2 act as protection diodes to ensure that the input and output of amplifier U2 are within a safe voltage range.

[0091] The signal after preliminary amplification enters amplifier U3 for secondary amplification. Resistors R9 and R10 similarly form the feedback network of amplifier U3 for setting the magnification of the second amplification. Diodes D3 and D4 play a role in limiting the amplitude here to ensure that the output signal does not exceed the set maximum and minimum voltage values (determined by VCC and -VCC). The signal after amplification and amplitude limiting is output from the output terminal Vout2 of amplifier U3 and is ready to be sent to the second high-speed sampling A / D circuit 402 for digital processing.

[0092] The second high-speed sampling A / D circuit 402 receives the output signal from the signal amplification and limiting circuit 401 and converts it into a digital signal. This digital signal can be sent to the subsequent pulse width detection module 15 or other digital processing systems.

[0093] From the above, it can be concluded that the second preprocessing module 14 in the present disclosure significantly improves the efficiency and accuracy of pulse signal processing by combining the second high-speed sampling A / D circuit 402 and the signal amplification and limiting circuit 401. The signal amplification and limiting circuit 401 amplifies the signal through two-stage amplifiers and uses diodes to achieve signal amplitude limiting, effectively preventing signal distortion and damage. The high-speed sampling A / D circuit ensures the rapidity and accuracy of signal conversion, providing a reliable data basis for subsequent pulse width detection. The design of the entire module not only improves the performance of the system but also enhances the stability and reliability of the system.

[0094] In an embodiment of the present disclosure, refer to Figure 2 , the pulse width detection device further includes:

[0095] Filtering circuit 16;

[0096] The filtering circuit 16 is respectively connected to the first preprocessing module 13 and the second preprocessing module 14.

[0097] In this embodiment, a filter circuit 16 is introduced into the pulse width detection device, and the filter circuit 16 is connected to the first preprocessing module 13 and the second preprocessing module 14, with the following beneficial effects:

[0098] Improve signal quality: The filter circuit 16 can effectively remove high-frequency noise and stray interference in the pulse signal, making the signals output to the first preprocessing module 13 and the second preprocessing module 14 purer and more stable. This helps improve the accuracy of subsequent processing.

[0099] Enhance system reliability: By preprocessing the signal through the filter circuit 16, misjudgments or misoperations caused by noise and interference can be reduced, thereby enhancing the reliability and stability of the entire pulse width detection device.

[0100] Optimize system performance: The filter circuit 16 can improve the spectral characteristics of the signal, making the signal more in line with the requirements of the subsequent processing module. This helps optimize the performance of the entire system and improve the accuracy and efficiency of pulse width detection.

[0101] Adapt to complex environments: In practical applications, pulse signals are often affected by various complex environmental factors. By introducing the filter circuit 16, these complex environments can be better adapted, and the robustness and adaptability of the system can be improved.

[0102] In an embodiment of the present disclosure, referring to Figure 2 , the pulse width detection device further includes:

[0103] An alarm module 17;

[0104] The alarm module 17 is connected to the second preprocessing module 14.

[0105] In this embodiment, the alarm module 17 enables the pulse width detection device to immediately issue a warning signal when a pulse signal that does not meet the preset standard is detected. This can not only promptly alert the operator to abnormal situations but also avoid potential equipment damage or production accidents. In addition, the alarm module 17 also enhances the safety and reliability of the system and improves the automation and intelligence level of pulse width detection.

[0106] The above embodiments are only used to illustrate the technical solutions of the present disclosure and are not intended to limit them; although the present disclosure has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. A pulse width detection device, characterized in that, Including: A signal acquisition module, a switch module, a first preprocessing module, a second preprocessing module, and a pulse width detection module; The signal acquisition module is connected to the switch module, and the switch module is respectively connected to the first preprocessing module and the second preprocessing module; both the first preprocessing module and the second preprocessing module are connected to the pulse width detection module; The signal acquisition module is configured to acquire pulse signals; The first preprocessing module is configured to process signals with a data volume less than a preset value, and the second preprocessing module is configured to process signals with a data volume greater than the preset value; The pulse width detection module is configured to detect the width of pulse signals.

2. The pulse width detection device according to claim 1, characterized in that, The switch module includes a single-pole double-throw switch and a control unit; The control unit is connected to the signal acquisition module; The moving end of the single-pole double-throw switch is connected to the control unit, the first fixed end is connected to the first preprocessing module, and the second fixed end is connected to the second preprocessing module; The control unit is configured to control the working state of the single-pole double-throw switch according to the pulse signal data acquired by the signal acquisition module.

3. The pulse width detection device according to claim 1, wherein The pulse width detection module includes: Chip U1, capacitor C1, capacitor C2, capacitor C3, resistor R1, resistor R2, resistor R3, resistor R4, potentiometer P1, triode Q1, and triode Q2; For the chip U1, the first terminal GND is connected to the first terminal of the capacitor C3, the second terminal TRIG is respectively connected to the second terminal of the resistor R2 and the collector of the triode Q1, the third terminal OUT is connected to the first terminal of the resistor R4, the fourth terminal PST is respectively connected to the eighth terminal VCC of the chip U1, the first terminal of the potentiometer P1, the first terminal of the resistor R2, and the external power supply VCC, the fifth terminal CV is respectively connected to the second terminal of the capacitor C3, the second terminal of the capacitor C2, the emitter of the triode Q1, the second terminal of the capacitor R1, the emitter of the triode Q2, and the ground terminal GND, and the sixth terminal THRS is respectively connected to the seventh terminal DIS of the chip U1, the first terminal of the capacitor C2, and the second terminal of the potentiometer P1; The base of the triode Q1 is respectively connected to the second terminal of the capacitor C1 and the first terminal of the resistor R1, the base of the triode Q2 is connected to the second terminal of the resistor R4, and the collector of the triode Q2 is respectively connected to the output terminal Vout1 and the second terminal of the resistor R3; The first terminal of the capacitor C1 is respectively connected to the first terminal of the resistor R3 and the input terminal Vin1.

4. The pulse width detection device according to claim 3, wherein The pulse width detection module further includes a diode D5; The positive electrode of the diode D5 is connected to VCC, and the negative electrode of the diode D5 is respectively connected to the first terminal of the resistor R2, the first terminal of the potentiometer P1, the eighth terminal VCC of the chip U1, and the fourth terminal PST of the chip U1.

5. The pulse width detection device according to claim 1, wherein, The first preprocessing module includes a first high-speed sampling A / D circuit; The high-speed sampling A / D circuit is configured to acquire the amplitude of the pulse signal.

6. The pulse width detection device according to claim 1, characterized in that, The second preprocessing module includes: Second high-speed sampling A / D circuit, signal amplification and limiting circuit; The signal amplification and limiting circuit is connected to the second high-speed sampling A / D circuit; The signal amplification and limiting circuit includes: Amplifier U2, amplifier U3, resistor R5, resistor R6, resistor R7, resistor R8, resistor R9, resistor R10, diode D1, diode D2, diode D3 and diode D4; The 5th terminal of the amplifier U2 is connected to the second terminal of the resistor R5, the 6th terminal of the amplifier U2 is respectively connected to the second terminal of the resistor R6 and the first terminal of the resistor R7, and the 7th terminal of the amplifier U2 is respectively connected to the first terminal of the resistor R6, the first terminal of the resistor R8, the negative electrode of the diode D1 and the positive electrode of the diode D2; The 5th terminal of the amplifier U3 is connected to the second terminal of the resistor R8, the 6th terminal of the amplifier U3 is respectively connected to the second terminal of the resistor R9 and the first terminal of the resistor R10, and the 7th terminal of the amplifier U3 is respectively connected to the first terminal of the resistor R9, the positive electrode of the diode D3, the positive electrode of the diode D4 and the output Vout2; The first terminal of the resistor R5 is connected to the input Vin2, the second terminal of the resistor R7 and the negative electrode of the diode D2 are both connected to GND, the second terminal of the resistor R10 and the negative electrode of the diode D4 are both connected to GND, the positive electrode of the diode D1 is connected to -VCC, and the negative electrode of the diode D3 is connected to VCC.

7. The pulse width detection device according to claim 1, wherein It further includes: Filter circuit; The filter circuit is respectively connected to the first preprocessing module and the second preprocessing module.

8. The pulse width detection device according to claim 1, characterized in that, It further includes: Alarm module; The alarm module is connected to the second preprocessing module.

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