Portable alternating current charging pile test equipment

Abstract

The utility model belongs to the technical field of test equipment, and discloses portable alternating current charging pile test equipment, which comprises an alternating current charging pile tester, and a charging gun socket, a test circuit board and a load resistor are arranged on one side in the alternating current charging pile tester. The test circuit board comprises an AD sampling circuit and an ARM processor electrically connected with the AD sampling circuit. The AD sampling circuit is composed of a clamp voltage circuit, a measurement reference circuit, an LN voltage sampling circuit, an LN current sampling circuit, a CP voltage sampling circuit, a PWM waveform sampling circuit, a CC resistance sampling circuit, an AD data acquisition circuit and a test process control circuit. According to the utility model, all functions of testing the alternating current charging pile can be integrated on one testing device, the functions are comprehensive, the device is convenient to carry, and the device can be used for testing on a factory production line, can also be carried about, and is used for testing the charging pile on a charging pile working site.

Description

Technical Field

[0001] The utility model relates to the technical field of testing equipment, and particularly relates to a portable alternating current charging pile testing equipment. Background Art

[0002] The automatic testing of an alternating current charging pile refers to a series of tests on the alternating current charging pile through automated equipment to evaluate its corresponding performance and stability in different charging time sequences, as well as the timeliness and reliability of safety protection in case of charging anomalies.

[0003] Currently, the testing equipment on the market faces some challenges. First of all, many devices can either not test the performance and safety protection of the charging pile simultaneously, or although they can meet these testing requirements, the devices themselves are large and complex in volume, usually consisting of multiple parts, which makes the handling and operation of the devices inconvenient. This not only increases the complexity and cost of testing, but also is not conducive to on-site rapid detection and repair.

[0004] Therefore, how to provide a portable alternating current charging pile testing equipment is an urgent problem to be solved at present. Summary of the Utility Model

[0005] The embodiments of the utility model provide a portable alternating current charging pile testing equipment to solve the above technical problems in the prior art.

[0006] In order to have a basic understanding of some aspects of the disclosed embodiments, a simple summary is given below. This summary part is not a general review, nor is it to identify key / important constituent elements or delineate the protection scope of these embodiments. Its sole purpose is to present some concepts in a simple form as a preamble to the subsequent detailed description.

[0007] Therefore, the specific technical solution adopted by the utility model is as follows:

[0008] A portable AC charging pile testing device includes an AC charging pile tester. On one side inside the AC charging pile tester, there is a charging gun socket. On one side of the charging gun socket, there is a test circuit board, and beside the test circuit board, there is a load resistor. Among them, the test circuit board includes an AD sampling circuit and an ARM processor electrically connected thereto. The AD sampling circuit is composed of a clamping voltage circuit, a measurement reference circuit, an LN voltage sampling circuit, an LN current sampling circuit, a CP voltage sampling circuit, a PWM waveform sampling circuit, a CC resistance sampling circuit, an AD data acquisition circuit, and a test process control circuit. The output ends of the clamping voltage circuit and the measurement reference circuit are both electrically connected to the input ends of the LN voltage sampling circuit and the LN current sampling circuit. The output ends of the LN voltage sampling circuit, the LN current sampling circuit, the CP voltage sampling circuit, the PWM waveform sampling circuit, and the CC resistance sampling circuit are all electrically connected to the input end of the AD data acquisition circuit. The output end of the AD data acquisition circuit is electrically connected to the input end of the test process control circuit.

[0009] In one embodiment, the measurement reference circuit includes operational amplifier chips IC19, IC20, resistor R107, resistor R108, resistor R109, capacitor C73, capacitor C74, capacitor C75, capacitor C76, capacitor C77, capacitor C78, and capacitor CD100. Among them, the second pin of operational amplifier chip IC19 is respectively connected to one end of resistor R108 and the sixth pin of operational amplifier chip IC19. The third pin of operational amplifier chip IC19 is respectively connected to one end of resistor R107 and one end of capacitor CD100, and the other end of capacitor CD100 is grounded. The second pin of operational amplifier chip IC20 is respectively connected to one end of capacitor C78 and the sixth pin of operational amplifier chip IC20, and the other end of capacitor C78 is grounded. The third pin of operational amplifier chip IC20 is respectively connected to one end of capacitor C77, one end of resistor R109, and the other end of resistor R108, and the other end of resistor R109 and the other end of capacitor C77 are grounded. One end of capacitor C73 is respectively connected to one end of capacitor C74, the other end of resistor R107, the seventh pin of operational amplifier chip IC19, and the seventh pin of operational amplifier chip IC20. The other end of capacitor C73 is respectively connected to the other end of capacitor C74, one end of capacitor C75, and one end of capacitor C76 and is grounded. The other end of capacitor C75 is respectively connected to the other end of capacitor C76, the fourth pin of operational amplifier chip IC19, and the fourth pin of operational amplifier chip IC20.

[0010] In one embodiment, the CP voltage sampling circuit includes operational amplifier chips IC6, IC7, capacitor C22, capacitor C23, diode D15, diode D16, diode D29, resistor R43, resistor R44, resistor R45, resistor R46, resistor R47, resistor R48, resistor R49, resistor R50, resistor R51, resistor R52, resistor R53, resistor R54, resistor R55, resistor R56, resistor R57 and resistor R58; wherein, the second pin of operational amplifier chip IC6 is respectively connected to one end of resistor R54 and the sixth pin of operational amplifier chip IC6, the third pin of operational amplifier chip IC6 is respectively connected to the negative electrode of diode D29, one end of resistor R53 and one end of resistor R52, the positive electrode of diode D29 is connected to the other end of resistor R53 and grounded; the other end of resistor R52 is successively connected in series with resistor R51, resistor R50, resistor R49, resistor R48, resistor R47, resistor R46, resistor R45, resistor R44 and resistor R43, the other end of resistor R43 is connected to one end of capacitor C22, and the other end of capacitor C22 is connected to one end of resistor R55; the second pin of operational amplifier chip IC7 is respectively connected to the other end of resistor R55 and the other end of resistor R57, the third pin of operational amplifier chip IC7 is respectively connected to the other end of resistor R54 and one end of resistor R56, the other end of resistor R56 is grounded, and the sixth pin of operational amplifier chip IC7 is respectively connected to the other end of resistor R57 and one end of resistor R58; the other end of resistor R58 is respectively connected to one end of capacitor C23, the positive electrode of diode D15 and the negative electrode of diode D16, and the other end of capacitor C23 and the positive electrode of diode D16 are both grounded.

[0011] In one embodiment, the AD data acquisition circuit includes an operational amplifier chip IC4, a triode Q7, a triode Q8, an optocoupler U9, an optocoupler U10, an optocoupler U11, an optocoupler U12, a capacitor C11, a capacitor C12, a capacitor C13, a capacitor C14, a capacitor C15, a capacitor C16, a capacitor C17, a capacitor C18, a capacitor C19, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a resistor R39, a resistor R40, a resistor R41, and a resistor R42; wherein, the first pin of the operational amplifier chip IC4 is connected to one end of the resistor R38 and the sixth pin of the optocoupler U11 respectively, the second pin of the optocoupler U11 is connected to one end of the resistor R39, the seventh pin of the optocoupler U11 is connected to the eighth pin of the optocoupler U11, one end of the capacitor C13, and the other end of the resistor R38 respectively, and the other end of the capacitor C13 is grounded; the third pin of the operational amplifier chip IC4 is connected to one end of the resistor R34 and the sixth pin of the optocoupler U9 respectively, the second pin of the optocoupler U9 is connected to one end of the resistor R35, the seventh pin of the optocoupler U9 is connected to the eighth pin of the optocoupler U9, one end of the capacitor C11, and the other end of the resistor R34 respectively, and the other end of the capacitor C11 is grounded; the fifth pin of the operational amplifier chip IC4 is connected to one end of the resistor R40, the other end of the resistor R40 is connected to the base of the triode Q7 and the base of the triode Q8 respectively, the emitter of the triode Q7 is connected to the emitter of the triode Q8 and the third pin of the optocoupler U12 respectively, the collector of the triode Q8 is grounded, the collector of the triode Q7 is connected to one end of the resistor R41, the other end of the resistor R41 is connected to the second pin of the optocoupler U12, the fifth pin of the optocoupler U12 is connected to one end of the capacitor C14 and grounded, the sixth pin of the optocoupler U12 is connected to one end of the resistor R42, and the other end of the resistor R42 is connected to the other end of the capacitor C14, the seventh pin, and the eighth pin of the optocoupler U12 respectively; the eighth pin of the operational amplifier chip IC4 is connected to one end of the resistor R36 and the sixth pin of the optocoupler U10 respectively, the second pin of the optocoupler U10 is connected to one end of the resistor R37, the seventh pin of the optocoupler U10 is connected to the eighth pin of the optocoupler U10, one end of the capacitor C12, and the other end of the resistor R36 respectively, and the other end of the capacitor C12 is grounded.

[0012] In one embodiment, the test process control circuit includes a Darlington transistor array U3, a Darlington transistor array U4, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R9, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R145, a resistor R146, a resistor R147, a resistor R148, a resistor R149, a diode D1, a diode D2, a diode D3, a diode D4, a diode D5, a diode D6, a diode D7, a diode D9, a diode D17, a light-emitting diode LED1, a light-emitting diode LED2, a light-emitting diode LED3, a light-emitting diode LED4, a light-emitting diode LED5, a light-emitting diode LED6, a light-emitting diode LED7, a light-emitting diode LED9, a relay RY1, a relay RY2, a relay RY3, a relay RY4, a relay RY5, a relay RY6, a relay RY7, and a relay RY9; wherein, the twelfth pin of the Darlington transistor array U4 is respectively connected to one end of the resistor R1, the positive electrode of the diode D1, and the second pin of the relay RY1, the other end of the resistor R1 is connected to the negative electrode of the light-emitting diode LED1, and the positive electrode of the light-emitting diode LED1 is respectively connected to the negative electrode of the diode D1 and the first pin of the relay RY1; the thirteenth pin of the Darlington transistor array U4 is respectively connected to one end of the resistor R2, the positive electrode of the diode D2, and the second pin of the relay RY2, the other end of the resistor R2 is connected to the negative electrode of the light-emitting diode LED2, and the positive electrode of the light-emitting diode LED2 is respectively connected to the negative electrode of the diode D2 and the first pin of the relay RY2, the third pin of the relay RY2 is connected to the positive electrode of the diode D17, and the negative electrode of the diode D17 is respectively connected to one end of the resistor R15 and one end of the resistor R16; the fourteenth pin of the Darlington transistor array U4 is respectively connected to one end of the resistor R3, the positive electrode of the diode D3, and the second pin of the relay RY3, the other end of the resistor R3 is connected to the negative electrode of the light-emitting diode LED3, and the positive electrode of the light-emitting diode LED3 is respectively connected to the negative electrode of the diode D3 and the first pin of the relay RY3; the fifteenth pin of the Darlington transistor array U4 is respectively connected to one end of the resistor R4, the positive electrode of the diode D4, and the second pin of the relay RY4, the other end of the resistor R4 is connected to the negative electrode of the light-emitting diode LED4, and the positive electrode of the light-emitting diode LED4 is respectively connected to the negative electrode of the diode D4 and the first pin of the relay RY4, the fourth pin of the relay RY4 is respectively connected to the other end of the resistor R16 and one end of the resistor R146;The sixteenth pin of the Darlington transistor array U4 is respectively connected to one end of the resistor R5, the positive electrode of the diode D5 and the second pin of the relay RY5. The other end of the resistor R5 is connected to the negative electrode of the light-emitting diode LED5. The positive electrode of the light-emitting diode LED5 is respectively connected to the negative electrode of the diode D5 and the first pin of the relay RY5. The fourth pin of the relay RY5 is connected to the other end of the resistor R15. The tenth pin of the Darlington transistor array U3 is respectively connected to one end of the resistor R6, the positive electrode of the diode D6 and the second pin of the relay RY6. The other end of the resistor R6 is connected to the negative electrode of the light-emitting diode LED6. The positive electrode of the light-emitting diode LED6 is respectively connected to the negative electrode of the diode D6 and the first pin of the relay RY6. The fourth pin of the relay RY1 is respectively connected to one end of the resistor R18, one end of the resistor R145 and one end of the resistor R17. The other end of the resistor R17 is respectively connected to the other end of the resistor R146 and the other end of the resistor R145. The eleventh pin of the Darlington transistor array U3 is respectively connected to one end of the resistor R7, the positive electrode of the diode D7 and the second pin of the relay RY7. The other end of the resistor R7 is connected to the negative electrode of the light-emitting diode LED7. The positive electrode of the light-emitting diode LED7 is respectively connected to the negative electrode of the diode D7 and the first pin of the relay RY7. The fourth pin of the relay RY7 is connected to the other end of the resistor R18. The thirteenth pin of the Darlington transistor array U3 is respectively connected to one end of the resistor R9, the positive electrode of the diode D9 and the second pin of the relay RY9. The other end of the resistor R9 is connected to the negative electrode of the light-emitting diode LED9. The positive electrode of the light-emitting diode LED9 is respectively connected to the negative electrode of the diode D9 and the first pin of the relay RY9. The fourth pin of the relay RY9 is connected to one end of the resistor R147. The other end of the resistor R147 is connected to one end of the resistor R148. The other end of the resistor R148 is connected to one end of the resistor R149.;

[0013] In one embodiment, the chip model of the ARM processor is STM32F207Z.

[0014] The technical solution provided by the embodiment of the present utility model may include the following beneficial effects:

[0015] 1) The present utility model can integrate all the functions for testing AC charging piles into one test device. It has comprehensive functions and is easy to carry. The overall size of the device is only 440×88×398mm, and the weight is about 5kg. It can be used for testing on the factory production line or carried with you to test the charging pile at the working site of the charging pile.

[0016] 2) The utility model can test the corresponding performance and stability of the charging pile at different charging time sequences, including connection confirmation test, charging readiness test, start and charging stage test, normal charging end test, charging connection control time sequence test, and measure and judge the charging voltage, charging current, CP voltage, CC resistance, and PWM duty cycle during the test process; it can also simulate the state when a fault occurs during the charging process and detect the timeliness and reliability of the safety protection of the AC charging pile, including CP disconnection test, CP grounding test, loss of protective grounding continuity test, disconnecting switch S2 test, and CP overlimit test.

[0017] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the utility model. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The drawings here are incorporated into the specification and form a part of this specification, showing embodiments in line with the utility model, and are used together with the specification to explain the principle of the utility model.

[0019] Figure 1 is a schematic diagram of the principle of a portable AC charging pile testing device shown according to an exemplary embodiment;

[0020] Figure 2 is a test flow chart of a portable AC charging pile testing device shown according to an exemplary embodiment;

[0021] Figure 3 is a circuit diagram of a clamping voltage circuit in a portable AC charging pile testing device shown according to an exemplary embodiment;

[0022] Figure 4 is a circuit diagram of a measurement reference circuit in a portable AC charging pile testing device shown according to an exemplary embodiment;

[0023] Figure 5 is a circuit diagram of an LN voltage sampling circuit in a portable AC charging pile testing device shown according to an exemplary embodiment;

[0024] Figure 6 is a circuit diagram of an LN current sampling circuit in a portable AC charging pile testing device shown according to an exemplary embodiment;

[0025] Figure 7 is a circuit diagram of a CP voltage sampling circuit in a portable AC charging pile testing device shown according to an exemplary embodiment;

[0026] Figure 8 is a circuit diagram of a PWM waveform sampling circuit in a portable AC charging pile testing device shown according to an exemplary embodiment;

[0027] Figure 9 It is a circuit diagram of the CC resistor sampling circuit in the portable AC charging pile test device shown according to an exemplary embodiment;

[0028] Figure 10 It is a circuit diagram of the AD data acquisition circuit in the portable AC charging pile test device shown according to an exemplary embodiment;

[0029] Figure 11 It is a circuit diagram of the test process control circuit in the portable AC charging pile test device shown according to an exemplary embodiment.

[0030] In the figure:

[0031] 1. AC charging pile tester; 11. Charging gun socket; 12. Test circuit board; 121. AD sampling circuit; 122. ARM processor; 13. Load resistor. Detailed implementation manners

[0032] The following description and drawings fully illustrate the specific implementation manners herein, enabling those skilled in the art to practice them. Parts and features of some embodiments may be included in or replace parts and features of other embodiments. The scope of the embodiments herein includes the entire scope of the claims and all available equivalents of the claims. Herein, terms such as "first" and "second" are only used to distinguish one element from another, without requiring or implying any actual relationship or order between these elements. In fact, the first element can also be called the second element, and vice versa. Moreover, the term "including", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, such that a structure, device or equipment including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or elements inherent to such structure, device or equipment. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of another identical element in the structure, device or equipment including the said element. The embodiments herein are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other.

[0033] The terms "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. in this text indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. They are only for the convenience of describing this text and simplifying the description, rather than indicating or implying that the indicated device or element must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to the present utility model. In the description of this text, unless otherwise specified and defined, the terms "installed", "connected", and "coupled" should be understood in a broad sense. For example, it can be a mechanical connection or an electrical connection, or it can be the communication inside two elements. It can be directly connected or indirectly connected through an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms can be understood according to specific circumstances.

[0034] In this text, unless otherwise stated, the term "a plurality of" means two or more.

[0035] Without conflict, the embodiments in the present utility model and the features in the embodiments can be combined with each other.

[0036] Figures 1-11 An embodiment of a portable AC charging pile testing device of the present utility model is shown.

[0037] In this alternative embodiment, the portable AC charging pile testing device includes an AC charging pile tester 1 connected to the charging gun on the AC charging pile to be tested. On one side inside the AC charging pile tester 1, there is a charging gun socket 11 (specifically, the charging gun socket is a national standard 7-hole charging gun socket). On one side of the charging gun socket 11, there is a test circuit board 12, and beside the test circuit board 12, there is a load resistor 13. In addition, the portable AC charging pile testing device also includes an LED screen. According to GB / T18487.1-2023 and GB / T34657.1-2017, the present utility model can test the corresponding performance and stability of the charging pile at different charging time sequences, including connection confirmation test, charging readiness test, start and charging stage test, normal charging end test, charging connection control time sequence test, and measure the charging voltage, charging current, CP voltage, CC resistance, and PWM duty cycle during the test process and make a determination. It can also simulate the state when a fault occurs during the charging process and detect the timeliness and reliability of the safety protection of the AC charging pile, including CP disconnection test, CP grounding test, loss of protective grounding continuity test, disconnecting switch S2 test, CP overlimit test. The test circuit board takes the STM series single-chip microcomputer as the core, adjusts the magnitude of the CP voltage by changing the CP voltage division ratio, and then controls the charging pile to make corresponding responses. The test circuit board adopts a direct sampling technology, samples the charging voltage, charging current, CP voltage, CC resistance, and PWM duty cycle through a sampling circuit, and then makes a determination on these data. The present utility model is small and portable, with the total size of the device being only 440×88×398mm and the weight being about 5kg, and it can be carried around completely.

[0038] Specifically, the test circuit board 12 includes an AD sampling circuit 121 and an ARM processor 122 electrically connected thereto; the AD sampling circuit 121 is composed of a clamping voltage circuit, a measurement reference circuit, an LN voltage sampling circuit, an LN current sampling circuit, a CP voltage sampling circuit, a PWM waveform sampling circuit, a CC resistance sampling circuit, an AD data acquisition circuit, and a test process control circuit; the output terminals of the clamping voltage circuit and the measurement reference circuit are electrically connected to the input terminals of the LN voltage sampling circuit and the LN current sampling circuit; the output terminals of the LN voltage sampling circuit, the LN current sampling circuit, the CP voltage sampling circuit, the PWM waveform sampling circuit, and the CC resistance sampling circuit are electrically connected to the input terminal of the AD data acquisition circuit; the output terminal of the AD data acquisition circuit is electrically connected to the input terminal of the test process control circuit.

[0039] The 2.7V and 0.38V finally obtained by the clamping voltage circuit are connected to the LN voltage sampling circuit and the LN current sampling circuit as the clamping voltages of the final output signals of these two sampling circuits. The 0.75V finally obtained by the measurement reference circuit is also connected to the LN voltage sampling circuit and the LN current sampling circuit as the positive-phase input voltage of the in-phase amplification circuit in these two sampling circuits. After receiving signals from the charging gun socket, the five sampling circuits, namely the LN voltage sampling circuit, the LN current sampling circuit, the CP voltage sampling circuit, the PWM waveform sampling circuit, and the CC resistance sampling circuit, transmit the signals into the AD chip (IC4) in the AD data acquisition circuit after a series of processing. After the AD data acquisition circuit collects the data collected by the above five sampling circuits, it processes the data and transmits it into the ARM processor. The test process control circuit is directly controlled by the ARM processor, and the test process is controlled through this circuit to make the charging pile in different working states. The ARM processor uses the STM32F207Z chip.

[0040] Among them, the clamping voltage circuit: divides the voltage VCC through resistors to obtain 2.7V and 0.38V, and then inputs the voltages at these two points into the follower circuits composed of operational amplifiers IC17 and IC18 for voltage isolation, thus obtaining the two clamping voltages Vth-H (2.7V) and Vth-L (0.38V) required for the LN voltage and LN current sampling circuits.

[0041] The measurement reference circuit: first isolates the +5V_AD voltage signal through the follower circuit composed of operational amplifier IC19, then obtains 0.75V through resistor voltage division, and then inputs this voltage into the follower circuit composed of operational amplifier IC20 for voltage isolation, thus obtaining the measurement reference 0.75V required for the LN voltage and LN current sampling circuits.

[0042] LN Voltage Sampling: After the LN voltage enters the test circuit through the J6 socket, it is first filtered by Y capacitors C41, C42, X capacitor C43 and common-mode inductor L5. Then, it is converted into a small voltage signal U0+ by the voltage transformer PT1 at a ratio of 300:1. After that, it is divided by 1 / 2 through resistors R81 and R82. Then, U0 / 2 undergoes voltage isolation through the follower circuit composed of operational amplifier IC9. After that, the voltage signal is divided into two paths. One path passes through the inverting amplifier circuit (amplification factor is 1:-10) composed of operational amplifier IC10 and the non-inverting amplifier circuit (amplification relationship is Vout = 1.5V - Vin) composed of operational amplifier IC11. Then, it passes through the RC filter circuit composed of resistor R88 and capacitor C50 and the voltage clamping circuit composed of diodes D19 and D20. Finally, the IIN2-L signal enters the AD chip through the twelfth pin, undergoes analog-to-digital conversion, and is finally transmitted to the ARM chip. The other path passes through the non-inverting amplifier circuit (amplification relationship is Vout = 1.5V - Vin) composed of operational amplifier IC12. Then, it passes through the RC filter circuit composed of resistor R91 and capacitor C53 and the voltage clamping circuit composed of diodes D21 and D22. Finally, the IIN2-H signal enters the AD chip through the eleventh pin, undergoes analog-to-digital conversion, and is finally transmitted to the ARM chip. When the LN voltage U ∈ [-72V, 72V], the signal collected by the ARM chip is from the IIN2-L pin, which is the low-grade voltage. When the LN voltage U ∈ [-300V, -72V) ∪ (72V, 300V], the signal collected by the ARM chip is from the IIN2-H pin, which is the high-grade voltage.

[0043] LN Current Sampling: After the LN current enters the tester, it first passes through the current transformer CT1 to convert the large current signal into a small current signal according to the ratio of 40A:2mA. Then the small current signal flows through the resistor R111 to be converted into a voltage signal, and then undergoes voltage isolation through the follower circuit formed by the operational amplifier IC13. After that, this voltage signal is divided into two paths. One path passes through the inverting amplifier circuit (amplification factor of 1:-10) formed by the operational amplifier IC14 and the non-inverting amplifier circuit (amplification relationship of Vout = 1.5V - Vin) formed by the operational amplifier IC15. Then it passes through the RC filter circuit composed of the resistor R98 and the capacitor C61 and the voltage clamping circuit composed of the diodes D23 and D24. Finally, the IIN-L signal enters the AD chip through the tenth pin, undergoes analog-to-digital conversion, and is ultimately transmitted to the ARM chip. The other path passes through the non-inverting amplifier circuit (amplification relationship of Vout = 1.5V - Vin) formed by the operational amplifier IC16. Then it passes through the RC filter circuit composed of the resistor R101 and the capacitor C64 and the voltage clamping circuit composed of the diodes D25 and D26. Finally, the IIN-H signal enters the AD chip through the ninth pin, undergoes analog-to-digital conversion, and is ultimately transmitted to the ARM chip. When the LN current I ∈ [-10A, 10A], the signal collected by the ARM chip is the one transmitted from the IIN-L pin, which is the low-range current. When the LN current I ∈ [-40A, -10A) ∪ (10A, 40A], the signal collected by the ARM chip is the one transmitted from the IIN-H pin, which is the high-range current.

[0044] CP Voltage Sampling: After the CP voltage enters the tester, it first passes through the capacitor C22 for filtering, then through the voltage division circuit composed of resistors. Then the voltage across R53 undergoes voltage isolation through the follower circuit formed by the operational amplifier IC6, and then through the differential amplifier circuit (amplification factor of 1:

[0045] 2) formed by the operational amplifier IC7. Then it passes through the RC filter circuit composed of the resistor R58 and the capacitor C23 and the voltage clamping circuit composed of the diodes D15 and D16. Finally, the UAD1 signal enters the AD chip through the fifteenth pin, undergoes analog-to-digital conversion, and is ultimately transmitted to the ARM chip.

[0046] PWM waveform sampling: When the CP voltage is greater than 0.7V, the base-emitter voltage of transistor Q11 is greater than its conduction voltage, so transistor Q11 conducts. Since its emitter is grounded at 0V, its collector voltage is approximately 0.3V. Because the collector of transistor Q11 is connected to the base of transistor Q12, the base of transistor Q12 is also 0.3V. Its emitter is grounded. Since the base-emitter voltage is less than 0.7V, transistor Q12 does not conduct, and its collector is at a high level. Because the collector of transistor Q12 is connected to the PE13 pin, the PE13 pin is at a high level at this time. For the other circuit, when the CP voltage is greater than 0.7V, the base-emitter voltage of transistor Q13 is greater than its conduction voltage, so transistor Q13 conducts. Since its emitter is grounded, its collector is at a low level. Because the collector of transistor Q13 is connected to the PE11 pin, the PE11 pin is at a low level at this time. When the CP voltage is less than 0.7V, the base-emitter voltage of transistor Q11 is less than its conduction voltage, so transistor Q11 does not conduct. At this time, the collector of transistor Q11 is connected to the base of transistor Q12 and connected to +5V through resistor R140. So the base of transistor Q12 is at a high level at this time, its emitter is grounded and at a low level, and the base-emitter voltage is greater than 0.7V. So transistor Q12 conducts at this time, and its collector is at a low level. Because the collector of transistor Q12 is connected to the PE13 pin, the PE13 pin is at a low level at this time. For the other circuit, when the CP voltage is less than 0.7V, the base-emitter voltage of transistor Q13 is less than its conduction voltage, so transistor Q13 does not conduct. At this time, the collector of transistor Q13 is connected to the PE11 pin and connected to +5V through resistor R143. So the PE11 pin is at a high level at this time. The PE13 pin and the PE11 pin are directly connected to the ARM chip. The ARM chip calculates the duty cycle of the CP signal by sampling the high and low levels.

[0047] CC resistor sampling: The RX3 resistor inside the tester and the CC resistor inside the charging pile divide the voltage VCC. The voltage across the CC resistor is first filtered by capacitors C103 and C104, and then undergoes voltage isolation through the follower circuit composed of operational amplifier IC5. After that, the CC-R signal enters the AD chip from the fourteenth pin, undergoes analog-to-digital conversion, and finally is transmitted to the ARM chip.

[0048] AD Data Acquisition Circuit: The data collected by the four sampling circuits of LN voltage, LN current, CP voltage, and CC resistance will finally be transmitted into the AD chip IC4 from six pins, namely pin 11 and pin 12, pin 9 and pin 10, pin 15, and pin 14 respectively. There are 3 control signals for this AD chip, which are pin 1, pin 3, and pin 8 respectively. These 3 control signals are all sent by the ARM chip and are transmitted into the AD chip after being isolated by optocouplers U9, U10, and U11 to control its operation. Pin 5 is the output pin of the AD chip. The analog signal received by the AD chip will be converted into a digital signal and output through pin 5, and then transmitted to the ARM chip for data processing after being isolated by optocoupler U12. Pin 3 of optocouplers U9, U10, and U11 is the control signal input pin, and pin 6 is the signal output pin. When the ARM chip inputs a high level, the optocoupler is not triggered and there is no signal output. Pin 6 is at a high level due to the existence of the pull-up resistor. When the ARM chip inputs a low level, the optocoupler is triggered and pin 6 outputs a low level. Pin 3 of optocoupler U12 is the control signal input pin, and pin 6 is the signal output pin. When the AD chip inputs a high level, the base voltage of transistor Q7 is greater than the conduction voltage, and the transistor conducts. Due to the conduction voltage drop of the transistor, the emitter voltage of transistor Q8 is less than its base voltage, so transistor Q8 does not conduct. At this time, pin 3 of optocoupler U12 is at a high level, the optocoupler is not triggered, and there is no signal output. Pin 6 is at a high level due to the existence of the pull-up resistor. When the AD chip inputs a low level, the base voltage of transistor Q7 is less than the conduction voltage, and transistor Q7 does not conduct. Since the emitter voltage of transistor Q8 is greater than its base voltage, transistor Q8 conducts, and its emitter is connected to the collector and grounded. At this time, pin 3 of optocoupler U12 is at a low level, the optocoupler is triggered, and pin 6 outputs a low level.

[0049] Test Process Control Circuit: U3 and U4 are two Darlington transistor arrays. The control signals sent by the ARM chip are input into them and then converted into opposite-level outputs to the control pins of each relay, thereby controlling the turn-off and suction of each relay.

[0050] Connection Confirmation Test: When conducting this test, relays RY1 and RY3 are closed, and it is determined whether the connection is correct by detecting whether the CC resistance is 220Ω.

[0051] Charge Ready Test: When conducting this test, relays RY1, RY2, RY3, and RY6 are closed. The CP voltage is divided by RY6 to make the CP voltage become 9V, and it is determined whether it is ready by detecting whether the CP voltage is 9V.

[0052] Startup and charging phase test: When conducting this test, relays RY1, RY2, RY3, RY5, and RY6 are closed. The CP voltage is divided through RY5 and RY6, making the CP voltage become 6V. It is determined that startup and charging are in progress by detecting whether the CP voltage is 6V and whether the LN voltage is 220V.

[0053] Normal charging end test: When conducting this test, relays RY1 and RY3 are closed, and the CP voltage is not divided. It is determined whether charging has ended by detecting whether the CP voltage is 12V and whether the LN voltage is 0V.

[0054] Charging connection control timing test: This test is to detect whether the change times of the LN voltage and the CP voltage meet the national standard requirements, including ① the time from when the ARM issues an instruction to when the CP voltage changes from 12V to 9V in the connection confirmation state; ② the time from when the ARM issues an instruction to when the CP voltage changes from 9V to 6V in the charging ready state; ③ the time from when the ARM issues an instruction to when the CP voltage changes from 6V to 9V in the charging state; ④ the time from when the CP voltage becomes 6V to when the LN voltage becomes 220V in the charging ready state; ⑤ the time from when the CP voltage becomes 9V to when the LN voltage becomes 0V in the charging state.

[0055] CP disconnection test: When conducting this test, relay RY2 is disconnected to simulate the occurrence of a CP disconnection abnormality, and the timeliness and reliability of the safety protection of the charging pile when charging abnormalities occur are detected.

[0056] CP grounding test: When conducting this test, relay RY4 is pulled in to simulate the occurrence of a CP grounding abnormality, and the timeliness and reliability of the safety protection of the charging pile when charging abnormalities occur are detected.

[0057] Protective grounding continuity loss test: When conducting this test, relay RY3 is disconnected to simulate the occurrence of a PE disconnection abnormality, and the timeliness and reliability of the safety protection of the charging pile when charging abnormalities occur are detected.

[0058] Disconnect switch S2 test: When conducting this test, relay RY5 is disconnected to simulate the occurrence of a switch S2 disconnection abnormality, and the timeliness and reliability of the safety protection of the charging pile when charging abnormalities occur are detected.

[0059] CP over - upper - limit test: When conducting this test in the charging ready state, the relay changes from RY6 being pulled in to RY7 being pulled in; when conducting this test in the charging state, the relay changes from RY6 being pulled in to RY7 and RY9 being pulled in to simulate the occurrence of a CP voltage over - upper - limit abnormality, and the timeliness and reliability of the safety protection of the charging pile when charging abnormalities occur are detected.

[0060] CP out-of-lower-limit test: This test is carried out in the charging ready state and the charging state. In both cases, the relay changes from the closure of RY6 to the closure of RY4 and RY6, simulating the occurrence of the abnormal situation that the CP voltage is out of the lower limit, and detecting the timeliness and reliability of the safety protection of the charging pile when charging anomalies occur.

[0061] In this alternative embodiment, the measurement reference circuit includes operational amplifier chips IC19, IC20, resistor R107, resistor R108, resistor R109, capacitor C73, capacitor C74, capacitor C75, capacitor C76, capacitor C77, capacitor C78, and capacitor CD100. Among them, the second pin of operational amplifier chip IC19 is respectively connected to one end of resistor R108 and the sixth pin of operational amplifier chip IC19. The third pin of operational amplifier chip IC19 is respectively connected to one end of resistor R107 and one end of capacitor CD100, and the other end of capacitor CD100 is grounded. The second pin of operational amplifier chip IC20 is respectively connected to one end of capacitor C78 and the sixth pin of operational amplifier chip IC20, and the other end of capacitor C78 is grounded. The third pin of operational amplifier chip IC20 is respectively connected to one end of capacitor C77, one end of resistor R109, and the other end of resistor R108, and the other end of resistor R109 and the other end of capacitor C77 are grounded. One end of capacitor C73 is respectively connected to one end of capacitor C74, the other end of resistor R107, the seventh pin of operational amplifier chip IC19, and the seventh pin of operational amplifier chip IC20. The other end of capacitor C73 is respectively connected to the other end of capacitor C74, one end of capacitor C75, and one end of capacitor C76 and is grounded. The other end of capacitor C75 is respectively connected to the other end of capacitor C76, the fourth pin of operational amplifier chip IC19, and the fourth pin of operational amplifier chip IC20.

[0062] In this alternative embodiment, the CP voltage sampling circuit includes operational amplifier chips IC6, IC7, capacitors C22, C23, diodes D15, D16, D29, resistors R43, R44, R45, R46, R47, R48, R49, R50, R51, R52, R53, R54, R55, R56, R57, and R58. Among them, the second pin of operational amplifier chip IC6 is respectively connected to one end of resistor R54 and the sixth pin of operational amplifier chip IC6. The third pin of operational amplifier chip IC6 is respectively connected to the negative electrode of diode D29, one end of resistor R53, and one end of resistor R52. The positive electrode of diode D29 is connected to the other end of resistor R53 and grounded. The other end of resistor R52 is successively connected in series with resistors R51, R50, R49, R48, R47, R46, R45, R44, and R43. The other end of resistor R43 is connected to one end of capacitor C22, and the other end of capacitor C22 is connected to one end of resistor R55. The second pin of operational amplifier chip IC7 is respectively connected to the other end of resistor R55 and the other end of resistor R57. The third pin of operational amplifier chip IC7 is respectively connected to the other end of resistor R54 and one end of resistor R56. The other end of resistor R56 is grounded. The sixth pin of operational amplifier chip IC7 is respectively connected to the other end of resistor R57 and one end of resistor R58. The other end of resistor R58 is respectively connected to one end of capacitor C23, the positive electrode of diode D15, and the negative electrode of diode D16. The other end of capacitor C23 and the positive electrode of diode D16 are both grounded.

[0063] In this alternative embodiment, the AD data acquisition circuit includes an operational amplifier chip IC4, a triode Q7, a triode Q8, an optocoupler U9, an optocoupler U10, an optocoupler U11, an optocoupler U12, capacitors C11, C12, C13, C14, C15, C16, C17, C18, C19, resistors R34, R35, R36, R37, R38, R39, R40, R41 and R42. Among them, the first pin of the operational amplifier chip IC4 is connected to one end of the resistor R38 and the sixth pin of the optocoupler U11 respectively. The second pin of the optocoupler U11 is connected to one end of the resistor R39. The seventh pin of the optocoupler U11 is connected to the eighth pin of the optocoupler U11, one end of the capacitor C13 and the other end of the resistor R38 respectively, and the other end of the capacitor C13 is grounded. The third pin of the operational amplifier chip IC4 is connected to one end of the resistor R34 and the sixth pin of the optocoupler U9 respectively. The second pin of the optocoupler U9 is connected to one end of the resistor R35. The seventh pin of the optocoupler U9 is connected to the eighth pin of the optocoupler U9, one end of the capacitor C11 and the other end of the resistor R34 respectively, and the other end of the capacitor C11 is grounded. The fifth pin of the operational amplifier chip IC4 is connected to one end of the resistor R40. The other end of the resistor R40 is connected to the base of the triode Q7 and the base of the triode Q8 respectively. The emitter of the triode Q7 is connected to the emitter of the triode Q8 and the third pin of the optocoupler U12 respectively. The collector of the triode Q8 is grounded. The collector of the triode Q7 is connected to one end of the resistor R41. The other end of the resistor R41 is connected to the second pin of the optocoupler U12. The fifth pin of the optocoupler U12 is connected to one end of the capacitor C14 and grounded. The sixth pin of the optocoupler U12 is connected to one end of the resistor R42. The other end of the resistor R42 is connected to the other end of the capacitor C14, the seventh pin and the eighth pin of the optocoupler U12 respectively. The eighth pin of the operational amplifier chip IC4 is connected to one end of the resistor R36 and the sixth pin of the optocoupler U10 respectively. The second pin of the optocoupler U10 is connected to one end of the resistor R37. The seventh pin of the optocoupler U10 is connected to the eighth pin of the optocoupler U10, one end of the capacitor C12 and the other end of the resistor R36 respectively, and the other end of the capacitor C12 is grounded.

[0064] In this alternative embodiment, the test process control circuit includes Darlington transistor arrays U3, U4, resistors R1, R2, R3, R4, R5, R6, R7, R9, R15, R16, R17, R18, R145, R146, R147, R148, R149, diodes D1, D2, D3, D4, D5, D6, D7, D9, D17, light-emitting diodes LED1, LED2, LED3, LED4, LED5, LED6, LED7, LED9, relays RY1, RY2, RY3, RY4, RY5, RY6, RY7 and RY9; wherein, the twelfth pin of Darlington transistor array U4 is respectively connected to one end of resistor R1, the positive electrode of diode D1 and the second pin of relay RY1, the other end of resistor R1 is connected to the negative electrode of light-emitting diode LED1, and the positive electrode of light-emitting diode LED1 is respectively connected to the negative electrode of diode D1 and the first pin of relay RY1; the thirteenth pin of Darlington transistor array U4 is respectively connected to one end of resistor R2, the positive electrode of diode D2 and the second pin of relay RY2, the other end of resistor R2 is connected to the negative electrode of light-emitting diode LED2, and the positive electrode of light-emitting diode LED2 is respectively connected to the negative electrode of diode D2 and the first pin of relay RY2, the third pin of relay RY2 is connected to the positive electrode of diode D17, and the negative electrode of diode D17 is respectively connected to one end of resistor R15 and one end of resistor R16; the fourteenth pin of Darlington transistor array U4 is respectively connected to one end of resistor R3, the positive electrode of diode D3 and the second pin of relay RY3, the other end of resistor R3 is connected to the negative electrode of light-emitting diode LED3, and the positive electrode of light-emitting diode LED3 is respectively connected to the negative electrode of diode D3 and the first pin of relay RY3; the fifteenth pin of Darlington transistor array U4 is respectively connected to one end of resistor R4, the positive electrode of diode D4 and the second pin of relay RY4, the other end of resistor R4 is connected to the negative electrode of light-emitting diode LED4, and the positive electrode of light-emitting diode LED4 is respectively connected to the negative electrode of diode D4 and the first pin of relay RY4, the fourth pin of relay RY4 is respectively connected to the other end of resistor R16 and one end of resistor R146;The sixteenth pin of the Darlington transistor array U4 is respectively connected to one end of the resistor R5, the positive electrode of the diode D5, and the second pin of the relay RY5. The other end of the resistor R5 is connected to the negative electrode of the light-emitting diode LED5. The positive electrode of the light-emitting diode LED5 is respectively connected to the negative electrode of the diode D5 and the first pin of the relay RY5. The fourth pin of the relay RY5 is connected to the other end of the resistor R15. The tenth pin of the Darlington transistor array U3 is respectively connected to one end of the resistor R6, the positive electrode of the diode D6, and the second pin of the relay RY6. The other end of the resistor R6 is connected to the negative electrode of the light-emitting diode LED6. The positive electrode of the light-emitting diode LED6 is respectively connected to the negative electrode of the diode D6 and the first pin of the relay RY6. The fourth pin of the relay RY1 is respectively connected to one end of the resistor R18, one end of the resistor R145, and one end of the resistor R17. The other end of the resistor R17 is respectively connected to the other end of the resistor R146 and the other end of the resistor R145. The eleventh pin of the Darlington transistor array U3 is respectively connected to one end of the resistor R7, the positive electrode of the diode D7, and the second pin of the relay RY7. The other end of the resistor R7 is connected to the negative electrode of the light-emitting diode LED7. The positive electrode of the light-emitting diode LED7 is respectively connected to the negative electrode of the diode D7 and the first pin of the relay RY7. The fourth pin of the relay RY7 is connected to the other end of the resistor R18. The thirteenth pin of the Darlington transistor array U3 is respectively connected to one end of the resistor R9, the positive electrode of the diode D9, and the second pin of the relay RY9. The other end of the resistor R9 is connected to the negative electrode of the light-emitting diode LED9. The positive electrode of the light-emitting diode LED9 is respectively connected to the negative electrode of the diode D9 and the first pin of the relay RY9. The fourth pin of the relay RY9 is connected to one end of the resistor R147. The other end of the resistor R147 is connected to one end of the resistor R148. The other end of the resistor R148 is connected to one end of the resistor R149.;

[0065] The present utility model is not limited to the structure already described and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the present utility model is only limited by the appended claims.

Claims

1. A portable AC charging pile testing device, including an AC charging pile tester (1), characterized in that, On one side inside the AC charging pile tester (1), there is a charging gun socket (11). On one side of the charging gun socket (11), there is a test circuit board (12). Beside the test circuit board (12), there is a load resistor (13). Among them, the test circuit board (12) includes an AD sampling circuit (121) and an ARM processor (122) electrically connected thereto. The AD sampling circuit (121) is composed of a clamping voltage circuit, a measurement reference circuit, an LN voltage sampling circuit, an LN current sampling circuit, a CP voltage sampling circuit, a PWM waveform sampling circuit, a CC resistor sampling circuit, an AD data acquisition circuit, and a test process control circuit. The output ends of the clamping voltage circuit and the measurement reference circuit are both electrically connected to the input ends of the LN voltage sampling circuit and the LN current sampling circuit. The output ends of the LN voltage sampling circuit, the LN current sampling circuit, the CP voltage sampling circuit, the PWM waveform sampling circuit, and the CC resistor sampling circuit are all electrically connected to the input end of the AD data acquisition circuit. The output end of the AD data acquisition circuit is electrically connected to the input end of the test process control circuit.

2. The portable AC charging pile testing device according to claim 1, wherein The measurement reference circuit includes an operational amplifier chip IC19, an operational amplifier chip IC20, a resistor R107, a resistor R108, a resistor R109, a capacitor C73, a capacitor C74, a capacitor C75, a capacitor C76, a capacitor C77, a capacitor C78, and a capacitor CD100. Among them, the second pin of the operational amplifier chip IC19 is respectively connected to one end of the resistor R108 and the sixth pin of the operational amplifier chip IC19. The third pin of the operational amplifier chip IC19 is respectively connected to one end of the resistor R107 and one end of the capacitor CD100. The other end of the capacitor CD100 is grounded. The second pin of the operational amplifier chip IC20 is respectively connected to one end of the capacitor C78 and the sixth pin of the operational amplifier chip IC20. The other end of the capacitor C78 is grounded. The third pin of the operational amplifier chip IC20 is respectively connected to one end of the capacitor C77, one end of the resistor R109, and the other end of the resistor R108. The other end of the resistor R109 and the other end of the capacitor C77 are grounded. One end of the capacitor C73 is respectively connected to one end of the capacitor C74, the other end of the resistor R107, the seventh pin of the operational amplifier chip IC19, and the seventh pin of the operational amplifier chip IC20. The other end of the capacitor C73 is respectively connected to the other end of the capacitor C74, one end of the capacitor C75, and one end of the capacitor C76 and is grounded. The other end of the capacitor C75 is respectively connected to the other end of the capacitor C76, the fourth pin of the operational amplifier chip IC19, and the fourth pin of the operational amplifier chip IC20.

3. The portable AC charging pile testing device according to claim 1, wherein, The CP voltage sampling circuit includes operational amplifier chips IC6, IC7, capacitor C22, capacitor C23, diodes D15, D16, D29, resistors R43, R44, R45, R46, R47, R48, R49, R50, R51, R52, R53, R54, R55, R56, R57 and R58; Among them, the second pin of the operational amplifier chip IC6 is respectively connected to one end of the resistor R54 and the sixth pin of the operational amplifier chip IC6. The third pin of the operational amplifier chip IC6 is respectively connected to the negative electrode of the diode D29, one end of the resistor R53 and one end of the resistor R52. The positive electrode of the diode D29 is connected to the other end of the resistor R53 and grounded; The other end of the resistor R52 is successively connected in series with the resistors R51, R50, R49, R48, R47, R46, R45, R44 and R43. The other end of the resistor R43 is connected to one end of the capacitor C22. The other end of the capacitor C22 is connected to one end of the resistor R55; The second pin of the operational amplifier chip IC7 is respectively connected to the other end of the resistor R55 and the other end of the resistor R57. The third pin of the operational amplifier chip IC7 is respectively connected to the other end of the resistor R54 and one end of the resistor R56. The other end of the resistor R56 is grounded. The sixth pin of the operational amplifier chip IC7 is respectively connected to the other end of the resistor R57 and one end of the resistor R58; The other end of the resistor R58 is respectively connected to one end of the capacitor C23, the positive electrode of the diode D15 and the negative electrode of the diode D16. The other end of the capacitor C23 and the positive electrode of the diode D16 are both grounded.

4. The portable AC charging pile testing device according to claim 1, wherein, The AD data acquisition circuit includes operational amplifier chip IC4, transistors Q7, Q8, optocouplers U9, U10, U11, U12, capacitors C11, C12, C13, C14, C15, C16, C17, C18, C19, resistors R34, R35, R36, R37, R38, R39, R40, R41 and R42; Among them, the first pin of the operational amplifier chip IC4 is respectively connected to one end of the resistor R38 and the sixth pin of the optocoupler U11. The second pin of the optocoupler U11 is connected to one end of the resistor R39. The seventh pin of the optocoupler U11 is respectively connected to the eighth pin of the optocoupler U11, one end of the capacitor C13 and the other end of the resistor R38. The other end of the capacitor C13 is grounded; The third pin of the operational amplifier chip IC4 is respectively connected to one end of the resistor R34 and the sixth pin of the optocoupler U9. The second pin of the optocoupler U9 is connected to one end of the resistor R35. The seventh pin of the optocoupler U9 is respectively connected to the eighth pin of the optocoupler U9, one end of the capacitor C11 and the other end of the resistor R34. The other end of the capacitor C11 is grounded; The fifth pin of the operational amplifier chip IC4 is connected to one end of the resistor R40. The other end of the resistor R40 is respectively connected to the base of the triode Q7 and the base of the triode Q8. The emitter of the triode Q7 is respectively connected to the emitter of the triode Q8 and the third pin of the optocoupler U12. The collector of the triode Q8 is grounded. The collector of the triode Q7 is connected to one end of the resistor R41. The other end of the resistor R41 is connected to the second pin of the optocoupler U12. The fifth pin of the optocoupler U12 is connected to one end of the capacitor C14 and grounded. The sixth pin of the optocoupler U12 is connected to one end of the resistor R42. The other end of the resistor R42 is respectively connected to the other end of the capacitor C14, the seventh pin and the eighth pin of the optocoupler U12; The eighth pin of the operational amplifier chip IC4 is respectively connected to one end of the resistor R36 and the sixth pin of the optocoupler U10. The second pin of the optocoupler U10 is connected to one end of the resistor R37. The seventh pin of the optocoupler U10 is respectively connected to the eighth pin of the optocoupler U10, one end of the capacitor C12 and the other end of the resistor R36. The other end of the capacitor C12 is grounded.

5. The portable AC charging pile testing device according to claim 1, characterized in that, The test process control circuit includes Darlington transistor arrays U3, U4, resistors R1, R2, R3, R4, R5, R6, R7, R9, R15, R16, R17, R18, R145, R146, R147, R148, R149, diodes D1, D2, D3, D4, D5, D6, D7, D9, D17, light-emitting diodes LED1, LED2, LED3, LED4, LED5, LED6, LED7, LED9, relays RY1, RY2, RY3, RY4, RY5, RY6, RY7 and RY9; Among them, the twelfth pin of the Darlington transistor array U4 is respectively connected to one end of the resistor R1, the positive electrode of the diode D1, and the second pin of the relay RY1. The other end of the resistor R1 is connected to the negative electrode of the light-emitting diode LED1. The positive electrode of the light-emitting diode LED1 is respectively connected to the negative electrode of the diode D1 and the first pin of the relay RY1; The thirteenth pin of the Darlington transistor array U4 is respectively connected to one end of the resistor R2, the positive electrode of the diode D2, and the second pin of the relay RY2. The other end of the resistor R2 is connected to the negative electrode of the light-emitting diode LED2. The positive electrode of the light-emitting diode LED2 is respectively connected to the negative electrode of the diode D2 and the first pin of the relay RY2. The third pin of the relay RY2 is connected to the positive electrode of the diode D17. The negative electrode of the diode D17 is respectively connected to one end of the resistor R15 and one end of the resistor R16; The fourteenth pin of the Darlington transistor array U4 is respectively connected to one end of the resistor R3, the positive electrode of the diode D3, and the second pin of the relay RY3. The other end of the resistor R3 is connected to the negative electrode of the light-emitting diode LED3. The positive electrode of the light-emitting diode LED3 is respectively connected to the negative electrode of the diode D3 and the first pin of the relay RY3; The fifteenth pin of the Darlington transistor array U4 is respectively connected to one end of the resistor R4, the positive electrode of the diode D4, and the second pin of the relay RY4. The other end of the resistor R4 is connected to the negative electrode of the light-emitting diode LED4. The positive electrode of the light-emitting diode LED4 is respectively connected to the negative electrode of the diode D4 and the first pin of the relay RY4. The fourth pin of the relay RY4 is respectively connected to the other end of the resistor R16 and one end of the resistor R146; The sixteenth pin of the Darlington transistor array U4 is respectively connected to one end of the resistor R5, the positive electrode of the diode D5, and the second pin of the relay RY5. The other end of the resistor R5 is connected to the negative electrode of the light-emitting diode LED5. The positive electrode of the light-emitting diode LED5 is respectively connected to the negative electrode of the diode D5 and the first pin of the relay RY5. The fourth pin of the relay RY5 is connected to the other end of the resistor R15; The tenth pin of the Darlington transistor array U3 is respectively connected to one end of the resistor R6, the positive electrode of the diode D6 and the second pin of the relay RY6. The other end of the resistor R6 is connected to the negative electrode of the light-emitting diode LED6. The positive electrode of the light-emitting diode LED6 is respectively connected to the negative electrode of the diode D6 and the first pin of the relay RY6. The fourth pin of the relay RY1 is respectively connected to one end of the resistor R18, one end of the resistor R145 and one end of the resistor R17. The other end of the resistor R17 is respectively connected to the other end of the resistor R146 and the other end of the resistor R145; The eleventh pin of the Darlington transistor array U3 is respectively connected to one end of the resistor R7, the positive electrode of the diode D7 and the second pin of the relay RY7. The other end of the resistor R7 is connected to the negative electrode of the light-emitting diode LED7. The positive electrode of the light-emitting diode LED7 is respectively connected to the negative electrode of the diode D7 and the first pin of the relay RY7. The fourth pin of the relay RY7 is connected to the other end of the resistor R18; The thirteenth pin of the Darlington transistor array U3 is respectively connected to one end of the resistor R9, the positive electrode of the diode D9 and the second pin of the relay RY9. The other end of the resistor R9 is connected to the negative electrode of the light-emitting diode LED9. The positive electrode of the light-emitting diode LED9 is respectively connected to the negative electrode of the diode D9 and the first pin of the relay RY9. The fourth pin of the relay RY9 is connected to one end of the resistor R147. The other end of the resistor R147 is connected to one end of the resistor R148. The other end of the resistor R148 is connected to one end of the resistor R149.

6. The portable AC charging pile testing device according to claim 1, wherein The chip model of the ARM processor (122) is STM32F207Z.

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