Analog divide-by-2 frequency divider with low phase noise
By building a low-phase noise analog binary divider, using components such as amplifiers, mixers, phase shifters and filters, the problems of high phase noise and large debugging workload of integrated dividers are solved, and low-cost and high-reliability signal source applications are achieved.
Patent Information
- Application Number
- CN202422158542.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-03
- Publication Date
- 2025-07-11
- Estimated Expiration
- 2034-09-03
AI Technical Summary
The integrated frequency divider in existing frequency synthesizers has high phase noise and high debugging workload, making it difficult to achieve low phase noise characteristics.
An analog binary divider with low phase noise, including a first amplifier, mixer, phase shifter, filter, power divider and attenuator, is constructed to stabilize the signal frequency and reduce phase noise.
It realizes a low-phase noise analog binary, which is low cost and high reliability, and is suitable for signal source fields in electronic systems.
Smart Images
Figure CN223093766U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of frequency synthesizers, and particularly relates to an analog frequency divider with low phase noise. Background Art
[0002] In modern communication systems, radar systems, and precision measurement equipment, frequency synthesis technology plays a crucial role. Frequency synthesizers are not only used to generate the required signal frequencies but also need to have low phase noise characteristics to ensure the performance and reliability of the system. In a frequency synthesizer, as one of the basic building blocks, the performance of the frequency divider is directly related to the performance of the entire system.
[0003] In existing frequency synthesizer modules, basically chip-level frequency dividers are adopted. The phase noise floor noise of the integrated frequency divider is basically -150 dBc / Hz, which affects the phase noise of the final output of the frequency synthesizer, and has disadvantages such as great difficulty in achieving low phase noise indicators, large debugging workload, and relatively low reliability. Summary of the Utility Model
[0004] To solve the problems of large phase noise and large debugging workload of existing integrated frequency dividers, the utility model proposes an analog frequency divider with low phase noise to solve the above problems.
[0005] The present application discloses an analog frequency divider with low phase noise, which includes a first amplifier, a mixer, a phase shifter, a first filter, a second amplifier, a power splitter, a third amplifier, a second filter, and an attenuator. The output end of the first amplifier is connected to the local oscillator input end of the mixer. The intermediate frequency output end of the mixer is connected to the input end of the phase shifter. The output end of the phase shifter is connected to the input end of the first filter. The output end of the first filter is connected to the input end of the second amplifier. The output end of the second amplifier is connected to the input end of the power splitter. One output end of the power splitter outputs directly, and the other output end is connected to the input end of the third amplifier. The output end of the third amplifier is connected to the input end of the second filter. The output end of the second filter is connected to the input end of the attenuator. The output end of the attenuator is connected to the radio frequency input end of the mixer.
[0006] The input signal is mixed inside the mixer to generate an intermediate frequency signal. After being phase-shifted by the phase shifter and output through the power splitter, it is amplified and filtered by the amplifier and then output to the radio frequency input end of the mixer, forming a positive feedback circuit, and outputting a signal with a frequency of 1 / 2 of the input frequency to reach a stable state of the circuit, thereby realizing analog frequency division with low phase noise.
[0007] Preferably, the first amplifier, the second amplifier, and the third amplifier adopt amplifiers of model HMC476SC70.
[0008] Preferably, the mixer uses a mixer of model ADE-5.
[0009] Preferably, the phase shifter uses a phase shifter of model JSPHS-661+.
[0010] Preferably, the first filter and the second filter use filters of model LFCN-320+.
[0011] Preferably, the power splitter uses a power splitter of model SBTC-2-10+.
[0012] Preferably, the attenuator uses an attenuator of model HMC653LP2E.
[0013] Advantages of the present utility model:
[0014] (1) The present utility model adopts a solution with low cost, low phase noise and high reliability, and solves the problems of poor phase noise and long debugging time of traditional integrated frequency dividers.
[0015] (2) The product of the present utility model has good consistency, low debugging amount, low production cost, good temperature stability and high reliability, and can be widely applied to the signal source field in electronic systems. Description of the drawings
[0016] Figure 1 is a schematic structural diagram of a low-phase-noise analog frequency divider according to an embodiment of the present utility model;
[0017] Figure 2 is a noise floor curve graph of an amplifier according to an embodiment of the present utility model;
[0018] Figure 3 is a phase noise curve of the analog frequency divider according to an embodiment of the present utility model. Specific embodiments
[0019] In order to make the objectives, technical solutions and advantages of the present application clearer and more understandable, the following takes examples with reference to the attached drawings and further elaborates on the present application in detail.
[0020] An embodiment of the present application discloses a low-phase-noise analog frequency divider, and its structure is as Figure 1As shown, it includes a first amplifier, a mixer, a phase shifter, a first filter, a second amplifier, a power splitter, a third amplifier, a second filter, and an attenuator. The output end of the first amplifier is connected to the local oscillator input end of the mixer. The intermediate frequency output end of the mixer is connected to the input end of the phase shifter. The output end of the phase shifter is connected to the input end of the first filter. The output end of the first filter is connected to the input end of the second amplifier. The output end of the second amplifier is connected to the input end of the power splitter. One output end of the power splitter outputs directly, and the other output end is connected to the input end of the third amplifier. The output end of the third amplifier is connected to the input end of the second filter. The output end of the second filter is connected to the input end of the attenuator. The output end of the attenuator is connected to the radio frequency input end of the mixer.
[0021] In a specific embodiment, the first amplifier, the second amplifier, and the third amplifier adopt the HMC476SC70 model amplifier of Analog Devices, Inc. The HMC476SC70 model amplifier has good bottom noise, and also has the characteristics of low power consumption and small size. The noise floor curve graph of this amplifier is as Figure 2 shown. It can be seen that its noise floor phase noise is good. If the noise floor phase noise of the first amplifier, the second amplifier, and the third amplifier is poor, then the output phase noise of the final analog frequency divider is poor. On the contrary, the output phase noise is good. The mixer adopts the ADE-5 model mixer of minicircuits company. The ADE-5 model mixer has a wide frequency range, low conversion loss, high input power handling ability, and a wide operating temperature range. The phase shifter adopts the JSPHS-661+ model phase shifter. The JSPHS-661+ model phase shifter has low insertion loss, good voltage standing wave ratio, a wide operating temperature range, and a moderate frequency range. The first filter and the second filter adopt the LFCN-320+ model filter of minicircuits company. The LFCN-320+ model filter has high power handling ability, small size design, temperature stability, low noise and distortion, and wide frequency band coverage. The power splitter adopts the SBTC-2-10+ model power splitter of minicircuits company. The SBTC-2-10+ model power splitter has low insertion loss, excellent amplitude imbalance and phase imbalance, temperature stability, and small size. The attenuator adopts the HMC653LP2E model attenuator of Analog Devices, Inc. The HMC653LP2E model attenuator has a wide frequency range and impedance matching.
[0022] The phase noise curve of the analog frequency divider in the embodiment of this application is as Figure 3 shown, Figure 2 and Figure 3The gray shaded part in it represents the simulated instrument floor noise, the red wavy line represents the phase noise curve, and the line in the phase noise curve is the curve representing the average value of the phase noise. From Figure 3 It can be seen that after analog frequency division by two, the output phase noise is: -147 dBc / Hz @ 1 kHz, -155 dBc / Hz @ 10 kHz, -160 dBc / Hz @ 100 kHz. As a comparison, for the digital frequency divider by two device HMC432E of ADI Corporation, the final output indicators are -143 dBc / Hz @ 1 kHz, -148 dBc / Hz @ 10 kHz, -150 dBc / Hz @ 100 kHz; therefore, the analog frequency divider by two of this application is superior to the HMC432E of ADI Corporation.
[0023] The above shows and describes the basic principles, main features and advantages of the present utility model. Those skilled in the art of this industry should understand that the present utility model is not limited by the above embodiments. What is described in the above embodiments and the specification only illustrates the principles of the present utility model. Without departing from the spirit and scope of the present utility model, the present utility model will have various changes and improvements, and these changes and improvements all fall within the scope of the present utility model claimed. The scope of protection claimed by the present utility model is defined by the appended claims and their equivalents.
Claims
1. An analog frequency divider with low phase noise, characterized in that It includes a first amplifier, a mixer, a phase shifter, a first filter, a second amplifier, a power divider, a third amplifier, a second filter and an attenuator. The output end of the first amplifier is connected to the local oscillator input end of the mixer. The intermediate frequency output end of the mixer is connected to the input end of the phase shifter. The output end of the phase shifter is connected to the input end of the first filter. The output end of the first filter is connected to the input end of the second amplifier. The output end of the second amplifier is connected to the input end of the power divider. One output end of the power divider outputs directly, and the other output end is connected to the input end of the third amplifier. The output end of the third amplifier is connected to the input end of the second filter. The output end of the second filter is connected to the input end of the attenuator. The output end of the attenuator is connected to the radio frequency input end of the mixer.
2. The analog frequency divider with low phase noise according to claim 1, wherein The first amplifier, the second amplifier and the third amplifier adopt amplifiers of model HMC476SC70.
3. The analog frequency divider with low phase noise according to claim 2, wherein The mixer adopts a mixer of model ADE-5.
4. The analog frequency divider with low phase noise according to claim 3, characterized in that The phase shifter adopts a phase shifter of model JSPHS-661+.
5. The analog frequency divider with low phase noise according to claim 4, wherein The first filter and the second filter adopt filters of model LFCN-320+.
6. The analog frequency divider with low phase noise according to claim 5, wherein The power divider adopts a power divider of model SBTC-2-10+.
7. The analog frequency divider with low phase noise according to claim 6, wherein The attenuator adopts an attenuator of model HMC653LP2E.