PCB structure for optimizing return loss of through hole connector

Abstract

The utility model discloses a PCB structure for optimizing return loss of a through hole connector, which comprises a connector through hole, a first bonding pad and a second bonding pad are respectively arranged on the surface layers of the two ends of the connector through hole, an inner layer bonding pad is further arranged in the through hole close to the second bonding pad, a surface layer high-speed wire is connected to the first bonding pad, and a surface layer high-speed wire is connected to the second bonding pad. The inner-layer high-speed signal wire is connected to the inner-layer bonding pad, and the bonding pad size of the second bonding pad is smaller than that of the first bonding pad. The second bonding pad is a useless bonding pad on the surface layer of the connector through hole corresponding to the inner-layer high-speed signal wire adjacent to the back drilling surface. The useless bonding pad on the back drilling surface can influence the signal, and the capacitive effect is increased along with the increase of the size of the useless bonding pad, so that the reflection of the signal is increased, and the return loss of the signal is deteriorated. Therefore, the signal reflection caused by the capacitive effect of the bonding pad can be reduced, and the return loss of the signal is optimized. And meanwhile, the machining reliability is also ensured.

Description

Technical Field

[0001] The utility model relates to the technical field of PCB design, in particular to a PCB structure for optimizing the return loss of a through-hole connector. Background Art

[0002] A printed circuit board (PCB) is a component substrate with conductive patterns and via connection functions, which is manufactured through electro-chemical processes and machining processes. It is made by using electronic printing technology, so it is called a "printed" circuit board. It is a printed board that forms inter-point connections and printed components on a general substrate according to a predetermined design. It is a support for electronic components and also a carrier for the electrical connection of electronic components. It is an important part of the physical support and signal transmission of electronic products. According to the circuit layer classification, it can be divided into single-sided boards, double-sided boards, multi-layer boards, high-density interconnect boards (HDI boards), etc.

[0003] When signals are interconnected between single boards of a multi-layer board, through-hole connectors play a crucial role in the construction of electronic devices. They play a crucial role in signal interconnection between single boards. With their characteristics of high efficiency, reliability, flexibility, and easy maintenance, they meet the requirements of modern electronic devices for high-speed and high-frequency signal transmission, and provide strong support for the overall performance and stability of the system. The through-hole connectors are fixed to the PCB by welding through the connector vias to play their role in signal transmission.

[0004] Connector vias allow current and signals to be vertically transmitted between different layers of the PCB, realizing the interconnection of inter-layer circuits. This is a crucial function in multi-layer PCB design, which helps to improve the integration and performance of the circuit board. Back drilling is a special type of controlled-depth drilling. By controlling the hole depth, the unnecessary copper-plated holes are drilled off, leaving only the required inter-layer interconnections. For blind holes in multi-layer boards, all vias are made as through-holes during board manufacturing, and then the vias that are not through-holes are drilled from the back to achieve the effect of blind holes, which can save the process of drilling and pressing separately.

[0005] However, for the inner-layer signal traces adjacent to the back-drilled surface, considering that the stub length in the Z-axis direction is not large, and at the same time, forcibly back-drilling the through-holes with a small back-drilling depth will pose a risk of damaging the inner-layer circuits. Therefore, the traditional method does not make special treatment for the connector vias corresponding to such signals. Return loss, as a characterization of signal reflection, reflects the impedance continuity of the signal path. Under the traditional method, due to the existence of the through-hole stubs in the Z-axis direction from the inner-layer traces to the back-drilled surface and the pads that do not participate in signal transmission on the back-drilled surface (i.e., useless pads), there will be a problem of increased signal reflection, resulting in a large return loss of the signal. Summary of the Utility Model

[0006] In order to overcome the deficiency that the useless pads and stubs on the back-drilled surface of the existing technology lead to relatively large via return loss of the connector, the present utility model provides a PCB structure for optimizing the via return loss of the connector.

[0007] The technical solution of the present utility model is described as follows:

[0008] A PCB structure for optimizing the via return loss of the connector includes a connector via. First pads and second pads are respectively arranged on the surface layers at both ends of the connector via. An inner layer pad is also arranged in the via near the second pad. The surface layer high-speed trace is connected to the first pad, and the inner layer high-speed signal trace is connected to the inner layer pad. The pad size of the second pad is smaller than that of the first pad.

[0009] Further, in one embodiment, the inner layer where the inner layer pad is located is adjacent to the back-drilled surface where the second pad is located.

[0010] Further, in one embodiment, the first pad, the second pad and the inner layer pad are all circular pads.

[0011] Further, in one embodiment, the sizes of the first pad and the inner layer pad are the same.

[0012] Further, in one embodiment, the connector vias are arranged in pairs.

[0013] Further, in one embodiment, the sizes of the two second pads arranged in pairs are the same.

[0014] Further, in one embodiment, the pad size of the second pad is less than two-thirds of the pad size of the first pad.

[0015] Further, in one embodiment, the size of the second pad is 0.

[0016] For the present utility model according to the above solution, the beneficial effect is that first pads and second pads are respectively arranged on the surface layers at both ends of the connector via. The second pad is the useless pad on the surface layer of the connector via corresponding to the inner layer high-speed signal trace adjacent to the back-drilled surface. The pad size of the second pad is smaller than that of the first pad, that is, the size of the useless pad on the surface layer of the connector via corresponding to the inner layer high-speed signal trace adjacent to the back-drilled surface is reduced. Since the useless pad on the back-drilled surface also affects the signal, its capacitive effect increases with the increase of the size of the useless pad, resulting in an increase in signal reflection and deterioration of signal return loss. Therefore, in this application, by adjusting the size of the second pad on the surface layer of the connector via, the signal reflection caused by the capacitive effect of the pad is reduced, so as to optimize the signal return loss. Compared with the traditional method, this application reduces the area of the useless pad and also ensures the reliability of processing. Brief Description of the Drawings

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present utility model. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0018] Figure 1 It is a cross-sectional view of the connector through-hole of the present utility model;

[0019] Figure 2 It is the echo loss diagram of the through-hole connector of the traditional method;

[0020] Figure 3 It is the echo loss diagram of the optimized through-hole connector.

[0021] In the figure, 100, connector through-hole; 110, first pad; 120, second pad; 130, inner layer pad; 200, PCB board body. Detailed Implementation Modes

[0022] The following further describes the present utility model in conjunction with the drawings and the implementation modes. It should be noted that when an element is expressed as "fixed to" another element, it can be directly on the other element, or there can be one or more intermediate elements therebetween. When an element is expressed as "connected to" another element, it can be directly connected to the other element, or there can be one or more intermediate elements therebetween. The terms "vertical", "horizontal", "left", "right", "inner", "outer" and similar expressions used in this specification are only for the purpose of illustration. In the description of the present utility model, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating relative importance or implicitly indicating the quantity of the indicated technical features. Thus, unless otherwise specified, the features defined with "first" and "second" can explicitly or implicitly include one or more of such features; the meaning of "a plurality" is two or more. The term "comprising" and any deformation thereof mean non-exclusive inclusion, and there may be or be added one or more other features, integers, steps, operations, units, components and / or their combinations.

[0023] In addition, unless otherwise clearly defined and limited, the terms "install", "connect", and "couple" shall be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, or the internal communication of two components. All technical and scientific terms used in this specification have the same meaning as those commonly understood by those skilled in the technical field to which the present utility model belongs. The terms used in the specification of the present utility model are only for the purpose of describing specific embodiments and are not used to limit the present utility model. The term "and / or" used in this specification includes any and all combinations of one or more of the related listed items.

[0024] In addition, the technical features involved in different embodiments of the present utility model described below can be combined with each other as long as they do not conflict with each other.

[0025] Since forcibly back-drilling a connector through-hole with a relatively small back-drilling depth may pose a risk of damaging the inner-layer circuit, for the inner-layer signal traces adjacent to the back-drilling surface, considering that the stub length in the Z-axis direction is not large, the traditional method does not make special treatment for the connector through-holes corresponding to such signals. In fact, in addition to the through-hole stubs in the Z-axis direction, the useless pads on the back-drilling surface also affect the signal, and its capacitive effect increases with the increase of the size of the useless pads, resulting in an increase in signal reflection and deterioration of the signal return loss.

[0026] To solve signal reflection and optimize signal return loss, the following embodiments are proposed in this application.

[0027] Such as Figure 1As shown in the figure, the present application provides an embodiment of a PCB structure for optimizing the return loss of a via connector. On the PCB board body 200, the PCB structure for optimizing the return loss of the via connector includes a connector via 100. First pads 110 and second pads 120 are respectively provided on the surface layers at both ends of the connector via 100. An inner layer pad 130 is further provided in the via near the second pad 120. The surface layer high-speed trace is connected to the first pad 110, and the inner layer high-speed signal trace is connected to the inner layer pad 130. The pad size of the second pad 120 is smaller than that of the first pad 110. In this embodiment, the inner layer pad 130 is close to the second pad 120, and the high-speed signal traces are respectively connected to the first pad 110 and the inner layer pad 130. The second pad 120 is a useless pad on the surface layer of the connector via 100, and the pad size of the second pad 120 is smaller than that of the first pad 110, that is, the size of the useless pad is reduced. Since the pad size of the useless pad on the surface layer of the connector via 100 corresponding to the inner layer high-speed signal trace adjacent to the back-drilled surface is reduced without changing the Z-axis length of the via stub, the signal reflection caused by the capacitive effect of the pad can be effectively reduced. Therefore, the present application can optimize the return loss of the connector via 100. At the same time, by reducing the size of the useless pad, only the second row of pads needs to be reduced in size, which ensures the reliability of processing.

[0028] In one embodiment, the inner layer where the inner layer pad 130 is located is adjacent to the back-drilled surface where the second pad 120 is located. The distance between the layer where the inner layer pad 130 is located and the surface layer where the second pad 120 is located is extremely small, only one layer thickness. If back-drilling is required, a high back-drilling accuracy is needed, the operation difficulty is extremely high and it is extremely easy to damage the inner layer trace. However, if the back-drilling technology is not used to drill off the via stub, that is, no treatment is done to the second pad 120, it is easy to affect the signal quality of the inner layer trace and the signal transmission. The present application only processes the second pad 120, reduces the diameter of the second pad 120, the operation is simple, and the return loss of the via can be effectively reduced.

[0029] In one embodiment, the first pad 110, the second pad 120, and the inner layer pad 130 are all circular pads. The sizes of the first pad 110 and the inner layer pad 130 are the same. The circular pad is a commonly used pad, and the applicable range of this structure is wide.

[0030] In one embodiment, the connector vias 100 are arranged in pairs. The sizes of the two second pads 120 arranged in pairs are the same.

[0031] In one embodiment, the pad size of the second pad 120 is less than two-thirds of the pad size of the first pad 110. According to the processing capacity of the factory, reducing the size of the second pad 120 is to reduce the size of the useless pad on the surface of the connector through hole 100 corresponding to the inner layer high-speed signal line adjacent to the back-drilled surface. The processing method is simple and convenient and can be realized. If the processing factory capacity permits, the redundant pad on the back-drilled surface can be directly removed, so that the size of the second pad 120 is 0.

[0032] The return loss graph of the through-hole connector is plotted with frequency (in GHz) as the horizontal axis and return loss value (in dB) as the vertical axis. In one embodiment, the high-speed differential signal rate of the single-board through-hole connector is 10 Gbps, and the connector through-hole corresponding to the inner layer high-speed signal line adjacent to the back-drilled surface is not specially processed. When the diameter of the second pad is 40.758 mil, the return loss graph is as follows: Figure 2 As shown in the figure, the return loss at the 5GHz base frequency is -28.1dB. The connector through hole is optimized, and the size of the second pad, the useless pad on the surface, is reduced from a diameter of 40.758mil to 21.11mil. The return loss after optimization is shown in the figure below. Figure 3 As shown, the return loss at the optimized 5GHz base frequency is -30.9dB. Comparing the return loss at the 5GHz base frequency before and after optimization, it can be found that the return loss of the second pad is optimized by 2.7dB after optimization, which is equivalent to an increase of 9.6% in the system margin. Therefore, the PCB structure of optimizing the return loss of the through-hole connector in this application can effectively reduce the return loss of the through-hole connector.

[0033] It should be understood that those skilled in the art can make improvements or changes based on the above description, and all these improvements and changes should fall within the scope of protection of the claims attached to the utility model.

[0034] The above is an exemplary description of the utility model patent in conjunction with the accompanying drawings. It is obvious that the implementation of the utility model patent is not limited to the above-mentioned method. As long as various improvements are made by adopting the method concept and technical solution of the utility model patent, or the concept and technical solution of the utility model patent are directly applied to other occasions without improvement, they are all within the protection scope of the utility model.

Claims

1. A PCB structure for optimizing the return loss of a via connector, characterized in that, It includes a connector via hole, with a first pad and a second pad respectively provided on the surface layers at both ends of the connector via hole. An inner layer pad is further provided in the via hole near the second pad. The surface layer high-speed trace is connected to the first pad, and the inner layer high-speed signal trace is connected to the inner layer pad. The pad size of the second pad is smaller than that of the first pad.

2. The PCB structure for optimizing the return loss of the via connector according to claim 1, characterized in that The inner layer where the inner layer pad is located is adjacent to the back-drilled surface where the second pad is located.

3. The PCB structure for optimizing the return loss of a via connector according to claim 1, characterized in that, The first pad, the second pad, and the inner layer pad are all circular pads.

4. The PCB structure for optimizing the return loss of a through-hole connector according to claim 1, characterized in that, The first pad and the inner layer pad have the same size.

5. The PCB structure for optimizing the return loss of the through-hole connector according to claim 1, characterized in that The connector via holes are arranged in pairs.

6. The PCB structure for optimizing the return loss of the through-hole connector according to claim 5, wherein The two second pads arranged in pairs have the same size.

7. The PCB structure for optimizing the return loss of the through-hole connector according to claim 1, characterized in that The pad size of the second pad is less than two-thirds of the pad size of the first pad.

8. The PCB structure for optimizing the return loss of the via connector according to claim 7, characterized in that, The size of the second pad is 0.

Images