AC charging pile CP signal generation and detection circuit

Abstract

The utility model discloses an AC charging pile CP signal generation and detection circuit. The AC charging pile CP signal generation and detection circuit comprises a level conversion circuit, a comparison circuit, a rectification voltage division circuit and an isolation follower circuit. A chip pin outputs a CP signal and transmits the CP signal to the level conversion circuit, the level conversion circuit is connected with the comparison circuit, and the comparison circuit is connected with a vehicle end; a vehicle end level signal is transmitted to the rectification voltage division circuit, the rectification voltage division circuit is connected with the isolation following circuit, and the isolation following circuit transmits the signal to a chip ADC pin to complete CP signal sampling. The AC charging pile CP signal generation and detection circuit of the utility model has high reliability and response speed.

Description

Technical Field

[0001] The utility model relates to the technical field of circuits, and particularly relates to an AC charging pile CP signal generation and detection circuit. Background Art

[0002] The current AC charging pile CP signal generation and detection circuit is composed of triodes, MOS tubes, optocouplers, etc., or directly rectifies the PWM signal into a DC signal for sampling. These solutions have scattered components and are not advantageous in terms of reliability and comprehensive cost. The common solutions of the existing CP signal generation and detection circuit mainly have the following problems: Using discrete devices such as triodes and MOS tubes to form the PWM generation circuit of the CP signal is easily affected by external surge voltages, causing component damage, occupying a large PCB size, and having no advantages in terms of reliability and cost. After rectifying the PWM sampling signal into a DC voltage, although the sampling accuracy can be improved, due to the capacitor charge and discharge problem, the signal may not respond in time and cannot meet the 100ms response speed required by relevant standards. Therefore, it is necessary to propose an AC charging pile CP signal generation and detection circuit to solve the above problems. Summary of the Utility Model

[0003] The purpose of the utility model is to provide an AC charging pile CP signal generation and detection circuit for the deficiencies of the existing technology, so as to solve the problems that the reliability and response speed of the existing technology need to be improved.

[0004] The utility model provides an AC charging pile CP signal generation and detection circuit, including: a level conversion circuit, a comparison circuit, a rectification and voltage division circuit, and an isolation and follower circuit;

[0005] The CP signal output by the chip pin is transmitted to the level conversion circuit, the level conversion circuit is connected to the comparison circuit, and the comparison circuit is connected to the vehicle end; the vehicle end level signal is transmitted to the rectification and voltage division circuit, the rectification and voltage division circuit is connected to the isolation and follower circuit, and the isolation and follower circuit transmits the signal to the chip ADC pin to complete the sampling of the CP signal.

[0006] Further, the level conversion circuit is used to convert the 3.3V control signal into a 12V control signal; the comparison circuit is used to convert the 12V control signal into ±12V high and low level signals; the rectification and voltage division circuit is used to convert the ±12V high and low level signals or the level signals divided by the vehicle end resistor into level signals within the range of 0 - 3.3V.

[0007] Further, the signal at the vehicle end is connected in parallel with a clamping protection circuit.

[0008] Further, the level conversion circuit includes a resistor R1, a resistor R2, and a triode Q1, and the resistor R1 and the resistor R2 are respectively connected to the triode Q1.

[0009] Further, the comparison circuit includes a capacitor C1, a capacitor C2, a capacitor C3, a resistor R3, a resistor R4, and a comparator U1A; the capacitor C1, the capacitor C2, and the capacitor C3 are respectively connected to the comparator U1A, the resistor R3 is connected to the resistor R4, one end of the capacitor C1 is connected between one ends of the resistor R3 and the resistor R4, and the other end of the capacitor C1 is connected to the other end of the resistor R4.

[0010] Further, the rectifying and voltage-dividing circuit includes a diode D2, a resistor R6, and a resistor R7, the diode D2 is connected to the resistor R6, and the resistor R6 is connected to the resistor R7.

[0011] Further, the isolation and follower circuit includes a follower U1B, the follower U1B is connected between the resistor R6 and the resistor R7, and the follower U1B is connected to a resistor R8.

[0012] The utility model has the following beneficial effects: The AC charging pile CP signal generation and detection circuit provided by the utility model adopts an integrated circuit design for CP signal generation and sampling, sharing a core circuit. The main circuit is composed of a comparator and a small part of peripheral circuits, with a simple structure and a compact PCB design, reducing the hardware cost of the product. A clamping protection circuit is added for the external input signal to prevent the control circuit from being damaged by external surge voltage, enhancing the reliability of the circuit. The sampling circuit divides the voltage of the signal at the signal input end, which is beneficial to reducing the surge impact of the external signal on the internal circuit; rectification is performed at the signal input end to avoid the impact of the negative voltage of the input signal on the ADC pin of the chip. After the sampling signal is processed by rectifying and voltage-dividing, instead of performing filtering and smoothing processing, the signal maintaining the original duty cycle is connected to the ADC port. Since there is no problem of capacitor charging and discharging, the signal response is rapid, meeting the 100ms response speed required by the standard, which not only simplifies the circuit but also meets the functional requirements. Description of the Drawings

[0013] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model or the prior art, the following will briefly introduce the drawings required to be used in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present utility model. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0014] Figure 1 It is the schematic diagram of the AC charging pile CP signal generation and detection circuit of the present utility model;

[0015] Figure 2 This is the specific circuit diagram of the CP signal generation and detection circuit of the AC charging pile of the present utility model. Specific embodiments

[0016] It should be noted that, without conflict, the embodiments in this application and the features in the embodiments can be combined with each other. The present utility model will be described in detail below with reference to the drawings and in conjunction with the embodiments. It should be pointed out that the following detailed description is illustrative and is intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs.

[0017] Please refer to Figures 1 to 2 , an embodiment of the present utility model provides an AC charging pile CP signal generation and detection circuit, including: a level conversion circuit, a comparison circuit, a rectification and voltage division circuit, and an isolation and follower circuit. The CP signal output by the chip pin is transmitted to the level conversion circuit, the level conversion circuit is connected to the comparison circuit, and the comparison circuit is connected to the vehicle end; the vehicle end level signal is transmitted to the rectification and voltage division circuit, the rectification and voltage division circuit is connected to the isolation and follower circuit, and the isolation and follower circuit transmits the signal to the chip ADC pin to complete the sampling of the CP signal.

[0018] The level conversion circuit is used to convert the 3.3V control signal into a 12V control signal; the comparison circuit is used to convert the 12V control signal into a ±12V high and low level signal; the rectification and voltage division circuit is used to convert the ±12V high and low level signal or the level signal divided by the vehicle end resistor into a level signal within the range of 0 - 3.3V.

[0019] For the CP signal generation circuit part, first, the CP signal is output by the chip pin, the 3.3V control signal is converted into a 12V control signal through the level conversion circuit, and then the signal is converted into a ±12V high and low level signal through the comparison circuit and connected to the vehicle end.

[0020] For the CP signal detection circuit part, the ±12V high and low level signal or the level signal divided by the vehicle end resistor is converted into a level signal within the range of 0 - 3.3V through the rectification and voltage division circuit, and finally, it is sent to the chip ADC pin through the isolation and follower circuit to complete the sampling of the CP signal.

[0021] The level conversion circuit converts the 3.3V control signal into a 12V control signal through a triode, and then converts the control signal into a ±12V signal through a comparator. The two ends of the comparator power supply are connected to +12V and -12V respectively; then, through the vehicle-end resistor voltage division, the high level is changed to 6V or 9V or 12V, and the low level remains -12V. The signals at the vehicle end are connected in parallel with a clamping protection circuit to prevent the external circuit from generating surges and damaging the hardware circuit; at this time, the signal sent to the vehicle end is an AC signal containing positive and negative voltages, but the charging pile end only determines the charging state of the vehicle end according to the positive level of the CP signal. Therefore, the vehicle-end signal first passes through a diode rectifier to isolate the negative voltage, and then the positive voltage is divided, so that the voltage range is controlled between 0-3.3V. Finally, it is connected to the ADC port of the chip through a follower for analog sampling, which avoids the impact of negative voltage on the chip port. At the same time, when the CP signal is a PWM waveform, since there is no filtering after diode rectification, the ADC port will not sample the intermediate level due to charging and discharging problems, thus affecting the sampling result and response time.

[0022] Specifically, the level conversion circuit includes resistor R1, resistor R2 and triode Q1. Resistor R1 and resistor R2 are respectively connected to triode Q1. The level conversion circuit converts the 3.3V control signal output by the chip into a 12V control signal.

[0023] The comparison circuit includes capacitor C1, capacitor C2, capacitor C3, resistor R3, resistor R4 and comparator U1A; capacitor C1, capacitor C2 and capacitor C3 are respectively connected to comparator U1A. Resistor R3 is connected to resistor R4. One end of capacitor C1 is connected between one end of resistor R3 and one end of resistor R4, and the other end of capacitor C1 is connected to the other end of resistor R4. The comparison circuit converts the control signal into a ±12V high and low level signal and inputs it to the vehicle end through the D1 clamping circuit; among them, 12V is used as the reference level after voltage division by R3 and R4. The control signal is compared with the reference level. If the control signal level is greater than the reference level, +12V is output. If the control signal level is less than the reference level, -12V is output; C1, C2 and C3 filter out the noise signals on the power supply.

[0024] The rectification and voltage division circuit includes diode D2, resistor R6 and resistor R7. Diode D2 is connected to resistor R6, and resistor R6 is connected to resistor R7. Among them, diode D1 isolates the negative voltage of the CP signal, and the signal is voltage-divided by resistor R6 and R7 to convert the positive voltage signal into a level signal within the range of 0-3.3V, preventing the interface circuit from being damaged by external surge voltages.

[0025] The isolation follower circuit includes a follower U1B, which is connected between a resistor R6 and a resistor R7, and the follower U1B is connected to a resistor R8. The signal passes through the follower formed by U1 and finally flows through R8 into the ADC analog sampling pin of the chip to obtain a true and accurate CP voltage value.

[0026] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they specify the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0027] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. An AC charging pile CP signal generation and detection circuit, characterized in that Including: A level conversion circuit, a comparison circuit, a rectifying and voltage-dividing circuit, and an isolation and follower circuit; The chip pin outputs a CP signal and transmits it to the level conversion circuit. The level conversion circuit is connected to the comparison circuit, and the comparison circuit is connected to the vehicle end. The vehicle-end level signal is transmitted to the rectifying and voltage-dividing circuit. The rectifying and voltage-dividing circuit is connected to the isolation and follower circuit, and the isolation and follower circuit transmits the signal to the chip ADC pin to complete the sampling of the CP signal.

2. The CP signal generation and detection circuit of an AC charging pile according to claim 1, wherein The level conversion circuit is used to convert a 3.3V control signal into a 12V control signal; the comparison circuit is used to convert the 12V control signal into a ±12V high and low level signal; the rectifying and voltage-dividing circuit is used to convert the ±12V high and low level signal or the level signal divided by the vehicle-end resistor into a level signal within the range of 0 - 3.3V.

3. The CP signal generation and detection circuit of an AC charging pile according to claim 2, characterized in that, The signal at the vehicle end is in parallel with a clamping protection circuit.

4. The AC charging pile CP signal generation and detection circuit according to claim 3, characterized in that The level conversion circuit includes a resistor R1, a resistor R2, and a triode Q1. The resistor R1 and the resistor R2 are respectively connected to the triode Q1.

5. The CP signal generation and detection circuit of an AC charging pile according to claim 4, characterized in that The comparison circuit includes a capacitor C1, a capacitor C2, a capacitor C3, a resistor R3, a resistor R4, and a comparator U1A. The capacitor C1, the capacitor C2, and the capacitor C3 are respectively connected to the comparator U1A. The resistor R3 is connected to the resistor R4. One end of the capacitor C1 is connected between one end of the resistor R3 and one end of the resistor R4, and the other end of the capacitor C1 is connected to the other end of the resistor R4.

6. The CP signal generation and detection circuit of an AC charging pile according to claim 5, characterized in that, The rectifying and voltage-dividing circuit includes a diode D2, a resistor R6, and a resistor R7. The diode D2 is connected to the resistor R6, and the resistor R6 is connected to the resistor R7.

7. The CP signal generating and detecting circuit of an AC charging pile according to claim 6, wherein The isolation and follower circuit includes a follower U1B. The connection between the resistor R6 and the resistor R7 is connected to the follower U1B, and the follower U1B is connected to a resistor R8.

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