Intelligent integrated control center mainboard

Abstract

The utility model discloses an intelligent integrated control central main board which comprises a communication circuit used for providing communication for a processor, a crystal oscillator circuit used for providing clock signals for the processor, a debugging circuit used for providing a debugging interface for the processor, and a primary step-down processing circuit and a secondary step-down processing circuit which are used for providing working voltage for the processor, the processor is respectively connected with the communication circuit, the crystal oscillator circuit, the debugging circuit and the secondary step-down processing circuit, and the secondary step-down processing circuit is connected with the primary step-down processing circuit. The high mainboard integrates four paths of RS485 communication interfaces, so that the data transmission efficiency is remarkably improved, the use cost and the design cost are reduced, and the like.

Description

Technical Field

[0001] The utility model belongs to the technical field of computers, and particularly relates to an intelligent integrated control center main board. Background Art

[0002] With the rapid development of fields such as the Internet of Things, artificial intelligence, and big data, the demand for hardware platforms is continuously increasing. In particular, it is required that electronic devices have higher integration, stronger data processing capabilities, and more flexible scalability to handle complex application scenarios and a large number of real-time data streams. The ability to adapt to diverse application scenarios is one of the important directions for modern main board innovation, which includes expandable interfaces and modular design.

[0003] The development main board centered on STM32 has been widely used in the current market. Currently, most development boards use circuit technical solutions (as Figure 1 shown), basically using the STM32F03 series as the processor MCU of the main board. This series of processor MCUs is a microcontroller based on the ARM Cortex-M3 kernel, with rich peripheral interfaces (such as UART, SPI, I2C, etc.), and has high performance and low power consumption characteristics. The STM32F03 series is the core control unit of the development board, responsible for executing user programs and controlling peripherals.

[0004] Although the existing STM32F03 development main boards generally have rich peripheral interfaces, Figure 1 it can be seen that the development main board simply leads out the peripheral interfaces of the processor MCU with pin headers, but the price is not low, ranging from 100 yuan to 1000 yuan. For some developers with limited budgets, the cost is relatively high. At the same time, these interfaces have not been optimized or enhanced, resulting in problems such as compatibility, anti-interference, and stability of communication peripheral interfaces in actual applications. The main problems existing in the prior art include:

[0005] (1) It can only communicate point-to-point, restricting its application in scenarios that require multi-point communication;

[0006] (2) UART communication uses electrical signals to transmit data, which is affected by electromagnetic interference and noise. In a complex working environment or with strong signal interference, the stability and reliability of UART may be affected;

[0007] (3) Distance limitation: Since UART communication uses a serial connection method, its transmission distance is limited by physical factors, cable quality, and transmission rate, and it cannot transmit data over long distances. Summary of the Utility Model

[0008] The object of the present utility model is to provide an intelligent integrated control center main board to solve the technical problems existing in the prior art.

[0009] To achieve the above object, the present utility model adopts the following technical solutions:

[0010] An intelligent integrated control center main board includes a processor, and also includes a communication circuit for providing communication for the processor, a crystal oscillator circuit for providing a clock signal for the processor, a debugging circuit for providing a debugging interface for the processor, a first-level step-down processing circuit and a second-level step-down processing circuit for providing a working voltage for the processor. Among them, the processor is respectively connected to the communication circuit, the crystal oscillator circuit, the debugging circuit and the second-level step-down processing circuit, and the second-level step-down processing circuit is connected to the first-level step-down processing circuit.

[0011] Optionally, the communication circuit includes two enabling RS485 communication interface circuits and two RS485 automatic transceiver communication interface circuits. Each enabling RS485 communication interface circuit and each RS485 automatic transceiver communication interface circuit are respectively connected to the processor. Each enabling RS485 communication interface circuit at least includes a communication interface conversion chip and a first terminal matching resistor. The input end of the communication interface conversion chip is connected to the processor, and the output end of the communication interface conversion chip is connected to the first terminal matching resistor.

[0012] Optionally, each RS485 automatic transceiver communication interface circuit at least includes a converter and a second terminal matching resistor. The input end of the converter is connected to the processor, and the output end of the converter is connected to the second terminal matching resistor.

[0013] Optionally, the first-level step-down processing circuit includes a first power conversion chip, an avalanche breakdown diode, a filter capacitor module and a first filter circuit. The input end of the first power conversion chip is connected to the avalanche breakdown diode through the filter capacitor module, and the output end of the first power conversion chip is connected to the first filter circuit.

[0014] Optionally, the second-level step-down processing circuit at least includes a second power conversion chip and a second filter circuit. The second power conversion chip is connected to the second filter circuit.

[0015] Optionally, it further includes an externally expanded IO interface circuit, and the externally expanded IO interface circuit is connected to the processor.

[0016] Optionally, it further includes a boot circuit, a reset circuit, a battery, a power supply interface circuit and a positioning hole circuit. The boot circuit, the reset circuit, the battery, the power supply interface circuit and the positioning hole circuit are respectively connected to the controller.

[0017] Optionally, it further includes a power status indication circuit, which is connected to the controller.

[0018] Optionally, the crystal oscillator circuit includes a first crystal oscillator, a second crystal oscillator, a chip resistor, a second capacitor, a third capacitor, a sixth capacitor, and a seventh capacitor. The input end of the second crystal oscillator is connected to the processor, and the output end of the second crystal oscillator is respectively connected to the sixth capacitor and the seventh capacitor.

[0019] Optionally, the input end of the first crystal oscillator is connected to the processor, the output end of the first crystal oscillator is connected to the input end of the chip resistor, and the output end of the chip resistor is respectively connected to the second capacitor and the third capacitor.

[0020] Beneficial effects:

[0021] (1) High-efficiency communication integration: The main board integrates 4-channel RS485 communication interfaces, including two enabling channels and two automatic modes, significantly improving the data transmission efficiency and meeting diverse communication requirements.

[0022] (2) Simple wiring and maintenance: The DB128L-5.08 wiring terminal is adopted. Its robust and durable characteristics make the external circuit connection and later maintenance simpler and more convenient, reducing the usage cost.

[0023] (3) Low-cost design: The cost of all components on the main board is controlled within 50 yuan. Compared with similar products in the market, the price is reduced by more than 50%, providing higher cost performance.

[0024] (4) Powerful power drive: The standard 12V power input is used, with strong compatibility, capable of seamlessly docking with most existing power systems, reducing the trouble of additional power configuration. At the same time, it has stronger driving ability, capable of supporting more external devices to be directly connected, enhancing the scalability and practicality of the system. Description of the drawings

[0025] Figure 1 is a schematic diagram of an existing technology;

[0026] Figure 2 is a schematic structural diagram of an intelligent integrated control center main board provided according to an embodiment of the present application;

[0027] Figure 3-1 and 3-2 is a circuit schematic diagram of a processor of an intelligent integrated control center main board provided according to an embodiment of the present application and a crystal oscillator circuit connected thereto;

[0028] Figure 4 is a schematic structural diagram of a debugging circuit of an intelligent integrated control center main board provided according to an embodiment of the present application;

[0029] Figure 5 Schematic diagram of a power supply step-down chip provided by the prior art;

[0030] Figure 6 Circuit schematic diagram of a primary step-down processing circuit of an intelligent integrated control center main board provided according to an embodiment of the present application;

[0031] Figure 7 Circuit schematic diagram of a secondary step-down processing circuit of an intelligent integrated control center main board provided according to an embodiment of the present application;

[0032] Figure 8 Circuit schematic diagram of an enabled RS485 communication interface circuit of an intelligent integrated control center main board provided according to an embodiment of the present application;

[0033] Figure 9 Circuit schematic diagram of an RS485 automatic transceiver communication interface circuit of an intelligent integrated control center main board provided according to an embodiment of the present application;

[0034] Figure 10 Circuit schematic diagram of an externally expanded IO interface circuit of an intelligent integrated control center main board provided according to an embodiment of the present application. Detailed implementation manners

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the present invention will be briefly introduced below in conjunction with the accompanying drawings and the description of the embodiments or the prior art. Obviously, the following description of the structures of the drawings is only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts. It should be noted here that the description of these embodiments is used to help understand the present invention, but does not constitute a limitation to the present invention.

[0036] Embodiment 1:

[0037] As Figure 2As shown in the figure, this embodiment provides a structural schematic diagram of an intelligent integrated control center main board. Using STM32F103ZET6 as the core control unit (processor), it includes: a communication circuit for providing communication for the processor, a crystal oscillator circuit for providing a clock signal for the processor, a debugging circuit for providing a debugging interface for the processor, a primary step-down processing circuit and a secondary step-down processing circuit for providing a working voltage for the processor. It also includes a boot circuit, a reset circuit, a battery, a power interface circuit, a positioning hole circuit, and a power status indication circuit (LED, etc.). The boot circuit, reset circuit, battery, power interface circuit, positioning hole circuit, and power status indication circuit are respectively connected to the microcontroller. The processor is respectively connected to the communication circuit, crystal oscillator circuit, debugging circuit, and secondary step-down processing circuit, and the secondary step-down processing circuit is connected to the primary step-down processing circuit.

[0038] For the convenience of software development and fault troubleshooting, the development board is equipped with an STLink debugging interface, which supports program upload, debugging, and firmware update. The working voltage range of STM32 series microcontrollers is usually 2.0V to 3.6V, while the external input power supply is generally DC 5V. Therefore, a power conversion chip is required in the motherboard design. In Figure 1 the power circuit design in, the SE8117T33HF power conversion chip is used in combination with some external circuits, which can convert the 5V input voltage into the working voltage range required by the MCU. Figure 1 In, the LED is used as a power status indicator to intuitively show whether the development board is within the normal working voltage range. In the design of the motherboard, a reset circuit is usually designed to quickly reset the system when the program goes wrong, improving the debugging efficiency.

[0039] Such as Figure 3-1 and 3-2 are the circuit schematic diagrams of the processor and the crystal oscillator circuit connected thereto. The peripheral hardware configuration includes two crystal oscillator circuits. The two crystal oscillator circuits include a first crystal oscillator X1, a second crystal oscillator X2, a chip resistor R2, a second capacitor C2, a third capacitor C3, a sixth capacitor C6, and a seventh capacitor C7. Among them, an 8MHz high-speed crystal oscillator is used as the main system clock source to provide a stable clock signal for the processor MCU. Different clock signals can be obtained for the internal clock of the MCU through frequency division design, with a maximum clock frequency of 72MHz. At the same time, a 32.768kHz low-speed crystal oscillator is also connected, which is specifically used as an accurate time reference source. To implement the RTC real-time clock function, a 32.768kHz low-frequency crystal oscillator is usually used. This kind of crystal oscillator enables the MCU to maintain accurate time recording even in the sleep state and provides accurate time information when the system wakes up.

[0040] Figure 4It is a schematic structural diagram of a debugging circuit. The debugging circuit includes at least an STLink debugging interface. For the convenience of software development and fault troubleshooting, the development board is equipped with an STLink debugging interface. The designed STLink debugging interface uses a common XH2.54 straight-pin base to lead out the necessary signals, making the process of program uploading, debugging, and firmware upgrading more convenient and efficient.

[0041] See Figure 6 , the main board uses a 12V DC voltage input and has multi-level voltage conversion capabilities, capable of providing stable outputs of three voltage levels: DC 12V, 5V, and 3.3V. The first-stage step-down processing circuit includes a first power conversion chip, an avalanche breakdown diode U6, a filter capacitor module K1, and a first filter circuit D1. The input end of the first power conversion chip is connected to the avalanche breakdown diode U6 through the filter capacitor module, and the output end of the first power conversion chip is connected to the first filter circuit.

[0042] The first-stage step-down processing circuit is used for first-stage step-down. In the first-stage step-down process, a high-performance MP2225GJ-Z chip (i.e., the first power conversion chip) is used. According to the reference circuit recommended in the official technical manual of the MP2225GJ-Z chip (as Figure 5 shown), the power supply voltage regulation design is carried out. An avalanche breakdown diode U6 (TVS) is placed at the input end. Under normal circuit operating conditions, the avalanche breakdown diode U6 is in the cut-off state. When an abnormal overvoltage occurs in the circuit and reaches the TVS breakdown voltage, the TVS quickly changes from a high-resistance state to a low-resistance state, discharging the instantaneous overcurrent caused by the abnormal overvoltage to the ground, and at the same time clamping the abnormal overvoltage at a lower level, thus protecting the subsequent circuit from damage by the abnormal overvoltage. When the abnormal overvoltage disappears, the resistance value of the TVS returns to the high-resistance state again; after passing through the TVS, multiple filter capacitors are placed to reach the voltage input end of the MP2225GJ-Z chip. Among them, the multiple filter capacitors constitute the filter capacitor module K1. The output end circuit design is carried out according to the resistance ratio in the official manual for voltage drop design, using 40.2k and 5.49k resistors respectively, and finally obtaining a stable 5V DC voltage through the first filter circuit D1. SW3 is used as a power switch to control the output of the 5V voltage.

[0043] See Figure 7, the 5V voltage still cannot directly supply power to the processor MCU, so a secondary step-down is required. The secondary step-down processing circuit is used for secondary step-down. The function of the secondary step-down circuit is to convert the DC 5V power into the working voltage DC 3.3V of the MCU and other devices. The secondary step-down processing circuit includes at least a second power conversion chip and a second filter circuit D2, and the second power conversion chip is connected to the second filter circuit. The LM1117MK-3.3 / TR power conversion chip (i.e., the second power conversion chip) used for secondary step-down can easily regulate the input 5V DC power to 3.3V even without a complex peripheral circuit. The simple design not only reduces the system complexity but also ensures a stable voltage output.

[0044] The RS-485 standard is a multi-point, half-duplex serial communication protocol. Compared with UART communication technology, it can perform well in various environments with its good anti-interference ability, long-distance transmission characteristics (up to more than one kilometer), and the ability to support multiple devices for two-way communication on the same network. The main board of this application is designed with 4 independent 485 communication interfaces, including two 485 transceiver channels with independent enabling functions and two other automatic 485 transceiver channels.

[0045] See Figure 8 , for the enabling RS485 communication interface circuit design, the efficient and reliable SP3485E2343L conversion chip (i.e., the communication interface conversion chip) is selected. This chip can not only provide strong signal drive but also has a built-in protection mechanism to effectively resist electromagnetic interference and ensure the accuracy and reliability of data transmission. When the RE of this chip is at a low level, the receiving function is enabled; when the DE is at a high level, the sending function is activated. To optimize the communication performance, match the characteristic impedance of the communication line, prevent signal reflection, and improve the signal quality, the system is configured with a 120Ω first terminal matching resistor R33. In addition, the B bus is directly grounded (GND), and the A bus is pulled up to 3.3V, which can avoid the voltage difference between the A and B buses exceeding 200mV, enhance the system stability and reduce the sensitivity to external noise. It should be noted that the A and B buses of 485 refer to the two signal lines in the RS-485 communication interface, called the A line and the B line respectively. The A line represents the positive terminal, and the B line represents the negative terminal. This communication method adopts the balanced sending and differential receiving methods and has the ability to suppress common-mode interference. This communication method transmits data through two lines (the A line and the B line), and the voltage difference between the A line and the B line determines the transmitted binary data, that is, when the voltage of the A line is higher than that of the B line, it represents the transmission of "1"; when the voltage of the B line is higher than that of the A line, it represents the transmission of "0". The DE and RE pins mainly control the data transmission direction. When the DE is at a high level, it is the sending enable, and when the RE is at a low level, it is the receiving enable.

[0046] See Figure 9 For the RS485 automatic transceiver communication interface circuit, a converter of the MAX13488EESA model is adopted. The second terminal matching resistor is 120Ω. A 120Ω second terminal matching resistor R18 is also set. The purpose is to match the characteristic impedance of the communication line, prevent signal reflection, and improve signal quality. The B bus is kept grounded, and the A bus is pulled up to the 5V power supply. This converter has a built-in automatic data flow control function, which can achieve full-duplex communication without external components, significantly improving the automation level and communication efficiency of the system.

[0047] See Figure 10 The main board of this application is designed to externally connect up to 30 slave devices at most. Therefore, 16 IOs in the IO resources of the STM32 microcontroller are externally expanded during the design of the main board, aiming to build a control system with strong adaptability and convenient operation. The 16 IO resources can be combined with each other to achieve different functions and externally connect different modules. For example, the IO port can be configured as a key matrix, or can be used to drive an externally connected relay, or software simulate the I2C interface to communicate with I2C devices (such as EPPROM), or monitor the level signal in real time, etc.

[0048] This application implements the RS485 circuit design based on the four-channel UART communication interface of the STM32F103 microcontroller. The designed intelligent integrated control center main board uses a 12v DC voltage input and a built-in multi-stage voltage converter, which can provide stable output of three voltage levels: 12V, 5V, and 3.3V. The 3.3v DC power supply provides the working voltage for the core control unit and some components inside the main board. Using STM32F103ZET6 as the core control unit, the peripheral hardware configuration includes two crystal oscillator circuits. Among them, an 8MHz high-speed crystal oscillator is used as the main system clock source. At the same time, a 32.768kHz low-speed crystal oscillator is also connected, which is specifically used as an accurate time reference source. To optimize the software development process and simplify fault diagnosis, an STLink debug interface is designed. In addition, the main board is designed with 4 independent 485 communication interfaces, including two 485 transceiver channels with independent enabling functions and two automatic 485 transceiver channels. Finally, while externally expanding 16 IOs in the IO resources of the STM32 microcontroller, in order to improve the user experience and intuitive feedback of the system status, a reset button and a power LED indicator are also equipped on the main board. In particular, a dedicated running status LED light is added, which can reflect the status of program execution in real time, enabling users to judge whether the program is running normally in the first time.

[0049] Finally, it should be noted that the above are only the preferred embodiments of the present utility model and are not intended to limit the protection scope of the present utility model. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. An intelligent integrated control center main board, comprising a processor, characterized in that, it further includes a communication circuit for providing communication for the processor, a crystal oscillator circuit for providing a clock signal for the processor, a debugging circuit for providing a debugging interface for the processor, a first-level step-down processing circuit and a second-level step-down processing circuit for providing a working voltage for the processor, wherein the processor is respectively connected to the communication circuit, the crystal oscillator circuit, the debugging circuit and the second-level step-down processing circuit, and the second-level step-down processing circuit is connected to the first-level step-down processing circuit.

2. The intelligent integrated control center main board according to claim 1, characterized in that, the communication circuit includes two-way enabled RS485 communication interface circuits and two-way RS485 automatic transceiver communication interface circuits, each two-way enabled RS485 communication interface circuit and each two-way RS485 automatic transceiver communication interface circuit are respectively connected to the processor, and each two-way enabled RS485 communication interface circuit at least includes a communication interface conversion chip and a first terminal matching resistor (R33), the input end of the communication interface conversion chip is connected to the processor, and the output end of the communication interface conversion chip is connected to the first terminal matching resistor.

3. The intelligent integrated control center main board according to claim 2, characterized in that, each two-way RS485 automatic transceiver communication interface circuit at least includes a converter and a second terminal matching resistor, the input end of the converter is connected to the processor, and the output end of the converter is connected to the second terminal matching resistor (R18).

4. The intelligent integrated control center main board according to claim 1, characterized in that, the first-level step-down processing circuit includes a first power conversion chip, an avalanche breakdown diode (U6), a filter capacitor module (K1) and a first filter circuit (D1), the input end of the first power conversion chip is connected to the avalanche breakdown diode (U6) through the filter capacitor module, and the output end of the first power conversion chip is connected to the first filter circuit.

5. The intelligent integrated control center main board according to claim 1, characterized in that, the second-level step-down processing circuit at least includes a second power conversion chip and a second filter circuit, and the second power conversion chip is connected to the second filter circuit (D2).

6. The intelligent integrated control center main board according to claim 1, characterized in that, it further includes an externally expanded IO interface circuit, and the externally expanded IO interface circuit is connected to the processor.

7. The intelligent integrated control center main board according to claim 1, characterized in that, it further includes a boot circuit, a reset circuit, a battery, a power supply interface circuit and a positioning hole circuit, and the boot circuit, the reset circuit, the battery, the power supply interface circuit and the positioning hole circuit are respectively connected to the processor.

8. The intelligent integrated control center main board according to claim 1, characterized in that, it further includes a power status indication circuit, and the power status indication circuit is connected to the controller.

9. The intelligent integrated control center main board according to claim 1, characterized in that, The crystal oscillator circuit includes a first crystal oscillator (X1), a second crystal oscillator (X2), a chip resistor (R2), a second capacitor (C2), a third capacitor (C3), a sixth capacitor (C6), and a seventh capacitor (C7). The input end of the second crystal oscillator (X2) is connected to the processor, and the output end of the second crystal oscillator (X2) is respectively connected to the sixth capacitor (C6) and the seventh capacitor (C7).

10. The intelligent integrated control center main board according to claim 9, wherein The input end of the first crystal oscillator (X1) is connected to the processor, the output end of the first crystal oscillator (X1) is connected to the input end of the chip resistor (R2), and the output end of the chip resistor (R2) is respectively connected to the second capacitor (C2) and the third capacitor (C3).

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