Four-switch BUCK-BOOST converter peak current control circuit and four-switch BUCK-BOOST converter circuit
The four-switch BUCK-BOOST converter circuit with peak current control optimizes mode transitions, enhancing dynamic response and stability through voltage and current feedback, addressing inefficiencies in traditional control methods.
Patent Information
- Application Number
- CN202422036930.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-21
- Publication Date
- 2025-07-15
- Estimated Expiration
- 2034-08-21
AI Technical Summary
The traditional BUCK-BOOST switch converter cannot achieve smooth switching during working mode switching, resulting in reduced system stability and inability to optimize energy efficiency.
The peak current control circuit of the four-switch BUCK-BOOST converter is adopted, including a loop compensation circuit, a negative offset bias circuit and a MCU control circuit. The smooth switching and dynamic response of the working mode are achieved through the current peak reference and ramp compensation module.
The smooth working mode switching of the four-switch BUCK-BOOST converter is realized, which greatly improves the dynamic response speed and linear adjustment rate of the converter, and also has the instantaneous peak current current limiting function.
Smart Images

Figure CN223109897U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of electronic circuits, and particularly relates to a peak current control circuit for a four-switch BUCK-BOOST converter and a four-switch BUCK-BOOST converter circuit. Background Art
[0002] With the booming growth of the consumer electronics market, switching converter technology, especially the BUCK-BOOST type, has become an indispensable part. With its ability to flexibly adjust the input voltage to an output higher than, equal to, or lower than the original value, and its wide input voltage adaptability, this converter has shown great application potential in the field of power management.
[0003] The BUCK-BOOST switching converter is designed with three operating modes: boost, buck, and buck-boost, to meet the voltage conversion requirements in different scenarios. To optimize energy efficiency and reduce unnecessary energy losses, the system often needs to intelligently switch between these modes to ensure that only the necessary switching elements are activated. Traditional control methods rely on the comparison of the input voltage and the output voltage when switching operating modes, and cannot achieve smooth switching of the operating modes, resulting in reduced system stability.
[0004] Therefore, how to accurately control and optimize the switching of the operating modes of the BUCK-BOOST switching converter to achieve more efficient and stable power management has become an important direction for current technology research and application exploration. Summary of the Utility Model
[0005] In view of the above problems, the utility model provides a peak current control circuit for a four-switch BUCK-BOOST converter, a control method, and a four-switch BUCK-BOOST converter circuit, including the following:
[0006] In a first aspect, the utility model provides a peak current control circuit for a four-switch BUCK-BOOST converter. The BUCK-BOOST converter includes a current sampling circuit, and is characterized in that the control circuit includes: a loop compensation circuit, a negative offset bias circuit, and an MCU control circuit;
[0007] The input end of the loop compensation circuit is connected to the output voltage of the BUCK-BOOST converter, and the output end is connected to the third input end of the negative offset bias circuit and the second input end of the MCU control circuit; the loop compensation circuit is a voltage outer loop, and is used for inputting the output voltage into the loop compensation circuit and then outputting the current peak reference of the BUCK circuit;
[0008] The first input terminal of the negative offset bias circuit is connected to the output voltage, the second input terminal is connected to the input voltage of the BUCK-BOOST converter, and the output terminal is connected to the third input terminal of the MCU control circuit; the negative offset bias circuit is configured to output the current peak reference of the BOOST circuit after inputting the input voltage, the output voltage, and the current peak reference of the BUCK circuit into the negative offset bias circuit.
[0009] The first input terminal of the MCU control circuit is connected to the output terminal of the current sampling circuit, the first output terminal and the second output terminal are connected to the input terminal of the BUCK drive circuit, and the third output terminal and the fourth output terminal are connected to the input terminal of the BOOST drive circuit; the MCU control circuit is configured to output the drive signals of the BUCK circuit and the BOOST circuit through the current peak reference of the BUCK circuit, the current peak reference of the BOOST circuit, and the output value of the current sampling circuit.
[0010] Optionally, the negative offset bias circuit includes resistor R1, resistor R2, resistor R3, resistor R4, resistor R5, resistor R6, resistor R7, resistor R8, diode D1, and operational amplifier U1, where R3 = R4 = R7 = R8, R1 = R5, R2 = R6, and R1 << R2;
[0011] The first end of resistor R1 is connected to the first end of resistor R5 and the input voltage, and serves as the second input terminal of the negative offset bias circuit; the second end of resistor R1 is connected to the first end of resistor R2 and the second end of diode D1; the first end of diode D1 is connected to the output voltage and serves as the first input terminal of the negative offset bias circuit; the second end of resistor R2 is connected to the first end of resistor R3, the second end of resistor R4, and the first end of operational amplifier U1; the first end of resistor R4 is the third input terminal of the negative offset bias circuit; the second end of resistor R3 is grounded.
[0012] The first end of resistor R5 is connected to the input voltage, and the second end is connected to the first end of resistor R6; the second end of resistor R6 is connected to the first end of resistor R7, the first end of resistor R8, and the second end of operational amplifier U1; the second end of resistor R7 is connected to the third end of operational amplifier U1 and serves as the output terminal of the negative offset bias circuit; the second end of resistor R8 is connected to the reference voltage source inside the negative offset bias circuit.
[0013] Optionally, when the input voltage is less than the output voltage, diode D1 is turned off. At this time, the relationship between the current peak reference of the BOOST circuit and the current peak reference of the BUCK circuit is:
[0014] V Ref_boost = V Ref_buck - V bias ,
[0015] where V Ref_boost is the peak current reference of the BOOST circuit, V Ref_buck is the peak current reference of the BUCK circuit, and V bias is the voltage value of the reference voltage source;
[0016] When the input voltage is greater than the output voltage, the diode D1 conducts, and the second end of the diode D1 is clamped to the output voltage. At this time, the relationship between the peak current reference of the BOOST circuit and the peak current reference of the BUCK circuit is:
[0017] V Ref_boost = V Ref_buck - V bias - K(V in - V out ),
[0018]
[0019] where V in is the input voltage and V out is the output voltage.
[0020] Optionally, the MCU control circuit includes a first ramp compensation module, a second ramp compensation module, a first internal analog comparator, and a second internal analog comparator;
[0021] The input end of the first ramp compensation module is connected to the output end of the loop compensation circuit, and the output end is connected to the positive input end of the first internal analog comparator;
[0022] The input end of the second ramp compensation module is connected to the output end of the negative offset bias circuit, and the output end is connected to the positive input end of the second internal analog comparator;
[0023] The negative input ends of the first internal analog comparator and the second internal analog comparator are connected to the output end of the current sampling circuit.
[0024] Optionally, the first ramp compensation module is used to compensate the peak current reference of the BUCK circuit to obtain a compensated peak current reference value of the BUCK circuit;
[0025] The second ramp compensation module is used to compensate the peak current reference of the BOOST circuit to obtain a compensated peak current reference value of the BOOST circuit.
[0026] Optionally, the signals output from the first output terminal and the second output terminal of the MCU control circuit are complementary. The signal output from the first output terminal of the MCU control circuit is used to drive the upper transistor of the BUCK circuit, and the signal output from the second output terminal of the MCU control circuit is used to drive the lower transistor of the BUCK circuit;
[0027] The signals output from the third output terminal and the fourth output terminal of the MCU control circuit are complementary. The signal output from the third output terminal of the MCU control circuit is used to drive the lower transistor of the BOOST circuit, and the signal output from the fourth output terminal of the MCU control circuit is used to drive the upper transistor of the BOOST circuit.
[0028] Optionally, when the output value of the current sampling circuit is less than the compensated peak current reference value of the BUCK circuit, the first internal analog comparator outputs a high level, and the first output terminal of the MCU control circuit outputs a high level;
[0029] When the output value of the current sampling circuit is greater than the compensated peak current reference value of the BUCK circuit, the first internal analog comparator outputs a low level, and the first output terminal of the MCU control circuit outputs a low level.
[0030] In a second aspect, the present invention provides a four-switch BUCK-BOOST converter circuit, where the BUCK-BOOST converter circuit includes a BUCK circuit, a BOOST circuit, a BUCK drive circuit, a BOOST drive circuit, and a four-switch BUCK-BOOST converter peak current control circuit. The four-switch BUCK-BOOST converter peak current control circuit is the four-switch BUCK-BOOST converter peak current control circuit described in the first aspect above.
[0031] It can be seen from the technical solution of the present invention that the present invention has the following beneficial effects: Through this control circuit, not only can the smooth switching of different working modes of the four-switch BUCK-BOOST converter be realized, but also the dynamic response speed, linear regulation rate, and load regulation rate of the converter can be greatly improved, and at the same time, it has an instantaneous peak current limiting function. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] To more clearly illustrate the technical solutions in the present invention or the prior art, the following will briefly introduce the drawings required for the description of the present invention or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0033] Figure 1 The figure shows a structural diagram of a four-switch BUCK-BOOST converter circuit provided by an embodiment of the present invention;
[0034] Figure 2 It is a schematic structural diagram of a negative offset bias circuit provided by an embodiment of the present invention;
[0035] Figure 3 It is a waveform diagram of a peak current control circuit of a four-switch BUCK-BOOST converter in the BUCK mode provided by an embodiment of the present invention;
[0036] Figure 4 It is a waveform diagram of a peak current control circuit of a four-switch BUCK-BOOST converter in the BOOST mode provided by an embodiment of the present invention;
[0037] Figure 5 It is a waveform diagram of a peak current control circuit of a four-switch BUCK-BOOST converter in the BUCK-BOOST mode provided by an embodiment of the present invention. Specific embodiments
[0038] In order to make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts fall within the scope of protection of the present invention.
[0039] Figure 1 The figure shows a structural diagram of a four-switch BUCK-BOOST converter circuit provided by an embodiment of the present invention. The circuit structure of the four-switch BUCK-BOOST converter includes a BUCK circuit, a BOOST circuit, a BUCK drive circuit, a BOOST drive circuit, and a peak current control circuit of the four-switch BUCK-BOOST converter.
[0040] The BUCK circuit includes an input capacitor C1, an upper transistor Q1 of the BUCK circuit, a lower transistor Q2 of the BUCK circuit, a sampling resistor Rs, and a current sampling circuit; the BOOST circuit includes a lower transistor Q3 of the BOOST circuit, an upper transistor Q4 of the BOOST circuit, and an output capacitor C2. There is also a filter inductor L between the BUCK circuit and the BOOST circuit, and Q1-Q4 are all switching transistors.
[0041] The peak current control circuit of the four-switch BUCK-BOOST converter includes: a loop compensation circuit, a negative offset bias circuit, and an MCU control circuit.
[0042] The input end of the loop compensation circuit is connected to the output voltage, and the output end is connected to the third input end of the negative offset bias circuit and the second input end of the MCU control circuit; the first input end of the negative offset bias circuit is connected to the output voltage, the second input end is connected to the input voltage, and the output end is connected to the third input end of the MCU control circuit; the first input end of the MCU control circuit is connected to the output end of the current sampling circuit, the first output end PWM1H and the second output end PWM1L are connected to the input end of the BUCK drive circuit, the third output end PWM2H and the fourth output end PWM2L are connected to the input end of the BOOST drive circuit, and the input voltage and the output voltage refer to the input voltage and the output voltage of the BUCK-BOOST converter.
[0043] PWM1H drives the upper switch Q1 of the BUCK circuit after passing through the BUCK drive circuit, and PWM1L drives the lower switch Q2 of the BUCK circuit after passing through the BUCK drive circuit. PWM1H and PWM1L are complementary.
[0044] PWM2H drives the lower switch Q3 of the BOOST circuit after passing through the BOOST drive circuit, and PWM2L drives the upper switch Q4 of the BOOST circuit after passing through the BOOST drive circuit. PWM2H and PWM2L are complementary.
[0045] The loop compensation circuit is a voltage outer loop. After the output voltage passes through the loop compensation circuit, the current peak reference Ref_buck of the BUCK circuit is output; the negative offset bias circuit outputs the current peak reference Ref_boost of the BOOST circuit through the input voltage Vin, the output voltage Vout, and Ref_buck; the MCU control circuit outputs the PWM drive signals of the BUCK circuit and the BOOST circuit through Ref_buck, Ref_boost, and the output I_comp of the current sampling circuit;
[0046] Figure 2 It is a schematic structural diagram of the negative offset bias circuit provided by the embodiment of the present invention. As Figure 2 shown, the negative offset bias circuit includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a diode D1, and an operational amplifier U1.
[0047] Where R3 = R4 = R7 = R8, R1 = R5, R2 = R6, and R1 << R2; the first end of resistor R1 is connected to the first end of resistor R5 and the input voltage, and serves as the second input terminal of the negative offset bias circuit; the second end of resistor R1 is connected to the first end of resistor R2 and the second end of diode D1; the first end of diode D1 is connected to the output voltage and serves as the first input terminal of the negative offset bias circuit; the second end of resistor R2 is connected to the first end of resistor R3, the second end of resistor R4, and the first end of operational amplifier U1; the first end of resistor R4 is the third input terminal of the negative offset bias circuit; the second end of resistor R3 is connected to ground; the first end of resistor R5 is connected to the input voltage, and the second end is connected to the first end of resistor R6; the second end of resistor R6 is connected to the first end of resistor R7, the first end of resistor R8, and the second end of operational amplifier U1; the second end of resistor R7 is connected to the third end of operational amplifier U1 and serves as the output terminal of the negative offset bias circuit; the second end of resistor R8 is connected to the internal reference voltage source Vbias;
[0048] When the input voltage Vin is less than the output voltage Vout, diode D1 is cut off. Ignoring the diode voltage drop, the voltage at the positive input terminal of operational amplifier U1 is:
[0049]
[0050] The voltage at the negative input terminal of operational amplifier U1 is:
[0051]
[0052] The voltage at the positive input terminal of the operational amplifier is equal to V + = V - ;
[0053] Since R3 = R4 = R7 = R8, R1 = R5, R2 = R6, and R1 << R2, after simplification, we can get:
[0054] V Ref_boost = V Ref_buck - V bias ;
[0055] When the input voltage Vin is greater than the output voltage Vout, diode D1 conducts, and the second end of diode D1 is clamped to the output voltage. Ignoring the diode voltage drop, the voltage at the positive input terminal of operational amplifier U1 is:
[0056]
[0057] The voltage at the negative input terminal of operational amplifier U1 is:
[0058]
[0059] The voltage at the positive input terminal and the negative input terminal of the operational amplifier is equal, V + = V - ;
[0060] Since R3 = R4 = R7 = R8, R1 = R5, R2 = R6, and R1 << R2, after simplification, we can get:
[0061] V Ref_boost = V Ref_buck - V bias - K(V in - V out );
[0062]
[0063] Figure 3 This is the waveform diagram of a peak current control circuit for a four-switch BUCK-BOOST converter provided by an embodiment of the present invention in the BUCK mode. In the BUCK mode, the input voltage Vin is greater than the output voltage Vout. From the above formula, we can get:
[0064] V Ref_buck - V Ref_boost = V bias + K(V in - V out );
[0065] Figure 3 In the figure, Comp_buck is obtained by slope compensation of Ref_buck through the first slope compensation module, and Comp_boost is obtained by slope compensation of Ref_boost through the second slope compensation module. The slope compensation amounts of the two are the same. Therefore, we can get:
[0066] V Comp_buck - V Comp_boost = V bias + K(V in - V out );
[0067] As Figure 3 shown, in the BUCK mode, when the output I_comp of the current sampling circuit is less than Comp_buck, the internal first analog comparator cmp1 outputs a high level, PWM1H outputs a high level, and the drive of the BUCK upper transistor is at a high level. When the output I_comp of the current sampling circuit is equal to Comp_buck, the internal analog comparator 1 outputs a low level, PWM1H outputs a low level, and the drive of the BUCK upper transistor is at a low level. PWM1H and PWM1L are complementary relationships;
[0068] In the BUCK mode, the output I_comp of the current sampling circuit is always greater than Comp_boost. The internal second analog comparator cmp2 always outputs a low level, PWM2H outputs a low level, and the BOOST lower transistor drive is always at a low level, in a normally-off state. PWM2H and PWM2L are in a complementary relationship. Therefore, the BOOST upper transistor drive is always at a high level, in a normally-on state.
[0069] Figure 4 The waveform diagram of a four-switch BUCK-BOOST converter peak current control circuit provided by an embodiment of the present invention in the BOOST mode is as Figure 4 shown. In the BUCK mode, the input voltage Vin is less than the output voltage Vout. From the above formula, it can be obtained that:
[0070] V Ref_buck -V Ref_boost =V bias ;
[0071] Figure 4 Among them, Comp_buck is obtained by slope compensation of Ref_buck, and Comp_boost is obtained by slope compensation of Ref_boost. The slope compensation amounts of the two are the same. Therefore, it can be obtained that:
[0072] V Comp_buck -V Comp_boost =V bias ;
[0073] As Figure 4 shown, in the BOOST mode, when the output I_comp of the current sampling circuit is less than Comp_boost, the second internal analog comparator outputs a high level, PWM2H outputs a high level, and the BOOST lower transistor drive is at a high level. When the output I_comp of the current sampling circuit is greater than Comp_boost, the second internal analog comparator outputs a low level, PWM2H outputs a low level, and the BOOST lower transistor drive is at a low level. PWM2H and PWM2L are in a complementary relationship;
[0074] In the BOOST mode, the output I_comp of the current sampling circuit is always less than Comp_buck. The first internal analog comparator always outputs a high level, PWM1H outputs a high level, and the BUCK upper transistor drive is always at a high level, in a normally-on state. PWM1H and PWM1L are in a complementary relationship. Therefore, the BUCK lower transistor drive is always at a low level, in a normally-off state.
[0075] Figure 5 The waveform diagram of a four-switch BUCK-BOOST converter peak current control circuit provided by an embodiment of the present invention in the BUCK-BOOST mode is asFigure 5 As shown, in the BUCK - BOOST mode, the input voltage Vin is basically equal to the output voltage Vout, and V in -V out ≈0. From the above formula, it can be obtained that: V Ref_buck -V Ref_boost =V bias ;
[0076] Figure 5 In [the figure], Comp_buck is obtained by slope compensation of Ref_buck, and Comp_boost is obtained by slope compensation of Ref_boost. The slope compensation amounts of the two are the same. Therefore, it can be obtained that:
[0077] V Comp_buck -V Comp_boost =V bias ;
[0078] As Figure 5 shown, in the BUCK - BOOST mode, when the output I_comp of the current sampling circuit is less than Comp_buck, the first internal analog comparator outputs a high level, PWM1H outputs a high level, and the drive of the BUCK upper transistor is at a high level. When the output I_comp of the current sampling circuit is greater than Comp_buck, the first internal analog comparator outputs a low level, PWM1H outputs a low level, and the drive of the BUCK upper transistor is at a low level. PWM1H and PWM1L are complementary. In the BUCK - BOOST mode, when the output I_comp of the current sampling circuit is less than Comp_boost, the second internal analog comparator outputs a high level, PWM2H outputs a high level, and the drive of the BOOST lower transistor is at a high level. When the output I_comp of the current sampling circuit is greater than Comp_boost, the second internal analog comparator outputs a low level, PWM2H outputs a low level, and the drive of the BOOST lower transistor is at a low level. PWM2H and PWM2L are complementary.
[0079] The present utility model provides a control circuit. This control circuit is applied to a four - switch converter, which can not only well realize the control of the four - switch BUCK - BOOST converter, enabling smooth switching of the BUCK - BOOST working mode, but also adopts a peak current control mode, having characteristics such as fast transient closed - loop response, fast transient response to changes in the input voltage and output load, easy design of the control loop, and at the same time having an instantaneous peak current limiting function.
[0080] The above are only the preferred embodiments of the present utility model, and do not impose any form of limitation on the present utility model. Although the present utility model has been disclosed above with the preferred embodiments, it is not intended to limit the present utility model. Any person skilled in the art can, without departing from the scope of the technical solution of the present utility model, make many possible changes and modifications to the technical solution of the present utility model by using the technical content disclosed above, or modify it into equivalent embodiments with equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present utility model without departing from the content of the technical solution of the present utility model still fall within the scope of protection of the technical solution of the present utility model.
Claims
1. A peak current control circuit for a four-switch buck-boost converter, wherein the buck-boost converter includes a current sampling circuit, and is characterized in that, The control circuit includes: a loop compensation circuit, a negative offset bias circuit, and an MCU control circuit; The input end of the loop compensation circuit is connected to the output voltage of the BUCK-BOOST converter, and the output end is connected to the third input end of the negative offset bias circuit and the second input end of the MCU control circuit; the loop compensation circuit is a voltage outer loop, which is used to input the output voltage into the loop compensation circuit and then output the current peak reference of the BUCK circuit; The first input end of the negative offset bias circuit is connected to the output voltage, the second input end is connected to the input voltage of the BUCK-BOOST converter, and the output end is connected to the third input end of the MCU control circuit; the negative offset bias circuit is used to input the input voltage, the output voltage, and the current peak reference of the BUCK circuit into the negative offset bias circuit and then output the current peak reference of the BOOST circuit; The first input end of the MCU control circuit is connected to the output end of the current sampling circuit, the first output end and the second output end are connected to the input end of the BUCK drive circuit, and the third output end and the fourth output end are connected to the input end of the BOOST drive circuit; the MCU control circuit is used to output the drive signals of the BUCK circuit and the BOOST circuit through the current peak reference of the BUCK circuit, the current peak reference of the BOOST circuit, and the output value of the current sampling circuit.
2. The control circuit according to claim 1, characterized in that The negative offset bias circuit includes resistors R1, R2, R3, R4, R5, R6, R7, R8, diode D1, and operational amplifier U1, where R3 = R4 = R7 = R8, R1 = R5, R2 = R6, and R1 << R2; The first end of resistor R1 is connected to the first end of resistor R5 and the input voltage, and serves as the second input end of the negative offset bias circuit; the second end of resistor R1 is connected to the first end of resistor R2 and the second end of diode D1; the first end of diode D1 is connected to the output voltage and serves as the first input end of the negative offset bias circuit; the second end of resistor R2 is connected to the first end of resistor R3, the second end of resistor R4, and the first end of operational amplifier U1; the first end of resistor R4 is the third input end of the negative offset bias circuit; the second end of resistor R3 is connected to ground; The first end of resistor R5 is connected to the input voltage, and the second end is connected to the first end of resistor R6; the second end of resistor R6 is connected to the first end of resistor R7, the first end of resistor R8, and the second end of operational amplifier U1; the second end of resistor R7 is connected to the third end of operational amplifier U1 and serves as the output end of the negative offset bias circuit; the second end of resistor R8 is connected to the reference voltage source inside the negative offset bias circuit.
3. The control circuit according to claim 2, wherein When the input voltage is less than the output voltage, the diode D1 is cut off. At this time, the relationship between the current peak reference of the BOOST circuit and the current peak reference of the BUCK circuit is as follows: V Ref_boost = V Ref_buck - V bias , Among them, V Ref_boost is the current peak reference of the BOOST circuit, V Ref_buck is the current peak reference of the BUCK circuit, V bias is the voltage value of the reference voltage source; When the input voltage is greater than the output voltage, the diode D1 conducts, and the second end of the diode D1 is clamped to the output voltage. At this time, the relationship between the current peak reference of the BOOST circuit and the current peak reference of the BUCK circuit is as follows: V Ref_boost = V Ref_buck - V bias - K(V in - V out ) Where V in is the input voltage, and V out is the output voltage.
4. The control circuit according to claim 1, wherein The MCU control circuit includes a first ramp compensation module, a second ramp compensation module, a first internal analog comparator, and a second internal analog comparator; The input end of the first ramp compensation module is connected to the output end of the loop compensation circuit, and the output end is connected to the positive input end of the first internal analog comparator; The input end of the second ramp compensation module is connected to the output end of the negative offset bias circuit, and the output end is connected to the positive input end of the second internal analog comparator; The negative input end of the first internal analog comparator and the negative input end of the second internal analog comparator are connected to the output end of the current sampling circuit.
5. The control circuit according to claim 4, wherein The first ramp compensation module is used to compensate the current peak reference of the BUCK circuit to obtain a compensated current peak reference value of the BUCK circuit; The second ramp compensation module is used to compensate the current peak reference of the BOOST circuit to obtain a compensated current peak reference value of the BOOST circuit.
6. The control circuit according to claim 1, characterized in that, The signals output from the first output end and the second output end of the MCU control circuit are complementary. The signal output from the first output end of the MCU control circuit is used to drive the upper transistor of the BUCK circuit, and the signal output from the second output end of the MCU control circuit is used to drive the lower transistor of the BUCK circuit; The signals output from the third output end and the fourth output end of the MCU control circuit are complementary. The signal output from the third output end of the MCU control circuit is used to drive the lower transistor of the BOOST circuit, and the signal output from the fourth output end of the MCU control circuit is used to drive the upper transistor of the BOOST circuit.
7. The control circuit according to claim 5, characterized in that When the output value of the current sampling circuit is less than the compensated current peak reference value of the BUCK circuit, the first internal analog comparator outputs a high level, and the first output end of the MCU control circuit outputs a high level; When the output value of the current sampling circuit is greater than the compensated current peak reference value of the BUCK circuit, the first internal analog comparator outputs a low level, and the first output end of the MCU control circuit outputs a low level.
8. A four-switch buck-boost converter circuit, characterized in that, The BUCK-BOOST converter circuit includes a BUCK circuit, a BOOST circuit, a BUCK drive circuit, a BOOST drive circuit, and a four-switch BUCK-BOOST converter peak current control circuit. The four-switch BUCK-BOOST converter peak current control circuit is the four-switch BUCK-BOOST converter peak current control circuit described in any one of the above claims 1-7.