Circuit capable of periodically converting pulse signal into direct-current voltage

Abstract

The utility model discloses a circuit capable of periodically converting a pulse signal into a direct current voltage, which comprises a constant current source circuit, a high-capacity core capacitor circuit, a core capacitor discharging circuit, an input pulse signal rising edge detection circuit, a linear sawtooth wave charging voltage buffer circuit and an integrating circuit, an operational amplifier A3, a resistor R4, a resistor R13 and a diode D1 form a core capacitor discharging circuit to provide a discharging channel for the capacitor C1, an operational amplifier A4, a resistor R5, a resistor R6, a resistor R7, a capacitor C2 and a diode D2 form an input pulse signal rising edge detection circuit, once the rising edge of Ui reaches a pin 13 of the operational amplifier A4, the A3 outputs-Vcc voltage, the capacitor C1 discharges through the resistor R13 and the diode D1, linear sawtooth wave charging voltage at the positive end of the capacitor C1 is amplified through a buffer circuit, and the linear sawtooth wave charging voltage is output through the capacitor C2. Smooth direct-current voltage Uo is output through the integrating circuit, and R11 is adjusted, so that the period T of the input pulse signal Ui is basically equal to the output voltage value Uo of the integrating circuit.

Description

Technical Field

[0001] The utility model relates to a technology for directly measuring the period of a pulse signal with an ordinary multimeter. If it is desired to measure the period of a sine wave signal, the sine wave signal can be first converted into a rectangular wave signal through a hysteresis comparator, and then the sine wave period can be measured through this technology Background Art

[0002] The V / F (voltage / frequency) converter and the F / V (frequency / voltage) converter are respectively another form of A / D and D / A conversion. The former is used to convert the analog voltage signal into a TTL-level pulse frequency signal, while the latter is used to convert the frequency signal into a voltage signal, which are relatively common circuit modules in digital circuit design

[0003] The frequency of a pulse signal is easy to measure, which can be achieved by using a frequency meter. If it is desired to directly measure the period T of a pulse signal, there is currently no ready-made test instrument or test method. Of course, the period can be obtained by measuring the frequency F of the pulse signal, and its reciprocal is the period, that is, T = 1 / F

[0004] However, if there is no frequency meter or oscilloscope at hand, the period of the pulse signal cannot be measured. The multimeter is very popular, and its price is much cheaper than that of the frequency meter or oscilloscope. It is the most commonly used electronic measuring instrument for electricians and electronic technicians. It can measure parameters such as voltage, current, and resistance. However, the most common multimeters generally cannot measure frequency. Even some high-end multimeters can measure frequency, but their measurement accuracy is low and the measurement error is large. They are only suitable for measuring signals with relatively low frequencies, generally not exceeding a few kilohertz, and can only be used for a preliminary judgment of the presence or absence of frequency. Moreover, do not use a multimeter to measure high-frequency and high-voltage signals beyond the frequency measurement range. First, the measurement results are generally poor, and second, it is easy to damage the digital multimeter

[0005] A circuit for converting the period of a pulse signal into a DC voltage can be designed, which is simply called a T / V (period / voltage) conversion circuit. Using a constant current source I C1 to charge a large-capacity capacitor C1, and a discharge circuit controlled by the input pulse signal u I as the discharge loop of the above-mentioned large-capacity capacitor. When the first rising edge of the input pulse signal u I arrives, the discharge loop quickly discharges the charge stored in the large-capacity capacitor in a very short time, and a very narrow negative pulse is formed at the end of the capacitor C1. After the discharge is completed, the constant current source I C1 linearly charges the large-capacity capacitor C1, and tries to make the capacitor C1 continuously linearly charged within the first period of the input pulse signal u I u I ​After the first cycle of the signal, u I the second rising edge arrives again. The above discharge circuit discharges the capacitor C1 at high speed again, and a second extremely narrow negative pulse is formed at the C1 terminal. After the discharge is completed, the constant current source charges the capacitor C1 linearly for the second time.

[0006] The above process repeats. The charging / discharging voltage at the upper end of the capacitor C1 shows a linear sawtooth wave signal. The sawtooth wave voltage continues to pass through a filter circuit composed of a potentiometer and a filter capacitor to smooth the sawtooth wave voltage into a DC voltage output. U O , adjust the potentiometer so that the input u I period T (unit: s) of the signal is equal to U O the DC voltage value (unit: V). Since the C1 terminal of the capacitor is charged linearly, U O the DC voltage value can be read directly. u I For the period T of the signal, the larger the period T, the U O larger the DC voltage value. Finally, it successfully realizes the measurement of the period of the input pulse signal by a cheap universal multimeter. Of course, the higher the accuracy of the multimeter, the better the conversion effect.

[0007] If you want to measure the period of a sine wave signal, you can first convert the sine wave signal into a rectangular wave signal through a hysteresis comparator, and then measure the sine wave period by the above method. Summary of the Invention

[0008] The technical problem to be solved by the present utility model is to provide a design technology for converting the period of a pulse signal into a DC voltage with a simple structure, reliable use and low cost.

[0009] To achieve the above object, the present utility model provides a circuit that can convert the period of a pulse signal into a DC voltage, which includes a constant current source circuit, a large-capacity core capacitor circuit, a core capacitor discharge circuit, an input pulse signal rising edge detection circuit, a linear sawtooth wave charging voltage buffer circuit, and an integration circuit; the operational amplifier A1, resistor R1, resistor R2, resistor R3, and transistor T1 constitute the constant current source circuit; the collector of transistor T1 is connected to the working ground through the forward capacitor C1, and the power supply Vcc charges the large-capacity core capacitor circuit, i.e., capacitor C1, through resistor R3 and the E-C pole of transistor T1 in sequence; the operational amplifier A3, resistor R4, resistor R13, and diode D1 constitute the core capacitor discharge circuit, the non-inverting input terminal of operational amplifier A3 is connected to the working ground through resistor R4, the output terminal of operational amplifier A3 is connected to the positive terminal of capacitor C1, i.e., the collector of transistor T1, through the reverse diode D1 and resistor R13 in sequence, and the inverting input terminal of operational amplifier A3 is connected to the positive electrode of diode D1. If the voltage at the inverting input terminal of operational amplifier A3 is higher than the voltage at the non-inverting input terminal, the output voltage of operational amplifier A3 is -Vcc, and the charging charge of capacitor C1 discharges to the output terminal of operational amplifier A3 through resistor R13 and the forward diode D1; the operational amplifier A4, resistor R5, resistor R6, resistor R7, capacitor C2, and diode D2 constitute the input pulse signal rising edge detection circuit, the input pulse signal Ui is connected to the non-inverting input terminal of operational amplifier A4 through the forward capacitor C2, the power supply +Vcc is connected to the working ground through resistor R7 and resistor R6 in sequence, the connection point of resistor R7 and resistor R6 is connected to the non-inverting input terminal of operational amplifier A4 to provide a 0.1V bias voltage for the non-inverting input terminal of operational amplifier A4, the output terminal of operational amplifier A4 is connected to the non-inverting input terminal of operational amplifier A3 through the forward diode D2, and the negative terminal of capacitor C2 is connected to the working ground through resistor R5. If the rising edge of the input pulse signal Ui arrives, the output voltage of operational amplifier A4 is inverted to -Vcc, resulting in the voltage at the non-inverting input terminal of operational amplifier A3 being lower than the voltage at the inverting input terminal of A3, and the output voltage of operational amplifier A3 being -Vcc; the operational amplifier A2, resistor R8, and resistor R9 constitute the linear sawtooth wave charging voltage buffer circuit, and the linear sawtooth wave charging voltage at the positive terminal of capacitor C1 is buffered and amplified through the linear sawtooth wave charging voltage buffer circuit; resistor R10, potentiometer R11, resistor R12, and capacitor C3 constitute the integration circuit, and the integration circuit smooths the linear sawtooth wave charging voltage taken from the sliding end of R11 into a DC output voltage Uo. By adjusting the potentiometer R11, the period T of the input pulse signal Ui can be made substantially equivalent to the output voltage value Uo of the integration circuit, and the period T of the signal can be directly read out with an ordinary multimeter. u I The period T of the signal.

[0010] For the constant current source circuit, the power supply +Vcc is connected to the working ground through resistor R1 and resistor R2 in sequence. The connection point of resistor R1 and resistor R2 is connected to the non-inverting input terminal of operational amplifier A1, providing a stable voltage for the non-inverting input terminal of operational amplifier A1. The inverting input terminal of operational amplifier A1 is connected to the emitter of transistor T1. Then, the current passing through the E-C pole of transistor T1 is a constant current source.

[0011] For the linear sawtooth charging voltage buffer circuit, the non-inverting input terminal of operational amplifier A2 is connected to the collector of transistor T1. The inverting input terminal of operational amplifier A2 is connected to the working ground through resistor R9. At the same time, the inverting input terminal of operational amplifier A2 is connected to the output terminal of operational amplifier A2 through resistor R8.

[0012] For the integrating circuit, the amplified linear sawtooth charging voltage signal output by operational amplifier A2 is connected to the working ground through potentiometer R11 and resistor R12 in sequence. The sliding terminal of potentiometer R11 is connected to the working ground through resistor R10 and forward electrolytic capacitor C3 in sequence. The positive terminal of electrolytic capacitor C3 outputs a DC voltage value Uo. Description of the Drawings

[0013] Appendix Figure 1 、Appendix Figure 2 、used to provide further understanding of the present invention and constitutes a part of this application. Appendix Figure 1 is a pulse signal period / voltage conversion circuit; Appendix Figure 2 is the waveform diagram of each key point of the T / U converter. Detailed Embodiment

[0014] The following further describes the embodiments of the present invention with reference to the drawings

[0015] The T / V conversion circuit can convert the period of an input signal into a DC voltage that can be measured with a multimeter. This circuit is made of only one TL084 four-JEFT input operational amplifier, as Figure 1 shown.

[0016] . The integrated operational amplifier TL084 belongs to a high-speed J-FET input four-channel operational amplifier, which contains well-matched high-voltage J-FETs and bipolar transistors in a single monolithic integrated circuit. It has characteristics such as a wide common-mode (Vcc+) and differential voltage range, low input bias and offset current, output short-circuit protection, a high-input impedance J-FET input stage, internal frequency compensation, latch-free operation, and a high cycling rate. A1, A2, A3, and A4 all belong to one of the operational amplifiers of TL084.

[0017] Consisting of Figure 1It can be seen that the T / V converter includes a constant current source circuit, a large-capacity core capacitor circuit, a core capacitor discharge circuit, an input pulse signal rising edge detection circuit, a linear sawtooth charging voltage buffer circuit, and an integration circuit, which will be described in detail below.

[0018] Based on the "virtual open" and "virtual short" characteristics of the integrated operational amplifier, a constant current source is formed

[0019] For an integrated operational amplifier, the larger the open-loop voltage gain, the closer the potentials of the two input terminals are to being equal. This characteristic is called virtual short; an integrated operational amplifier has the characteristic of high input impedance. Generally, the input resistances of the non-inverting input terminal and the inverting input terminal are both above 1 MΩ. Therefore, no current is allowed to flow into the input terminals of an ideal operational amplifier, that is, the current signals at the two endpoints of the non-inverting and inverting input signals are always zero. This characteristic is called virtual open.

[0020] These characteristics of the operational amplifier are widely used in Figure 1 It is well understood in the following. The operational amplifier A1, resistors R1, R2, R3, and transistor T1 form a constant current source, and the principle is briefly introduced as follows.

[0021] Power supply + U cc (+15V) provides a bias voltage for the non-inverting terminal of A1 through resistors R1 and R2. Based on the "virtual open" characteristic of operational amplifier A1, the current flowing into the non-inverting input terminal 3 of operational amplifier A1 is "0". Then, the voltage at point M (i.e., the non-inverting terminal 3 of A1) at the intersection of R1 and R2 is a stable value U M =(R2 / (R2 + R1))×15 = 12V; at the same time, based on the "virtual short" characteristic of the operational amplifier, the inverting terminal of operational amplifier A1 (i.e., the emitter of transistor T1) is also 12V. Since the differential input voltage of operational amplifier A1 is almost "0", the output terminal of A1 (i.e., the base of transistor T1) is also a stable voltage, which ultimately causes transistor T1 to form a constant current source to provide a constant charging current for the large-capacity charging capacitor C1. The charging current of C1 is given by the following formula:

[0022]

[0023] It should be emphasized that the large-capacity charging capacitor C1 (4700 uF) is the core component of the U / T conversion system of this design. Through the charging and discharging time T (charging time + discharging time) of this capacitor, the period time (duty cycle time + non-duty cycle time) of the output pulse signal can be equivalently calculated. In fact, since the discharging time of capacitor C1 is relatively short, it can be almost ignored.

[0024] The charging and discharging processes of capacitor C1 are as Figure 2 of u D shown in the curve. In the figureu A、 u B , u C , u D are respectively Figure 1 the levels of points A, B, C, and D in the circuit, u I and is the input pulse signal.

[0025] Large-capacity capacitor C1 discharge circuit

[0026] Figure 1 In the circuit, it is known that the charging path of the core capacitor C1 is the transistor T1. Based on the "virtual open" characteristic of the operational amplifier A2, the discharge path of the capacitor C1 cannot pass through the operational amplifier A2, but can only be received by the operational amplifier A3 through the resistor R13. Therefore, the large-capacity capacitor C1 discharge circuit is composed of the operational amplifier A3, the resistor R4, the diode D1, and the resistor R13. If the charge stored in C1 is to be discharged through the operational amplifier A3, the output of A3 must be made "0" (in this design, it actually becomes about -13V).

[0027] Observe Figure 1 , the inverting input terminal of the operational amplifier A3 is connected to the output terminal of the operational amplifier A3 through the diode D1. Therefore, the operational amplifier A3 actually forms a voltage follower. Then, as long as the non-inverting input terminal of the operational amplifier A3 is "0", the output terminal of A3 is "0", and the capacitor C1 discharges through the resistor R13 and the diode D1 to "0" (in this design, it actually becomes about -13V).

[0028] The voltage of the non-inverting input terminal of A3 is controlled by the output terminal of the operational amplifier A4 in the input pulse rising edge detection circuit.

[0029] Input pulse signal rising edge detection circuit: The integrated operational amplifier A4, the capacitor C2, the resistors R5, R6, R7, and the diode D2 form a rising edge detection circuit for the input pulse signal u I .

[0030] Through Figure 2 it can be known that the inverting input terminal of the operational amplifier A4 (i.e., point A) is generally at the logic level "0", and the core capacitor C1 is in the linear charging process; only when the pulse signal u I inverts from the "0" level to the "high" level instantaneously (rising edge), there is a very short positive pulse level. During this period, the core capacitor C1 will discharge quickly in a short time; in addition, only when the input pulse signal u I inverts from the "high" level to the "0" level instantaneously (falling edge), there is a very short negative level pulse. Although it is a negative pulse, the charging process of the core capacitor C1 (u D The signal) still has not been cut off, as Figure 2 of u A and u D the signal shows, and the principle is as follows.

[0031] + U cc successively provides a bias voltage for the non-inverting input terminal of operational amplifier A4 through resistor R7 and R6, with the working ground U A4-12 = (R6 / (R6 + R7)) * 15 ≈ 0.1V, that is, the non-inverting input terminal of operational amplifier A4 is stably biased slightly to 0.1V. During the period when the pulse input signal u I is stably maintained at the "0" level, the signal at point A is at the "0" level. Therefore, the steady-state output of operational amplifier A4 will reach about +13V. This voltage is sent to the non-inverting input terminal of operational amplifier A3 through forward diode D2. A3 is in a follower state, making the output of operational amplifier A3 set to +13V. Diode D1 is reversely cut off. Therefore, the discharge path of capacitor C1 is cut off at point "D", and the constant current source formed by transistor T1 constantly charges capacitor C1 with a constant current, u C1 and the voltage (i.e., the voltage at point D) linearly increases, as Figure 2 in u D the waveform shows. Assuming the initial voltage on C1 is zero, its maximum charging voltage u C1-MAX can be obtained from the following formula:

[0032]

[0033] If t = 1mS, then u C1-MAX = 1.362V, where t is the linear charging time of C1.

[0034] Once u I it reverses from the "0" level to a high level (i.e., the rising edge), based on the characteristic that the voltage at the capacitor C2 terminal cannot change suddenly, point A also instantaneously reverses to a high level. Due to the existence of discharge resistor R5, point A is actually an extremely narrow positive pulse (as Figure 2 of u ASignal), since the non-inverting terminal of operational amplifier A4 is only 0.1V, during the extremely narrow positive pulse at point A, the output of operational amplifier A4 (i.e., point B) is inverted to -13V. This negative voltage turns off diode D2. Then, the voltage at the non-inverting input terminal of operational amplifier A3 becomes zero, and the output of A3 is zero (in this design, it actually becomes around -13V), that is, point C is zero (in this design, it actually becomes around -13V). Then, the charge stored on the core capacitor C1 will be absorbed (discharged) by operational amplifier A3 in an extremely short time. u C1 The voltage drops rapidly to "0", that is, the voltage at point D is "0", as Figure 2 shown. u D of the voltage.

[0035] Therefore, the level at point D actually depends on the level at point C, the level at point C actually depends on the level at point B, and the level at point B depends on the level at point A. During the extremely narrow positive pulse at point A, resistor R5 quickly discharges capacitor C2. The time constant τ of C2 and R5 determines the charging and discharging time of C2, and also determines the discharging time of the core capacitor C1. The capacitance of C2 is relatively small but it discharges through resistor R5. The capacitance of C1 is very large, but it discharges through the forward diode to the "0" level (in this design, it actually becomes around -13V) at the output terminal of operational amplifier A3. Therefore, the discharging time of C2 is equal to the discharging time of C1, and this period is about 10uS, as Figure 2 shown in the u A signal u D and waveform.

[0036] After capacitor C2 finishes discharging, the level at point A becomes "0" again. As long as the rising edge (i.e., the positive pulse) of the input pulse signal u I does not reach but always remains "0", the level at point A will always remain "0" or "negative level", as Figure 2 shown in the u A waveform.

[0037] Once u I it changes from the "0" level to a high level (i.e., the rising edge arrives), a very narrow positive pulse appears at point A again. Figure 1 The levels of each key point in the circuit will change again as described above, and this process repeats continuously, as Figure 2 shown.

[0038] Summarizing the above analysis, each period T of the input pulse signal u I is the sum of the charging and discharging times of the core capacitor C1, realizing the input pulse signal uI Rising edge detection: two rising edge intervals form one period T.

[0039] Therefore, as long as the charging and discharging voltages of the core capacitor C1 are averaged, the resulting DC voltage U O can equivalently reflect the input pulse signal u I period.

[0040] Linear sawtooth wave charging voltage buffer circuit

[0041] The output terminal of operational amplifier A2 is connected to the inverting input terminal of A2 through resistor R8, and the linear sawtooth wave charging voltage of the core capacitor C1 is input to the non-inverting input terminal of A2. Therefore, voltage series negative feedback is introduced into the circuit. In fact, operational amplifier A2, resistors R8, and R9 form a non-inverting proportional operation circuit, and its gain is

[0042]

[0043] In other words, this non-inverting proportional operation circuit is a buffer with a gain equal to 1.545. Obviously, the average voltage at the output terminal of operational amplifier A2 U A2-7 is approximately (1362t x 1.545) / 2 = 1052t.

[0044] The linear sawtooth wave charging voltage is smoothed into a DC output through a low-pass filter circuit or an integration circuit

[0045] The potentiometer R11, resistor R12, and the working ground form a resistor divider. The above average voltage U A2-7 value takes out a voltage value equivalent to the period T of the input pulse signal at the sliding end of the potentiometer R11 through this divider.

[0046] Filter circuits are often used to filter out the ripple in the rectified output voltage, generally composed of reactance elements. For example, a capacitor C is connected in parallel across the load resistor, or an inductor L is connected in series with the load, as well as various complex filter circuits composed of capacitors and inductors. Resistor R10 and capacitor C3 form a low-pass filter circuit or an integration circuit. The integration circuit can accumulate the input signal over time to obtain the output signal. Therefore, it can achieve functions such as averaging the input signal and removing high-frequency noise, and finally smooth the linear sawtooth wave charging voltage taken out at the sliding end of R11 into a DC output.

[0047] Adjust the calibration potentiometer R11 so that the 5V DC output is equal to an input pulse signal of 5mS u IDuring the period, since the charging of the core capacitor is borne by a constant current source, through this correction, using this period / voltage (T / U) conversion circuit, an input pulse signal u I The period T is basically equivalent to the output DC voltage value of the T / U conversion circuit U O and can be directly read out by an ordinary multimeter u I the period of the signal.

[0048] The conversion accuracy depends on the T / U conversion circuit, so Figure 1 the selection of each component in the circuit is very important. Precision components are required for resistors and capacitors, and a high-speed and high-precision integrated operational amplifier is selected for the operational amplifier. Of course, it also has a great relationship with the accuracy of the measuring multimeter. The higher the accuracy of the meter, the more accurately the measured DC voltage value can reflect u I the period of the signal.

[0049] For the input pulse signal u I with a period T, the measurement range of this conversion circuit is between 10uS and 5mS, which is converted to a frequency between 200Hz and 100kHz. Therefore, compared with a multimeter with a frequency measurement function, this T / U converter has a wider measurement range, better practicability and novelty, and also has a certain degree of creativity.

[0050] The above embodiments are only used to illustrate rather than limit the technical solutions of the present invention. Although the present invention has been described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that; still modifications or equivalent replacements can be made to the present invention, and any modification or partial replacement without departing from the spirit and scope of the present invention shall be covered by the scope of the claims of the present invention.

Claims

1. A circuit that can convert the period of a pulse signal into a DC voltage, characterized in that, The circuit that can convert the pulse signal period into a DC voltage includes a constant current source circuit, a large-capacity core capacitor circuit, a core capacitor discharge circuit, an input pulse signal rising edge detection circuit, a linear sawtooth charging voltage buffer circuit, and an integration circuit; the operational amplifier A1, resistor R1, resistor R2, resistor R3, and transistor T1 constitute the constant current source circuit; The collector of transistor T1 is connected to the working ground through the forward capacitor C1, and the power supply Vcc charges the large-capacity core capacitor circuit, i.e., capacitor C1, through the resistor R3 and the E-C pole of transistor T1 in sequence; the operational amplifier A3, resistor R4, resistor R13, and diode D1 constitute the core capacitor discharge circuit. The non-inverting input terminal of operational amplifier A3 is connected to the working ground through resistor R4. The output terminal of operational amplifier A3 is connected to the positive terminal of capacitor C1, i.e., the collector of transistor T1, through the reverse diode D1 and resistor R13 in sequence. The inverting input terminal of operational amplifier A3 is connected to the positive electrode of diode D1; the operational amplifier A4, resistor R5, resistor R6, resistor R7, capacitor C2, and diode D2 constitute the input pulse signal rising edge detection circuit. The input pulse signal Ui is connected to the inverting input terminal of operational amplifier A4 through the forward capacitor C2. The power supply +Vcc is connected to the working ground through resistor R7 and resistor R6 in sequence. The connection point of resistor R7 and resistor R6 is connected to the non-inverting input terminal of operational amplifier A4 to provide a 0.1V bias voltage for the non-inverting input terminal of operational amplifier A4. The output terminal of operational amplifier A4 is connected to the non-inverting input terminal of operational amplifier A3 through the forward diode D2. The negative electrode of capacitor C2 is connected to the working ground through resistor R5; the operational amplifier A2, resistor R8, and resistor R9 constitute the linear sawtooth charging voltage buffer circuit, and the linear sawtooth charging voltage at the positive terminal of capacitor C1 is buffered and amplified through the linear sawtooth charging voltage buffer circuit; resistor R10, potentiometer R11, resistor R12, and capacitor C3 constitute the integration circuit. The integration circuit smooths the linear sawtooth charging voltage taken from the sliding end of R11 into a DC output voltage Uo. By adjusting the potentiometer R11, the period T of the input pulse signal Ui can be made basically equivalent to the output voltage value Uo of the integration circuit. Finally, the period T of the signal can be directly read out through an ordinary multimeter. u I The period T of the signal.

2. The circuit according to claim 1 that can convert the period of a pulse signal into a DC voltage, characterized in that, For the constant current source circuit, the power supply +Vcc is sequentially connected to the working ground through resistor R1 and resistor R2. The connection point of resistor R1 and resistor R2 is connected to the non-inverting input terminal of operational amplifier A1, providing a stable voltage for the non-inverting input terminal of operational amplifier A1. The inverting input terminal of operational amplifier A1 is connected to the emitter of transistor T1.

Images