Test monitoring circuit and device of semiconductor device
By integrating temperature and humidity sensors in semiconductor device testing, combined with SMU module power supply and detection, the problem of neglecting environmental factors in traditional testing is solved, achieving more accurate and reliable test results and optimizing product design and manufacturing processes.
Patent Information
- Application Number
- CN202421457889.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-25
- Publication Date
- 2025-07-18
- Estimated Expiration
- 2034-06-25
AI Technical Summary
In the prior art, the testing of semiconductor devices mainly focuses on electrical signals and ignores environmental factors such as temperature and humidity, resulting in insufficient accuracy and reliability of test results.
A test monitoring circuit for semiconductor devices is designed, temperature and humidity information is obtained through the GPIO module, and the SMU module is combined with the power supply and detection performance of the device. The temperature calibration module is used to calibrate the temperature signal, and the switching module achieves flexible control, improving the accuracy and reliability of the test.
It significantly improves the accuracy and reliability of semiconductor device testing, can identify performance degradation or failure risks in advance, provide key data support for product design and manufacturing process optimization, and reduces defect rate and maintenance rate.
Smart Images
Figure CN223123164U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of test and monitoring of semiconductor devices, and particularly relates to a test and monitoring circuit and device for semiconductor devices. Background Art
[0002] With the continuous development of semiconductor technology, semiconductor devices are increasingly widely used in the electronic industry, and the stability and reliability of their performance are crucial for the normal operation of the entire electronic system. Therefore, in the semiconductor packaging and testing process, accurately testing the current and voltage of semiconductor devices is a key step to ensure the device quality.
[0003] Traditional semiconductor device testing methods mainly focus on the detection of device electrical signals, that is, by measuring the current and voltage of semiconductor devices under specific conditions to determine whether there are abnormal conditions such as short circuits or open circuits in the devices. However, with the continuous progress of semiconductor technology and the continuous expansion of application fields, the working environment of semiconductor devices has become increasingly complex, making the traditional method based only on electrical signal testing difficult to meet the actual needs.
[0004] In practical applications, the performance of semiconductor devices is often affected by environmental factors such as temperature and humidity. Changes in these environmental factors may not only lead to a decline in the performance of semiconductor devices, but may even cause device failure.
[0005] However, in the prior art, most test systems only focus on the measurement of electrical signals, and the monitoring of environmental factors during the semiconductor device testing process is often ignored. This results in the inability to timely detect the influence of environmental factors on the performance of semiconductor devices during the testing process, thus affecting the accuracy and reliability of the test results. Summary of the Utility Model
[0006] The purpose of the utility model is to provide a test and monitoring circuit and device for semiconductor devices to solve the problem in the prior art that the testing of semiconductor devices focuses on the measurement of electrical signals while ignoring the measurement of temperature and humidity in environmental factors, resulting in a decline in the performance of semiconductor devices and thus affecting the accuracy and reliability of the test results.
[0007] To achieve one of the above-mentioned utility model purposes, an embodiment of the utility model provides a test and monitoring circuit for semiconductor devices, the circuit comprising: a GPIO module, a first output end of the GPIO module is coupled to a temperature sensor through a first output end of a signal acquisition module, a second output end of the GPIO module is coupled to a humidity sensor, the temperature sensor is used for detecting the ambient temperature of the semiconductor device, and the humidity sensor is used for detecting the ambient humidity of the semiconductor device;
[0008] an SMU module, the SMU module is coupled to the semiconductor device.
[0009] As a further improvement of the present utility model, the circuit further includes: a temperature calibration module, a second output end of the signal acquisition module is coupled to a first input end of the temperature calibration module, and a third output end of the GPIO module is coupled to a second input end of the temperature calibration module.
[0010] As a further improvement of the present utility model, the circuit further includes: the temperature calibration module includes a multiplexing chip and a fixed-value resistor, an output end of the multiplexing chip is coupled to the fixed-value resistor, a second output end of the signal acquisition module is coupled to a first input end of the multiplexing chip, and a third output end of the GPIO module is coupled to a second input end of the multiplexing chip;
[0011] The multiplexing chip is configured to obtain a temperature signal detected by the temperature sensor and calibrate the temperature signal by adjusting the fixed-value resistor.
[0012] As a further improvement of the present utility model, the circuit further includes: the SMU module has an output end, and the output end of the SMU module is coupled to a power supply end of the semiconductor device;
[0013] The SMU module is configured to provide a voltage or a current to the semiconductor device.
[0014] As a further improvement of the present utility model, the circuit further includes: the SMU module has an input end, and the output end of the SMU module is coupled to a feedback end of the semiconductor device;
[0015] The SMU module is further configured to detect a current signal fed back by the semiconductor device and adjust a voltage value or a current value input to the semiconductor device according to the current signal fed back by the semiconductor device.
[0016] As a further improvement of the present utility model, the circuit further includes: a voltage acquisition module, and a fourth output end of the GPIO module is coupled to the semiconductor device through the voltage acquisition module.
[0017] As a further improvement of the present utility model, the circuit further includes: both the signal acquisition module and the voltage acquisition module include an analog-to-digital converter.
[0018] As a further improvement of the present utility model, the circuit further includes: a switching module, a first end of the switching module is respectively coupled to the GPIO module and the SMU module, and a second end of the switching module is coupled to the semiconductor device.
[0019] As a further improvement of the present utility model, the circuit further includes: the switching module includes a single-pole double-throw switch.
[0020] The present utility model further provides a test monitoring device for a semiconductor device. The device includes the test monitoring circuit for a semiconductor device as described in any one of the above, and further includes: a host computer, which is communicatively connected to the GPIO module and the SMU module.
[0021] Compared with the prior art, the present utility model has the following beneficial effects: By obtaining the temperature and humidity information of the semiconductor device through the GPIO module, the accuracy and reliability of the test can be significantly improved. It not only helps to identify in advance the risk of performance degradation or failure that the semiconductor device may encounter under specific environmental conditions, but also provides key data support for the optimization of product design and manufacturing processes. In addition, by combining the test of the semiconductor device with the SMU module, important feedback can be provided for the design and manufacturing processes of semiconductor products. In the semiconductor packaging test process, it can significantly improve the accuracy and reliability of the test, provide key data support for the optimization of product design and manufacturing processes, reduce the defective rate and repair rate of products, and improve the overall quality of semiconductor products. Description of the Drawings
[0022] Figure 1 It is a schematic connection diagram of the temperature and humidity monitoring circuit in an embodiment of the present utility model.
[0023] Figure 2 It is a schematic connection diagram of temperature calibration in an embodiment of the present utility model.
[0024] Figure 3 It is a schematic connection diagram of the GPIO module using a voltage acquisition module to acquire voltage information in an embodiment of the present utility model.
[0025] Figure 4 It is a schematic connection diagram of the switching module in an embodiment of the present utility model.
[0026] Figure 5 It is a schematic diagram of the test monitoring device for a semiconductor device in an embodiment of the present utility model. Detailed Embodiments
[0027] The present utility model will be described in detail below in conjunction with the specific embodiments shown in the drawings. However, these embodiments do not limit the present utility model, and any structural, circuit, or functional transformation made by those of ordinary skill in the art based on these embodiments is included in the protection scope of the present utility model.
[0028] In one embodiment of the present utility model, a test monitoring circuit for a semiconductor device and a test monitoring device for a semiconductor device are provided.
[0029] The test monitoring device for the semiconductor device can be applied to the field of package testing of semiconductor device 5. Specifically, it can be used to perform electrical signal testing and environmental signal detection on semiconductor device 5 and monitor the detection data to obtain accurate semiconductor performance parameters.
[0030] The test monitoring device for the semiconductor device includes a host computer M, and the host computer M is used to send test and detection commands and monitor electrical signal data and environmental signal data.
[0031] The test monitoring device for the semiconductor device further includes a test monitoring circuit for the semiconductor device. The host computer M is communicatively connected to the test monitoring circuit for the semiconductor device and controls the test monitoring circuit for the semiconductor device to obtain the electrical signal data and environmental signal data of semiconductor device 5.
[0032] In an embodiment of the present utility model, as Figure 1 shown, the test monitoring circuit for the semiconductor device includes an SMU module 2 and a GPIO module 1.
[0033] The first output end of the GPIO module 1 is coupled to the temperature sensor 3 through the first output end of the signal acquisition module 9. The second output end of the GPIO module 1 is coupled to the humidity sensor 4. The temperature sensor 3 is used to detect the ambient temperature of semiconductor device 5, and the humidity sensor 4 is used to detect the ambient humidity of semiconductor device 5.
[0034] The SMU module 2 is coupled to semiconductor device 5.
[0035] In this way, by obtaining the temperature and humidity information of semiconductor device 5 through the GPIO module 1, the accuracy and reliability of the test can be significantly improved. It not only helps to identify in advance the risk of performance degradation or failure of semiconductor device 5 under specific environmental conditions, but also provides key data support for the optimization of product design and manufacturing processes. In addition, combined with the test of semiconductor device 5 by the SMU module 2, it can provide important feedback for the design and manufacturing processes of semiconductor products, significantly improve the accuracy and reliability of the test in the semiconductor package testing process, provide key data support for the optimization of product design and manufacturing processes, reduce the product defect rate and repair rate, and improve the overall quality of semiconductor products.
[0036] Among them, the GPIO (General-Purpose Input / Output) module is a general-purpose digital signal pin, commonly found in microcontrollers, microprocessors, and other digital systems. These pins can be configured by software as inputs or outputs to control or detect external devices or signals.
[0037] In industrial automation, the GPIO module 1 can be used to read sensor data or control actuators.
[0038] The SMU module 2 (Safety Management Unit) is a highly integrated, programmable, and real-time safety management unit. During the testing process, it can supply power to the semiconductor device 5, detect the electrical performance of the semiconductor device 5, and at the same time, detect the open / circuit condition during the testing process of the semiconductor device 5.
[0039] In practical applications, the SMU module 2 is coupled to the semiconductor device 5 in the form of a board.
[0040] The signal acquisition module 9 can acquire the temperature information of the temperature sensor 3 and convert it into a digital signal to provide to the GPIO module 1.
[0041] The signal acquisition module 9 is an analog-to-digital converter. Preferably, an analog-to-digital converter with the model number ADS122C04 can be used.
[0042] In one embodiment, the temperature sensor 3 can be a sensor with the model number PT1000 or LMT70.
[0043] In one embodiment, the humidity sensor 4 can be a sensor with the model number SHT45. The GPIO module 1 is electrically connected to the humidity sensor 4 through the I2C protocol.
[0044] It should be noted that both the temperature sensor 3 and the humidity sensor 4 are arranged in the test environment of the semiconductor device 5.
[0045] In one implementation manner of the present utility model, as Figure 2 shown, it further includes a temperature calibration module 6. The second output end of the signal acquisition module 9 is coupled to the first input end of the temperature calibration module 6, and the third output end of the GPIO module 1 is coupled to the second input end of the temperature calibration module 6.
[0046] In this way, through the temperature calibration module 6, the acquired temperature information can be further calibrated to ensure that the acquired temperature data is closer to the actual value, thereby increasing the accuracy and reliability of the test results and reducing the risks of misjudgment and missed judgment.
[0047] Further, the temperature calibration module 6 includes a multiplexing chip 61 and a fixed-value resistor 62. The output end of the multiplexing chip 61 is coupled to the fixed-value resistor 62. The second output end of the signal acquisition module 9 is coupled to the first input end of the multiplexing chip 61, and the third output end of the GPIO module 1 is coupled to the second input end of the multiplexing chip 61.
[0048] The multiplexing chip 61 is configured to acquire the temperature signal detected by the temperature sensor 3 and calibrate the temperature signal by adjusting the fixed-value resistor 62.
[0049] The multiplexing chip 61 uses a chip with the model number ADG1409.
[0050] The fixed-value resistor 62 is a precision fixed-value resistor 62.
[0051] Through the differential channels of the multiplexing chip 61, the temperature signal output by the temperature sensor 3 is collected; by adjusting the resistance value of the fixed-value resistor 62, the output signal is made to conform to the expected value or calibration curve, compensating for the non-linearity or temperature drift of the output signal of the temperature sensor 3.
[0052] In this way, the temperature information detected by the temperature sensor 3 can be accurately adjusted to make it more in line with the real environmental temperature, ensuring the accuracy of the test of the semiconductor device 5.
[0053] In an embodiment of the present invention, the SMU module 2 has an output terminal, and the output terminal of the SMU module 2 is coupled to the power supply terminal of the semiconductor device 5; the SMU module 2 is configured to provide voltage or current to the semiconductor device 5.
[0054] By powering the semiconductor device 5 through the SMU module 2, based on the functional characteristics of the SMU module 2 itself, the electrical performance of the semiconductor device 5 can be obtained, thereby realizing the detection of the electrical performance of the semiconductor device 5.
[0055] In one embodiment, the SMU module 2 can use the FIMV method to test the electrical performance of the semiconductor device 5.
[0056] FIMV (Force Current Measure Voltage) is a method of applying current to detect voltage, that is, a DC parameter test method, which is used to test the electrical performance of chips or other electronic devices. A known current is applied to the semiconductor device 5 through the SMU module 2, and then the voltage across the semiconductor device 5 under this current is measured. The voltage response of the semiconductor device 5 under different current conditions is evaluated to understand its electrical performance.
[0057] In an embodiment of the present invention, the SMU module 2 has an input terminal, and the output terminal of the SMU module 2 is coupled to the feedback terminal of the semiconductor device 5;
[0058] The SMU module 2 is further configured to detect the current signal fed back by the semiconductor device 5 and adjust the voltage value or current value input to the semiconductor device 5 according to the current signal fed back by the semiconductor device 5.
[0059] Thus, as a highly integrated measurement and power supply device, the SMU module 2 can precisely control the magnitude of the output current or voltage to meet the requirements of the semiconductor device 5 under different operating conditions. It can not only ensure the stable operation of the semiconductor device 5 but also effectively extend its service life. Moreover, this technical solution can achieve current feedback and dynamic adjustment, ensuring that the semiconductor device 5 always operates in the best state and improving its working efficiency and reliability.
[0060] When the current value fed back by the semiconductor device 5 is less than the output current value of the SMU module 2 or less than the voltage representing the output current value of the SMU module 2, increase the output current or voltage.
[0061] When the current value fed back by the semiconductor device 5 is greater than the output current value of the SMU module 2 or greater than the voltage representing the output current value of the SMU module 2, decrease the output current or voltage.
[0062] In an embodiment of the present utility model, as Figure 3 shown, it further includes a voltage acquisition module 8, and the fourth output end of the GPIO module 1 is coupled to the semiconductor device 5 through the voltage acquisition module 8.
[0063] Specifically, both the signal acquisition module 9 and the voltage acquisition module 8 include analog-to-digital converters.
[0064] The signal acquisition module 9 can adopt an analog-to-digital converter with the model number ADS122C04.
[0065] The GPIO module 1 is electrically connected to the signal acquisition module 9 using the I2C protocol.
[0066] The voltage acquisition module 8 can adopt an analog-to-digital converter with the model number AD7609.
[0067] The GPIO module 1 is electrically connected to the voltage acquisition module 8 in a parallel port communication manner.
[0068] In an embodiment of the present utility model, as Figure 4 shown, it further includes a switching module 7. The first end of the switching module 7 is respectively coupled to the GPIO module 1 and the SMU module 2, and the second end of the switching module 7 is coupled to the semiconductor device 5.
[0069] Thus, this technical solution provides a flexible control method, enabling the selection of using the SMU module 2 or the GPIO module 1 to connect to the semiconductor device 5 as needed, improving the versatility and scalability of the system; and the switching module 7 can perform seamless switching between the SMU module 2 and the GPIO module 1 to ensure the stable operation of the semiconductor device 5 during the switching process.
[0070] The switching module 7 includes a single-pole double-throw switch. Of course, this is not the only limitation.
[0071] Specifically, the first end of the single-pole double-throw switch has two contacts, which are respectively connected to the SMU module 2 and the GPIO module 1. The second end of the single-pole double-throw switch has one contact for connecting to the semiconductor device 5. The single-pole double-throw switch can selectively connect between the two contacts.
[0072] In an embodiment of the present invention, as Figure 5 shown, a test monitoring device for a semiconductor device is provided, which includes the test monitoring circuit of the semiconductor device in any one of the above embodiments, and further includes a host computer M, and the host computer M is communicatively connected to the GPIO module 1 and the SMU module 2.
[0073] In summary, combining all the above embodiments, the main monitoring process is as follows: The host computer sends an instruction signal to the switching module 7, the switching module 7 connects to the SMU module 2, and the host computer controls the SMU module 2 to supply power to the semiconductor device 5 and obtain the current signal and feedback it to the host computer, and the host computer analyzes the current signal to obtain the electrical performance of the semiconductor. Then the host computer sends an instruction signal to the switching module 7, the switching module 7 connects to the GPIO module 1, and the host computer controls the GPIO module 1 to obtain the temperature information, humidity information and voltage information of the semiconductor device 5.
[0074] It should be understood that although this specification is described according to embodiments, not every embodiment only contains an independent technical solution. This narrative way of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.
[0075] The series of detailed descriptions listed above are only specific descriptions of the feasible embodiments of the present invention, and they are not used to limit the protection scope of the present invention. Any equivalent embodiments or changes made without departing from the technical spirit of the present invention should be included in the protection scope of the present invention.
Claims
1. A test monitoring circuit for a semiconductor device, characterized in that, Comprising: A GPIO module, the first output end of the GPIO module is coupled to a temperature sensor through the first output end of a signal acquisition module, the second output end of the GPIO module is coupled to a humidity sensor, the temperature sensor is used to detect the ambient temperature of a semiconductor device, and the humidity sensor is used to detect the ambient humidity of the semiconductor device; An SMU module, the SMU module is coupled to the semiconductor device.
2. The test monitoring circuit of the semiconductor device according to claim 1, wherein It further includes a temperature calibration module, the second output end of the signal acquisition module is coupled to the first input end of the temperature calibration module, and the third output end of the GPIO module is coupled to the second input end of the temperature calibration module.
3. The test monitoring circuit of a semiconductor device according to claim 2, wherein, The temperature calibration module includes a multiplexing chip and a fixed-value resistor, the output end of the multiplexing chip is coupled to the fixed-value resistor, the second output end of the signal acquisition module is coupled to the first input end of the multiplexing chip, and the third output end of the GPIO module is coupled to the second input end of the multiplexing chip; The multiplexing chip is configured to obtain the temperature signal detected by the temperature sensor and calibrate the temperature signal by adjusting the fixed-value resistor.
4. The test monitoring circuit of the semiconductor device according to claim 1, wherein, The SMU module has an output end, and the output end of the SMU module is coupled to the power supply end of the semiconductor device; The SMU module is configured to provide voltage or current to the semiconductor device.
5. The test monitoring circuit of the semiconductor device according to claim 4, characterized in that, The SMU module has an input end, and the output end of the SMU module is coupled to the feedback end of the semiconductor device; The SMU module is further configured to detect the current signal fed back by the semiconductor device and adjust the voltage value or current value input to the semiconductor device according to the current signal fed back by the semiconductor device.
6. The test monitoring circuit of the semiconductor device according to claim 1, characterized in that, It further includes a voltage acquisition module, and the fourth output end of the GPIO module is coupled to the semiconductor device through the voltage acquisition module.
7. The test monitoring circuit of the semiconductor device according to claim 6, characterized in that, Both the signal acquisition module and the voltage acquisition module include analog-to-digital converters.
8. The test monitoring circuit of the semiconductor device according to claim 6, characterized in that, It further includes a switching module, the first end of the switching module is respectively coupled to the GPIO module and the SMU module, and the second end of the switching module is coupled to the semiconductor device.
9. The test monitoring circuit of the semiconductor device according to claim 8, characterized in that, The switching module includes a single-pole double-throw switch.
10. A test monitoring device for a semiconductor device, characterized in that, It includes the test monitoring circuit of the semiconductor device according to any one of claims 1-9, and further includes: A host computer, the host computer is communicatively connected to the GPIO module and the SMU module.