Automatic test system for power management chip
By designing an automatic test system, the problems of poor versatility and low efficiency of chip board-level test platforms are solved, and automated and efficient power management chip testing is realized to meet a variety of test needs.
Patent Information
- Application Number
- CN202421840174.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-31
- Publication Date
- 2025-07-18
- Estimated Expiration
- 2034-07-31
AI Technical Summary
The existing chip board-level automatic test platform has poor versatility, cannot meet the testing needs of different power management chips, and has low testing efficiency, especially in high and low temperature environments, which require manual switching of equipment and temperature adjustment.
An automatic testing system is designed, including a voltmeter, ammeter, electronic load, oscilloscope, power supply, E_link controller and multiplexer. It is connected to the PC terminal through a USB extender to automatically control the connection between the test equipment and the chip pins, supports multiple working modes, and reserves interfaces to expand new equipment.
It realizes automation and high efficiency of chip board-level testing, improves the universality of the test system, can automatically read data and grab waveforms, generate test reports, and adapt to different test cases.
Smart Images

Figure CN223123170U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of chip (IC) board-level automatic testing, and particularly relates to an automatic testing system for a power management chip. Background Art
[0002] The statements in this section only provide background information related to the present disclosure and may not constitute prior art.
[0003] In the back-end of IC R & D, it is usually necessary to conduct detailed tests on the electrical parameters of the IC. The test engineer writes a test program based on a professional automatic test equipment (ATE) according to the test plan (test plan) to complete the parameter measurement of the IC on the socket. To simulate the real working environment of the chip and ensure the accuracy of the ATE test results, it is also necessary to conduct board-level system tests on the sampled chips to confirm whether their functions and performances are normal.
[0004] Usually, the board-level system test of the chip with SOC is carried out by the corresponding application engineer for each of its modules, supplying power separately, applying an excitation source, reading the corresponding data from the test equipment, capturing the corresponding waveforms, and filling them into the corresponding test report. During the whole test process, it is necessary to frequently switch the test equipment and test pins. Especially when testing in a high or low temperature environment, the conventional test method requires manual switching of equipment, adjustment of the environmental temperature, and filling in the corresponding data, resulting in relatively low test efficiency.
[0005] At present, the existing chip board-level automatic test platforms on the market can only cover basic voltage and current tests and have poor versatility, and cannot meet the test requirements of different power management chips (such as the measurement of electrical parameters such as chip isense, line / load regulation / OSC / GPIO VIH / VIL, etc.). Summary of the Utility Model
[0006] The purpose of the utility model is to: improve the test efficiency of the chip board-level system, enhance the versatility of the chip board-level automatic test system, and increase the testability of the chip board-level automatic test system. An automatic test system for a power management chip is provided, which has the advantages of high chip board-level test efficiency, high testability and versatility.
[0007] The technical solution of the utility model is as follows:
[0008] An automatic test system for a power management chip includes: a voltmeter, an ammeter, an electronic load, an oscilloscope, a power supply, an E_link controller, a control unit, and a plurality of multiplexers;
[0009] The multiplexer has a plurality of multiplexing channels inside, and realizes connection with any chip pin of the power management chip to be tested through the switching of the multiplexing channels;
[0010] The voltmeter, ammeter, electronic load, oscilloscope, power supply, E_link controller and control unit are all connected to the PC through a USB expander;
[0011] The voltmeter, electronic load, oscilloscope, power supply and E_link controller are respectively connected to separate multiplexers;
[0012] Among them, the E_link controller is used to download programs to the power management chip under test and perform read and write operations on the power management chip under test;
[0013] The ammeter can be connected in series with the power supply or the electronic load through a single-pole double-throw switch;
[0014] The control unit is connected to the power supply interface and communication interface of the PC, and is responsible for the power supply and control of the single-pole double-throw switch and the multiplexer.
[0015] Further, the power supply adopts two programmable programmable power supplies, which can support up to 6 channels of voltage and current output at the same time, and the maximum power output of a single channel can support 200W.
[0016] Further, the electronic load adopts a programmable programmable electronic load, which can support up to 2 loads at the same time, and the maximum load supported by a single channel is 300W.
[0017] Further, the working modes supported by the electronic load include:
[0018] Constant current working mode, constant voltage working mode, constant resistance working mode and constant power working mode.
[0019] Further, the voltmeter adopts a programmable 6 1 / 2-digit digital multimeter.
[0020] Further, the oscilloscope adopts a programmable oscilloscope, which can support up to 8 channels at the same time, and each channel can be connected to any chip pin of the power management chip under test through a multiplexer.
[0021] Further, the ammeter adopts a programmable 6 1 / 2-digit digital multimeter.
[0022] Further, the E_link controller is a programmable controller.
[0023] Further, it further includes: an expansion device; the expansion device is connected to the PC through a USB expander, and the expansion device is also connected to a separate multiplexer.
[0024] Further, the ammeter can also be connected in series with the expansion device through a single-pole double-throw switch.
[0025] Compared with the existing technology, the beneficial effects of the present utility model are:
[0026] An automatic test system for a power management chip can automatically control a test device to connect to any pin of the chip through a script, automatically read the data of the test device and the output data of the chip, automatically capture the waveforms of each pin of the chip, and automatically store the test data and waveforms into the corresponding test reports. At the same time, the utility model reserves sufficient interfaces to ensure the addition and expansion of subsequent new measurement devices, and ensures that any device can be conveniently connected to any pin of the chip. It has the advantages of high chip board-level test efficiency, high testability and high versatility. Description of the Drawings
[0027] Figure 1 It is a schematic diagram of an automatic test system for a power management chip;
[0028] Figure 2 It is a block diagram of a multiplexing circuit structure of an automatic test system for a power management chip;
[0029] Figure 3 It is a block diagram of a multiplexing circuit structure of an expansion device;
[0030] Figure 4 It is a connection schematic diagram of the automatic test system in the second embodiment;
[0031] Figure 5 It is a connection schematic diagram of the automatic test system in the third embodiment;
[0032] Figure 6 It is a connection schematic diagram of the automatic test system in the fourth embodiment;
[0033] Figure 7 It is a connection schematic diagram of the automatic test system in the fifth embodiment;
[0034] Figure 8 It is a connection schematic diagram of the automatic test system in the sixth embodiment. Detailed Embodiments
[0035] It should be noted that relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprising", "including" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising a..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the said element.
[0036] The features and performance of the present utility model will be further described in detail below in conjunction with embodiments.
[0037] Embodiment 1
[0038] In chip testing, for different test cases, excitation needs to be applied to specific pins of the chip, and whether the behavior of the pins conforms to the expectation needs to be observed; the application of excitation and the observation of signals require cumbersome connection of measuring equipment and the chip. Therefore, in the test system proposed in this embodiment, a voltmeter, an electronic load, an oscilloscope, a power supply, an E_link controller and other extended devices are respectively connected to the chip pins through a multiplexer to adapt to different test cases and achieve rapid switching of pins.
[0039] In this embodiment, specifically, please refer to Figures 1 - 3 , an automatic test system for a power management chip, comprising:
[0040] A voltmeter, an ammeter, an electronic load, an oscilloscope, a power supply, an E_link controller, a control unit and a number of multiplexers (i.e., Mux in the figure);
[0041] The multiplexer has a plurality of multiplexing channels inside, and by switching the multiplexing channels, connection with any chip pin of the power management chip to be tested is achieved; it should be noted that a corresponding interface adapter board for the chip under test can be developed according to the power management chip to be tested, which is used to connect the chip pins of the power management chip to be tested with the multiplexer, so as to achieve connection with any chip pin of the power management chip to be tested by switching the multiplexing channels.
[0042] The voltmeter, ammeter, electronic load, oscilloscope, power supply, E_link controller and control unit are all connected to the PC through a USB expander; that is, by writing a script on the PC, the purpose of automatic testing can be achieved; it should be noted that the writing of this script can be completed by those skilled in the art without creative labor based on the automatic testing system given in this embodiment and the corresponding power management chip to be tested, so it will not be elaborated here;
[0043] The voltmeter, electronic load, oscilloscope, power supply and E_link controller are respectively connected to separate multiplexers;
[0044] Among them, the E_link controller is used to download programs to the power management chip to be tested and perform read and write operations on the power management chip to be tested; that is, the E_link controller can be connected to the I2C / Uart interface of the power management chip to be tested through a multiplexer to download programs to the power management chip to be tested and perform read and write operations on the power management chip to be tested;
[0045] The ammeter can be connected in series with the power supply or the electronic load through a single-pole double-throw switch;
[0046] The control unit is connected to the power supply interface and communication interface of the PC, and is responsible for the power supply and control of the single-pole double-throw switch and the multiplexer; specifically, the control unit is connected to the 485 communication interface of the PC, and is used to receive instructions sent from the PC and control the single-pole double-throw switch and the multiplexer according to the instructions.
[0047] In this embodiment, specifically, the power supply uses two programmable programmable power supplies, which can support up to 6 channels of voltage and current output at the same time, and the maximum power output of a single channel can support 200W (40V / 5A, 20V / 10A).
[0048] In this embodiment, specifically, the electronic load uses a programmable programmable electronic load, which can support up to 2 channels of loads at the same time, and the maximum load supported by a single channel is 300W.
[0049] In this embodiment, specifically, the working modes supported by the electronic load include:
[0050] Constant current working mode, constant voltage working mode, constant resistance working mode and constant power working mode; that is, CC / CV / CR / CP mode.
[0051] In this embodiment, specifically, the voltmeter uses a programmable 6 1 / 2-digit digital multimeter.
[0052] In this embodiment, specifically, the oscilloscope uses a programmable oscilloscope, which can support up to 8 channels at the same time, and each channel can be connected to any chip pin of the power management chip to be tested through a multiplexer.
[0053] In this embodiment, specifically, the ammeter uses a programmable 6 1 / 2 digit digital multimeter.
[0054] In this embodiment, specifically, the E_link controller is a programmable controller.
[0055] In this embodiment, specifically, it further includes: an expansion device; the expansion device is connected to the PC through a USB extender, and the expansion device is also connected to a separate multiplexer to further improve testability and versatility; it should be noted that the expansion device includes: a temperature chamber, a power meter, a spectrum analyzer, etc.
[0056] In this embodiment, specifically, the ammeter can also be connected in series with the expansion device through a single-pole double-throw switch.
[0057] Embodiment Two
[0058] This embodiment further describes an automatic test system for a power management chip proposed in Embodiment One for Leakage measurement.
[0059] As Figure 4 shown, the automatic test system connects the ammeter in series between the power supply and the multiplexer by controlling SPDT1 (where SPDT represents a single-pole double-throw switch) and SPDT3, and selects the chip Vin pin to access the power supply through the multiplexing channel.
[0060] Then the automatic test system controls the power supply to provide voltage V1 to the Vin pin. After the chip is powered on, the automatic test system reads the current data collected by the ammeter and stores this current data in excel, and outputs a leakage test report. V1 can be increased or decreased to measure the leakage of Vin at different voltages. Similarly, the leakage of other pins can also be measured by this method.
[0061] Embodiment Three
[0062] This embodiment further describes an automatic test system for a power management chip proposed in Embodiment One for Clock measurement.
[0063] As Figure 5 shown, the automatic test system disconnects the connection between the ammeter and the power supply by controlling SPDT1 and SPDT3. The multiplexer selects the chip Vin pin to access the power supply, selects the chip Test pad pin to access the oscilloscope, and selects the chip I2C (SCL, SDA) pins to access the E_link controller.
[0064] Then the automatic test system controls the power supply to supply power to the Vin pin; after the chip is powered on, the automatic test system configures the chip registers through the E_link controller to make the Clock output from the Test pad pin. At this time, the automatic test system captures the Clock waveform through an oscilloscope, counts the frequency of the Clock, and automatically stores the waveform and frequency data in excel, and outputs a Clock test report.
[0065] Embodiment 4
[0066] This embodiment further describes an automatic test system for a power management chip proposed in Embodiment 1 for GPIO VIH / VIL measurement.
[0067] As Figure 6 shown, the automatic test system disconnects the ammeter by controlling SPDT9, SPDT10, SPDT11, and SPDT12. The multiplexer selects the chip Vin pin to connect to the power supply CH2, selects the chip GPIO0 pin to connect to the power supply CH1, selects the chip Testpad pin to connect to the oscilloscope, and selects the chip I2C (SCL, SDA) pin to connect to the E_link controller.
[0068] Then the automatic test system supplies power to the Vin pin by controlling the power supply CH1. After the chip is powered on, the GPIO0 pin is configured as an input Pin and the Test pad pin is configured as an output Pin through the E_link controller. The automatic test system observes the level of the Test pad pin through the oscilloscope and gradually increases the voltage of the power supply CH1. When the Test pad pin outputs a high level, the automatic test system records the voltage of the power supply CH1 at this time as VIH. Gradually decrease the voltage of the power supply CH1. When the Test pad pin outputs a low level, the automatic test system records the voltage of the power supply CH1 at this time as VIL. Finally, the automatic test system automatically records the VIH / VIL data in excel and automatically generates a VIH / VIL test report. Similarly, other GPIO pins can also be measured by this method.
[0069] Embodiment 5
[0070] This embodiment further describes an automatic test system for a power management chip proposed in Embodiment 1 for Isense accuracy measurement.
[0071] As Figure 7As shown, the automatic test system connects the ammeter in series between the electronic load and the multiplexer by controlling SPDT2 and SPDT4, disconnects the connection between the ammeter and the power supply by controlling SPDT1 and SPDT3, the multiplexer selects the Vin pin of the chip to connect to the power supply, selects the Vout pin of the chip to connect to the electronic load, and selects the I2C (SCL, SDA) pin of the chip to connect to the E_link controller.
[0072] The automatic test system powers on the Vin pin through the power supply. After the chip is powered on, the automatic test system burns the Isense test program into the chip through the E_link controller. After the test program is burned, the chip is reset. The test system automatically sets the electronic load to draw 0.1 A, automatically reads the current value I_measure measured by the ammeter at this time, automatically reads the ADC sampling value Isense of the chip, stores the I_measure and Isense values in excel, and calculates the Isense accuracy under this load. Gradually increase the load current, the system repeats the reading of I_measure and Isense, saves the I_measure / Isense values under each load condition to excel, and finally draws the error curve and outputs the Isense accuracy measurement report.
[0073] Example Six
[0074] This embodiment further illustrates an automatic test system for a power management chip proposed in Example One for Load regulation testing.
[0075] As Figure 8 shown, the automatic test system disconnects the ammeter from the electronic load and the power supply by controlling SPDT1, SPDT2, SPDT3 and SPDT4. The multiplexer selects the Vin pin of the chip to connect to the power supply, selects the Vout pin of the chip to connect to the electronic load and the voltmeter, and selects the I2C (SCL, SDA) pin of the chip to connect to the E_link controller.
[0076] The automatic test system powers on the Vin pin through the power supply. After the chip is powered on, the automatic test system burns a test program into the chip through the E_link controller to make the Vout pin output voltage.
[0077] The test system configures the electronic load to draw 0 A / 0.1 A / 1 A / 2 A / 3 A / 4 A / 5 A respectively, automatically records the voltage values V1 / V2 / V3 / V4 / V5 / V6 / V7 under each load into an excel table, draws the load regulation curve, and generates the loadregulation test report.
[0078] The embodiments described above merely represent the specific implementation manners of the present application. The description thereof is relatively specific and detailed, but it should not be construed as a limitation on the protection scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the technical solution of the present application, several variations and improvements can still be made, and these all fall within the protection scope of the present application.
[0079] This background art section is provided to generally present the context of the present utility model. The work of the currently named inventors, to the extent described in this background art section, and aspects of the work that are not prior art as of the filing date of this application are neither expressly nor impliedly admitted to be prior art to the present utility model.
Claims
1. An automatic test system for a power management chip, characterized in that, Including: A voltmeter, an ammeter, an electronic load, an oscilloscope, a power supply, an E_link controller, a control unit, and several multiplexers; The multiplexer has multiple multiplexing channels inside, and by switching the multiplexing channels, it can be connected to any chip pin of the power management chip under test; The voltmeter, ammeter, electronic load, oscilloscope, power supply, E_link controller, and control unit are all connected to the PC through a USB extender; The voltmeter, electronic load, oscilloscope, power supply, and E_link controller are respectively connected to separate multiplexers; Among them, the E_link controller is used to download programs to the power management chip under test and perform read and write operations on the power management chip under test; The ammeter can be connected in series with the power supply or the electronic load through a single-pole double-throw switch; The control unit is connected to the power supply interface and communication interface of the PC, and is responsible for the power supply and control of the single-pole double-throw switch and the multiplexer.
2. The automatic test system for a power management chip according to claim 1, characterized in that The power supply uses two programmable programmable power supplies, which can support up to 6 channels of voltage and current output at the same time, and the maximum power output per single channel can support 200W.
3. An automatic test system for a power management chip according to claim 1, characterized in that, The electronic load uses a programmable programmable electronic load, which can support up to 2 channels of loads at the same time, and the maximum load supported by a single channel is 300W.
4. An automatic test system for a power management chip according to claim 3, characterized in that, The working modes supported by the electronic load include: Constant current working mode, constant voltage working mode, constant resistance working mode, and constant power working mode.
5. The automatic test system for a power management chip according to claim 1, characterized in that, The voltmeter uses a programmable 6 1 / 2-digit digital multimeter.
6. The automatic test system for a power management chip according to claim 1, characterized in that, The oscilloscope uses a programmable oscilloscope, which can support up to 8 channels at the same time, and each channel can be connected to any chip pin of the power management chip under test through a multiplexer.
7. An automatic test system for a power management chip according to claim 1, characterized in that, The ammeter uses a programmable 6 1 / 2-digit digital multimeter.
8. An automatic test system for a power management chip according to claim 1, characterized in that, The E_link controller is a programmable controller.
9. An automatic test system for a power management chip according to claim 1, characterized in that, Also included: Expansion device; The expansion device is connected to the PC through a USB extender, and the expansion device is also connected to a separate multiplexer.
10. An automatic test system for a power management chip according to claim 9, characterized in that, The ammeter can also be connected in series with the expansion device through a single-pole double-throw switch.