Display module and display device

Abstract

The utility model provides a display module and a display device, and the display module comprises a display panel, and a peripheral region of the display panel is provided with a plurality of driving chips; the at least one bridging circuit board is arranged on one side of the display panel in the thickness direction of the display panel, each bridging circuit board is provided with a voltage signal line, and the voltage signal line is at least electrically connected with the two driving chips, so that reference voltage signals are transmitted between the driving chips through the voltage signal line. According to the display module and the display device provided by the invention, the reference voltage signals are transmitted among the different driving chips through the voltage signal lines, so that the reference voltages provided by the plurality of driving chips can be kept consistent, and poor split-screen display of the display module is avoided.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and particularly to a display module and a display device. Background Art

[0002] With the continuous maturity and development of OLED display technologies, the market share of OLED display panels in the medium and large-sized display screen market has gradually increased. For large-sized and high-resolution OLED display modules, which include multiple driving chips (SDICs), if the gamma reference voltages provided by multiple driving chips cannot be kept consistent, there may be problems with split-screen display. Summary of the Utility Model

[0003] In view of this, the purpose of the present application is to provide a display module and a display device to at least partially solve the problem of split-screen display caused by inconsistent gamma reference voltages provided by multiple driving chips of the same display module.

[0004] Based on the above purpose, in the first aspect of the present application, a display module is provided, including: a display panel, with multiple driving chips arranged in the peripheral area of the display panel; at least one bridging circuit board, arranged on one side of the display panel along the thickness direction of the display panel, and each bridging circuit board is provided with a voltage signal line, and the voltage signal line is electrically connected to at least two of the driving chips, so that a reference voltage signal is transmitted between at least two of the driving chips through the voltage signal line.

[0005] Optionally, at least one voltage pad group is arranged in the peripheral area corresponding to each driving chip, and each voltage pad group includes at least one voltage pad electrically connected to the reference voltage pin of the corresponding driving chip; the voltage signal line includes a first sub-signal line, and the first sub-signal line is respectively electrically connected to the voltage pads corresponding to the two driving chips.

[0006] Optionally, all the driving chips are connected in series through the first sub-signal line.

[0007] Optionally, two voltage pad groups are arranged in the peripheral area corresponding to each driving chip; the voltage signal line further includes a second sub-signal line, and the second sub-signal line is respectively electrically connected to the voltage pads of the two voltage pad groups corresponding to the same driving chip.

[0008] Optionally, the peripheral area includes a bonding sub-area and a bending sub-area, and the bonding sub-area is farther from the display area of the display panel than the bending sub-area; the voltage pad group is arranged in the bonding sub-area.

[0009] Optionally, two adjacent driving chips are arranged at intervals, and the orthographic projection of the bridging circuit board on the display panel is at least located between two adjacent driving chips.

[0010] Optionally, the peripheral area includes a bonding sub-area and a bending sub-area. The driving chips are arranged in the bonding sub-area, and the orthographic projection of the bridging circuit board on the display panel does not coincide with the bending sub-area.

[0011] Optionally, a ground pad is provided corresponding to each driving chip in the peripheral area. The ground pad is electrically connected to the ground pin of the corresponding driving chip. The bridging circuit board is provided with a ground signal line, and the ground signal line is electrically connected to all the ground pads respectively.

[0012] Optionally, the thickness of the bridging circuit board is less than the thickness of the driving chip.

[0013] Optionally, the bridging circuit board is a flexible circuit board.

[0014] Optionally, an adhesive layer is provided between the bridging circuit board and the display panel, and the bridging circuit board is positioned on the display panel through the adhesive layer.

[0015] Based on the same inventive concept, a second aspect of the present application further provides a display device, including the display module as described in the first aspect.

[0016] As can be seen from the above, in the display module and the display device provided by the present application, by transmitting the reference voltage signal between different driving chips through the voltage signal line, the reference voltages provided by multiple driving chips can be kept consistent, avoiding the problem of poor split-screen display in the display module. At the same time, since the voltage signal line is arranged on an independent bridging circuit board, the layout of the voltage signal line can no longer be restricted by other devices or traces, providing a structural basis for shortening the routing path of the voltage signal line. At the same time, for other circuit boards connected to the display panel, since there is no longer a signal line for transmitting the reference voltage between the driving chips, other circuit boards do not need to reserve pins and space for laying out the signal line, which helps to realize the design of small-sized circuit boards and improve the product competitiveness of the display module. Description of the Drawings

[0017] In order to more clearly illustrate the technical solutions in the present application or related technologies, the following will briefly introduce the drawings required for use in the embodiments or related technology descriptions. Obviously, the drawings in the following description are only the embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0018] Figure 1Schematic diagram of the display module of the first structure according to an embodiment of the present application;

[0019] Figure 2 Schematic diagram of the first printed circuit board in the display module of the first structure according to an embodiment of the present application;

[0020] Figure 3 Schematic diagram of the first flexible circuit board in the display module of the first structure according to an embodiment of the present application;

[0021] Figure 4 Schematic diagram of the display module of the second structure according to an embodiment of the present application;

[0022] Figure 5 Schematic diagram of the display panel in the display module of the second structure according to an embodiment of the present application;

[0023] Figure 6 Partial schematic diagram of the display module of the second structure according to an embodiment of the present application;

[0024] Figure 7 Schematic diagram of the display module of the third structure according to an embodiment of the present application;

[0025] Figure 8 Schematic diagram of the display panel in the display module of the third structure according to an embodiment of the present application;

[0026] Figure 9 Partial schematic diagram of the display module of the third structure according to an embodiment of the present application. Detailed implementation manners

[0027] To make the objectives, technical solutions and advantages of the present application more clear and understandable, the present application will be further described in detail below with reference to specific embodiments and the accompanying drawings.

[0028] It should be noted that: Unless otherwise specifically stated, the relative arrangements, numerical expressions and values of the components set forth in these embodiments do not limit the scope of the present application.

[0029] Meanwhile, it should be understood that, for the sake of description, the dimensions of the various parts shown in the drawings are not drawn in actual proportional relationship.

[0030] The following description of at least one exemplary embodiment is merely illustrative in nature and in no way serves as a limitation to the present application and its application or use.

[0031] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should have the ordinary meanings understood by those of ordinary skill in the art to which the present application belongs. The "first", "second" and similar terms used in the embodiments of the present application do not denote any order, quantity or importance, but are only used to distinguish different components. Words such as "including" or "comprising" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connected" or "coupled" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Upper", "lower", "left", "right", etc. are only used to represent relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0032] For example Figure 1 , for a large-size OLED display module, it may include three to six driving chips 200 for driving the display module to display. Figure 1 Taking the example that the display module includes three driving chips 200 for further illustration. The display module may include a display panel 100 (panel) and a circuit board, and the circuit board may include a first printed circuit board 300 (PCBA) and a plurality of first flexible circuit boards 400 (FPC).

[0033] The display panel 100 has a display area 110 and a peripheral area 120 provided on at least one side of the display area 110. The peripheral area 120 on at least one side has a bonding sub-area 121. The three driving chips 200 are bonded in the bonding sub-area 121 of the display panel 100. One side of the first flexible circuit board 400 is electrically connected to the driving chip 200 in the bonding sub-area 121 through pins. Exemplarily, the first flexible circuit boards 400 may be provided in one-to-one correspondence with the driving chips 200. The other sides of the plurality of first flexible circuit boards 400 are electrically connected to the first printed circuit board 300 through pins.

[0034] Three driving chips 200 of the display panel 100 respectively drive different sub-regions in the display area 110 to implement image display. In order to ensure that the brightness of the sub-regions driven by each driving chip 200 is consistent, the driving chip 200 located in the middle can be used as the master chip (Master SDIC), and the other two driving chips 200 are used as slave chips (slave SDIC). The master chip generates a total of 11 gamma reference voltages (hereinafter referred to as reference voltages), namely VGMP, VGSP, VGMA1, VGMA2, VGMA3, VGMA4, VGMA5, VGMA6, VGMA7, VGMA8, and VGMA9 (hereinafter referred to as VGMA1-9), and transmits these 11 reference voltages to the two slave chips, so that the reference voltages of the two slave chips are consistent with the reference voltage of the master chip.

[0035] In order to transmit the reference voltage signal, a signal line 900 needs to be formed between the master chip and the slave chip. Based on the structure of the display panel 100, the first printed circuit board 300, and the first flexible circuit board 400, a more reasonable setting method for the signal line 900 is to extend from the master chip, and after passing through the first flexible circuit board 400 connected to the master chip, then extend to the first printed circuit board 300, and then extend on the first printed circuit board 300 to the first flexible circuit board 400 corresponding to the slave chip, and finally pass through the first flexible circuit board 400 to connect to the slave chip.

[0036] Although the above setting method of the signal line 900 can achieve the transmission of the reference voltage signal between the master chip and the slave chip, due to the long routing path of the signal line 900, there is a risk of voltage drop during the transmission of the reference voltage signal. At the same time, as Figure 1 and Figure 2 , each driving chip 200 is provided with two groups of signal lines 900, and each group of signal lines 900 is used to transmit the above 11 reference voltages. These six groups of signal lines 900 will correspondingly form six bonding points on the first printed circuit board 300 (such as the dotted box in Figure 2 ). As long as there is a bonding abnormality at one of the six bonding points, it may cause the reference voltages between the three driving chips 200 to be inconsistent, resulting in poor split-screen display of the display module, and the reliability of the display module is poor.

[0037] It should also be noted that in order to transmit the above 11 reference voltages, each group of signal lines 900 includes 11 parallel traces. Correspondingly, as Figure 3 , on each first flexible circuit board 400 connected to the driving chip 200, space needs to be reserved for 22 traces. The first flexible circuit board 400 needs to set 22 pins for the 22 traces, along the width direction of the pins (such as Figure 3in the X direction), assuming that the center distance between adjacent two pins is 270 microns, then 22 pins will occupy a space of 5940 microns, which makes the overall first flexible circuit board 400 need to have a relatively large width.

[0038] Similarly, as Figure 2 , for the first printed circuit board 300, along the X direction, it is necessary to reserve a layout space for a total of 66 traces of three first flexible circuit boards 400, that is, a space of 17820 microns; at the same time, due to the six groups of signal lines 900 being arranged at intervals, in fact, a larger space needs to be reserved for laying out the signal lines 900 on the first printed circuit board 300. Along the Y direction of the first printed circuit board 300, it is also necessary to reserve a layout space for 11 traces, and the traces extend from the left side to the right side of the first printed circuit board 300 along the X direction, occupying a large area of space on the first printed circuit board 300. In summary, the overall first printed circuit board 300 also needs to have a relatively large length and width, and it is difficult to achieve the design of a small-sized circuit board.

[0039] To solve the above problems, in some embodiments, the signal lines 900 are arranged on the display panel 100.

[0040] However, the applicant found through a large number of experiments that the screen split ratio of the display module with the above structure is relatively high. The reason for the above phenomenon is that based on the existing structure of the display panel 100, the signal lines 900 arranged on the display panel 100 are ultra-thin nano-level traces, and the impedance of these traces is relatively large. After the reference voltage generated by the main chip is transmitted through these traces, it is still very difficult to make the reference voltages of each driving chip 200 consistent, and thus poor split screen display occurs.

[0041] In view of this, as Figure 4 , an embodiment of the present application provides a display module, including: a display panel 100, and a plurality of driving chips 200 are arranged in the peripheral area 120 of the display panel 100; at least one bridging circuit board 500 is arranged on one side of the display panel 100 along the thickness direction of the display panel 100 (the direction perpendicular to the paper surface), and each bridging circuit board 500 is provided with a voltage signal line 510, and the voltage signal line 510 is electrically connected to at least two driving chips 200, so that a reference voltage signal is transmitted between at least two driving chips 200 through the voltage signal line 510.

[0042] Exemplarily, the number of voltage signal lines 510 arranged on each bridging circuit board 500 matches the number of reference voltage signals that the driving chip 200 needs to transmit. For example, the bridging circuit board 500 is provided with at least 11 voltage signal lines 510 for transmitting 11 reference voltage signals such as VGMP, VGSP, and VGMA1-9.

[0043] Exemplarily, a plurality of bridging circuit boards 500 may be provided. For example, the number of bridging circuit boards 500 is one less than the number of driving chips 200 of the display module. The voltage signal lines 510 on each bridging circuit board 500 are used to transmit a reference voltage signal between two driving chips 200.

[0044] Exemplarily, all the voltage signal lines 510 may also be integrated on one bridging circuit board 500, so that the display module only includes one bridging circuit board 500.

[0045] Exemplarily, the bridging circuit board 500 may be a flexible circuit board. In this case, the bridging circuit board 500 can be directly electrically connected to the display panel 100 or the driving chip 200 through pins; the bridging circuit board 500 may also be a printed circuit board. In this case, the bridging circuit board 500 can be electrically connected to the display panel 100 or the driving chip 200 through electrical connection lines.

[0046] Exemplarily, the bridging circuit board 500 can be positioned on the display panel 100 through an adhesive structure or a limiting structure, or can also be positioned on the housing of the display device through an adhesive structure or a limiting structure.

[0047] Exemplarily, the voltage signal line 510 can be connected between the main chip and the slave chip, or can also be connected between the slave chips.

[0048] In this embodiment, by transmitting the reference voltage signal between different driving chips 200 through the voltage signal lines 510, the reference voltages provided by multiple driving chips 200 can be kept consistent, avoiding poor split-screen display of the display module. At the same time, since the voltage signal lines 510 are arranged on the bridging circuit board 500 independent of the display panel 100, the first flexible circuit board 400, and the first printed circuit board 300, the layout of the voltage signal lines 510 can no longer be restricted by other devices or traces among the above three. This provides a structural basis for shortening the routing path of the voltage signal lines 510. At the same time, since the first flexible circuit board 400 and the first printed circuit board 300 no longer have signal lines 900 for transmitting the reference voltage between the driving chips 200, then the first flexible circuit board 400 and the first printed circuit board 300 do not need to reserve pins and space for arranging the signal lines 900, which helps to realize the design of small-sized circuit boards and helps to improve the product competitiveness of the display module.

[0049] Such as Figure 5 and Figure 6, in some embodiments, at least one voltage pad group 600 is provided corresponding to each driving chip 200 in the peripheral area 120. Each voltage pad group 600 includes at least one voltage pad 610 electrically connected to the reference voltage pin of the corresponding driving chip 200; the voltage signal line 510 includes a first sub-signal line 511, and the first sub-signal line 511 is electrically connected to the voltage pads 610 corresponding to two driving chips 200 respectively.

[0050] Exemplarily, each voltage pad 610 is electrically connected to the corresponding reference voltage pin of the driving chip 200 through a trace provided in the peripheral area 120.

[0051] Exemplarily, multiple driving chips 200 can be arranged at intervals in the peripheral area 120 along a first direction (such as Figure 6 the X direction in). The voltage pad groups 600 are arranged along the first direction on at least one side of the driving chips 200, and the multiple voltage pads 610 in each voltage pad group 600 are arranged at intervals along the edge of the driving chip 200. Since the first sub-signal line 511 extends from the voltage pad 610 corresponding to the previous driving chip 200 to the voltage pad 610 corresponding to the next driving chip 200, arranging the voltage pad groups 600 along the setting direction of the driving chips 200 can further shorten the extension length of the first sub-signal line 511 and reduce the risks of voltage drop and open circuit.

[0052] Exemplarily, the number of voltage pads 610 in each voltage pad group 600 matches the number of reference voltage signals that the driving chip 200 needs to transmit.

[0053] Exemplarily, the arrangement order of the voltage pads 610 in each voltage pad group 600 is the same, which can prevent the multiple first sub-signal lines 511 between two voltage pad groups 600 from intersecting and helps to reduce the laying difficulty of the first sub-signal line 511.

[0054] Taking Figure 6 the structure and direction shown in as an example for further illustration. In the peripheral area 120, a first driving chip 200A, a second driving chip 200B, and a third driving chip 200C are arranged in sequence from left to right. A first voltage pad group 600a is provided on the right side of the first driving chip 200A, and a second voltage pad group 600b and a third voltage pad group 600c are respectively provided on the left and right sides of the second driving chip 200B.

[0055] Each of the multiple voltage pads 610 in the first voltage pad group 600a is electrically connected to a corresponding reference voltage pin of the first driving chip 200A. For example, the first voltage pad 610 from top to bottom in the first voltage pad group 600a is connected to the reference voltage pin of the first driving chip 200A for providing an α reference voltage signal, and the second voltage pad 610 is connected to the reference voltage pin of the first driving chip 200A for providing a β reference voltage signal.

[0056] Each of the multiple voltage pads 610 in the second voltage pad group 600b is electrically connected to a corresponding reference voltage pin of the second driving chip 200B, and each of the multiple voltage pads 610 in the third voltage pad group 600c is also electrically connected to a corresponding reference voltage pin of the second driving chip 200B. For example, the second driving chip 200B is provided with two reference voltage pins for providing α reference voltage signals (hereinafter referred to as α pins). One of the voltage pads 610 in the second voltage pad group 600b is connected to one of the α pins of the second driving chip 200B, and one of the voltage pads 610 in the third voltage pad group 600c is connected to the other α pin of the second driving chip 200B, and the two voltage pads 610 can be conducted in the second driving chip 200B.

[0057] The first sub-signal line 511 for transmitting a reference voltage signal between the first driving chip 200A and the second driving chip 200B is disposed between the first voltage pad group 600a and the second voltage pad group 600b. Both ends of the first sub-signal line 511 are respectively connected to the corresponding voltage pads 610 in the first voltage pad group 600a and the second voltage pad group 600b, so that the reference voltage pins (such as α pins) of the first driving chip 200A and the second driving chip 200B that provide the same reference voltage signal are electrically connected to each other, so that the reference voltage signal provided by the first driving chip 200A can be transmitted to the second driving chip 200B via the first sub-signal line 511.

[0058] Combined with the above content, it can be seen that each first sub-signal line 511 in this embodiment is only bound and connected to two voltage pads 610. Since the binding times of the first sub-signal line 511 are less, the risk of binding abnormality is correspondingly reduced, which helps to improve the transmission reliability of the reference voltage signal transmitted through the first sub-signal line 511 and ensure that the reference voltages provided by different driving chips 200 are consistent.

[0059] Such as Figure 6 , in some embodiments, all the driving chips 200 are connected in series through the first sub-signal line 511.

[0060] Exemplarily, the first sub-signal lines 511 are disposed between two adjacent driving chips 200, and all the first sub-signal lines 511 between the two driving chips 200 are integrated on the same bridging circuit board 500; at this time, each bridging circuit board 500 can form a regular rectangle, which helps to reduce the manufacturing difficulty and bonding difficulty of the bridging circuit board 500, and has strong factory feasibility, which is conducive to mass production.

[0061] Combined with the foregoing content, taking Figure 6 the structure and direction shown in as an example for further illustration. Since the corresponding voltage pads 610 in the second voltage pad group 600b and the third voltage pad group 600c can be conducted in the second driving chip 200B, all the driving chips 200 in the peripheral area 120 can be connected in series through the first sub-signal lines 511. At this time, any one of the driving chips 200 can be used as the main chip, and the reference voltage signal provided by the main chip can be transmitted to all slave chips through the series circuit formed by the first sub-signal lines 511, further ensuring that the reference voltages provided by different driving chips 200 are consistent.

[0062] At the same time, all the driving chips 200 form a series circuit through the first sub-signal lines 511. Since each first sub-signal line 511 only needs to connect two adjacent driving chips 200, the extension length of each first sub-signal line 511 can also be shortened, the layout difficulty of the first sub-signal lines 511 can be reduced, and it is beneficial to the development of the production line process.

[0063] Such as Figure 7 、 Figure 8 and Figure 9 , in some embodiments, two voltage pad groups 600 are provided corresponding to each driving chip 200 in the peripheral area 120; the voltage signal lines 510 further include second sub-signal lines 512, and the second sub-signal lines 512 are respectively electrically connected to the voltage pads 610 of the two voltage pad groups 600 corresponding to the same driving chip 200.

[0064] Exemplarily, the two voltage pad groups 600 corresponding to the same driving chip 200 are respectively disposed on opposite sides of the driving chip 200.

[0065] Exemplarily, the end of the second sub-signal line 512 can be electrically connected to the voltage pad 610 or to the corresponding first sub-signal line 511.

[0066] Taking Figure 8 and Figure 9 the structure and direction shown in as an example for further illustration. Such as Figure 8, voltage pad groups 600 are respectively arranged on the left and right sides of the first driving chip 200A, the second driving chip 200B, and the third driving chip 200C. Taking the second driving chip 200B as an example for illustration, the second voltage pad group 600b and the third voltage pad group 600c corresponding to the second driving chip 200B are respectively located on the left and right sides of the second driving chip 200B. As Figure 9 , both ends of the second sub-signal line 512 are respectively connected to the corresponding voltage pads 610 in the second voltage pad group 600b and the third voltage pad group 600c. Since the impedance of the second sub-signal line 512 is lower than the impedance inside the second driving chip 200B, the second sub-signal line 512 can further ensure that the reference voltages at the corresponding voltage pads 610 in the second voltage pad group 600b and the third voltage pad group 600c are consistent, thereby avoiding poor split-screen display in the display module.

[0067] As Figure 8 , in some embodiments, the peripheral area 120 includes a bonding sub-area 121 and a bending sub-area 122. The bonding sub-area 121 is farther from the display area 110 of the display panel 100 than the bending sub-area 122; the voltage pad group 600 is arranged in the bonding sub-area 121.

[0068] When assembling the display module, the peripheral area 120 needs to be bent in the bending sub-area 122. After the bending sub-area 122 is bent, the bonding sub-area 121 can be positioned on the backlight side of the display panel 100. Therefore, arranging the voltage pad group 600 in the bonding sub-area 121 can avoid the voltage pads 610 in the voltage pad group 600 from having an adverse effect on the bending process of the bending sub-area 122 and ensure the smooth progress of the assembly process of the display module.

[0069] As Figure 6 and Figure 9 , in some embodiments, two adjacent driving chips 200 are arranged at intervals, and the orthographic projection of the bridging circuit board 500 on the display panel 100 is at least located between two adjacent driving chips 200.

[0070] When the bridging circuit board 500 is only provided with the first sub-signal line 511, the bridging circuit board 500 can be a rectangular structure arranged between adjacent driving chips 200, such as Figure 6 . At this time, the display panel 100 is connected with a plurality of bridging circuit boards 500. The size of each bridging circuit board 500 is small, and because the structure is relatively regular, it is easier to process and easier to ensure product quality.

[0071] When the bridging circuit board 500 is provided with both the first sub-signal line 511 and the second sub-signal line 512, the bridging circuit board 500 is not only disposed between adjacent driving chips 200 (this part is used for laying out the first sub-signal line 511), but also can be disposed on one side of the driving chip 200 close to the bending sub-region 122 (this part is used for laying out the second sub-signal line 512), as Figure 9 . At this time, the voltage signal lines 510 for connecting all the driving chips 200 are all disposed on the same bridging circuit board 500, which is convenient for material preparation during assembly.

[0072] As Figure 6 and Figure 9 , in some embodiments, the driving chips 200 are disposed in the bonding sub-region 121, and the orthographic projection of the bridging circuit board 500 on the display panel 100 does not coincide with the bending sub-region 122.

[0073] The orthographic projection of the bridging circuit board 500 on the display panel 100 not coinciding with the bending sub-region 122 can avoid adverse effects of the bridging circuit board 500 on the bending process of the bending sub-region 122 and ensure the smooth progress of the assembly process of the display module.

[0074] As Figure 9 shown, in some embodiments, a ground pad 700 is provided corresponding to each driving chip 200 in the peripheral region 120, and the ground pad 700 is electrically connected to the ground pin of the corresponding driving chip 200; the bridging circuit board 500 is provided with a ground signal line 520, and the ground signal line 520 is electrically connected to all the ground pads 700 respectively.

[0075] Exemplarily, the ground signal line 520 can be electrically connected to the ground point 800 (GND) of the display panel 100, or the ground pad 700 corresponding to one of the driving chips 200 is electrically connected to the ground point 800 of the display panel 100.

[0076] Through the ground signal line 520, the ground pins of all the driving chips 200 can be electrically connected to each other so that the voltages of the ground pins of all the driving chips 200 are the same. At the same time, compared with the structure in which the ground pins of different driving chips 200 are indirectly electrically connected through the first flexible circuit board 400 and the first printed circuit board 300, in this embodiment, by providing the ground signal line 520 on the bridging circuit board 500, the ground pins of all the driving chips 200 can be directly connected, further ensuring the stability and consistency of the ground voltages of all the driving chips 200.

[0077] It should be noted that the connection manner between the ground signal line 520 and the ground pad 700 is the same as or similar to the connection manner between the voltage signal line 510 and the voltage pad 610 described above, and will not be elaborated here.

[0078] In some embodiments, the thickness of the bridging circuit board 500 is less than that of the driving chip 200.

[0079] In this embodiment, after the bridging circuit board 500 is connected to the display panel 100, since the thickness of the bridging circuit board 500 is less than that of the driving chip 200, along the thickness direction of the display panel 100, the bridging circuit board 500 will not protrude from the driving chip 200. It is ensured that after the display panel 100 is connected to the bridging circuit board 500, the overall thickness of the display module will not increase, and it can effectively prevent the problem of mechanical interference during the assembly of the display module due to the addition of the bridging circuit board 500.

[0080] In some embodiments, the bridging circuit board 500 is a flexible circuit board.

[0081] Exemplarily, when the bridging circuit board 500 is a flexible circuit board, the bridging circuit board 500 and the voltage pad 610 can be bonded and conducted through an anisotropic conductive film (ACF).

[0082] Setting the voltage signal line 510 on the flexible circuit board can reduce the wiring resistance of the voltage signal line 510 to the milliohm level. When transmitting the reference voltage signal through the voltage signal line 510, the risk of voltage drop can be effectively reduced, and it will not have an adverse effect on the reference voltage signal, which can further ensure that the reference voltages between multiple driving chips 200 are consistent and avoid the problem of abnormal split-screen display of the display module.

[0083] In some embodiments, an adhesive layer is provided between the bridging circuit board 500 and the display panel 100, and the bridging circuit board 500 is positioned on the display panel 100 through the adhesive layer.

[0084] Exemplarily, the adhesive layer can be a structural layer formed by a solid adhesive (such as double-sided tape), or a structural layer formed after curing a liquid adhesive.

[0085] Through the adhesive layer, the bridging circuit board 500 and the display panel 100 can be kept relatively stationary, and it can be avoided that during the assembly and use process, due to the relative movement between the bridging circuit board 500 and the display panel 100, the connection between the voltage signal line 510 and the voltage pad 610 is disconnected, resulting in the inability to transmit the reference voltage signal between the driving chips 200, and further causing the problem of abnormal split-screen display of the display module.

[0086] Based on the same inventive concept, in combination with the description of the display module in the above various embodiments, this embodiment provides a method for manufacturing a display module. This method has the corresponding technical effects of the display modules in the above various embodiments, and will not be elaborated here.

[0087] A method for manufacturing a display module, which is used to manufacture the display module described in each of the above embodiments, the method includes;

[0088] Step S100: Provide a display panel, and a plurality of driving chips are arranged in the peripheral area of the display panel.

[0089] Step S200: Form a bridging circuit board, and voltage signal lines are arranged on the bridging circuit board.

[0090] The voltage signal lines 510 can be formed on the bridging circuit board 500 through a patterning process.

[0091] As used in the embodiments of the present application, the "patterning process" for metal materials, inorganic materials or transparent conductive materials includes processes such as coating photoresist, mask exposure, development, etching, and photoresist stripping. For organic materials, it includes processes such as coating organic materials, mask exposure, and development. Deposition can be carried out by any one or more of sputtering, evaporation, and chemical vapor deposition. Coating can be carried out by any one or more of spraying, spin coating, and inkjet printing. Etching can be carried out by any one or more of dry etching and wet etching, without limitation.

[0092] Step S300: Connect the bridging circuit board to the display panel, and the voltage signal lines are electrically connected to at least two of the driving chips, so that a reference voltage signal is transmitted between at least two of the driving chips through the voltage signal lines.

[0093] The voltage signal lines 510 can be electrically connected to the corresponding driving chips 200 through a bonding process, thereby realizing the connection of the bridging circuit board 500 to the display panel 100.

[0094] Based on the same inventive concept, in combination with the description of the display module in each of the above embodiments, this embodiment provides a display device, which has the corresponding technical effects of the display module in each of the above embodiments, and will not be elaborated here.

[0095] A display device includes the display module described in each of the above embodiments.

[0096] It should be noted that some embodiments of the present application are described above. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be performed in a different order than in the above embodiments and still achieve the desired results. Additionally, the processes depicted in the figures do not necessarily require the particular order or sequential order shown to achieve the desired results. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0097] In each embodiment of the present application, a progressive approach is adopted. Each embodiment focuses on the differences from other embodiments. For the same or similar parts among the embodiments, reference can be made to each other.

[0098] The description of the present application is given for purposes of illustration and description, and is not intended to be exhaustive or to limit the present application to the disclosed form. Many modifications and variations are obvious to those of ordinary skill in the art. The embodiments are chosen and described in order to better explain the principles and practical applications of the present application, and to enable those of ordinary skill in the art to understand the present application and design various embodiments with various modifications suitable for specific purposes.

[0099] Those of ordinary skill in the art should understand that: the discussion of any of the above embodiments is only exemplary, and is not intended to imply that the scope of the present application is limited to these examples; under the concept of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations in different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of brevity.

[0100] Although the present application has been described in connection with specific embodiments of the present application, many alternatives, modifications, and variations of these embodiments will be apparent to those of ordinary skill in the art based on the foregoing description.

[0101] The embodiments of the present application are intended to cover all such alternatives, modifications, and variations that fall within the broad scope of the present application. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application shall be included within the protection scope of the present application.

Claims

1. A display module, characterized in that, Comprising: A display panel, wherein a plurality of driving chips are arranged in a peripheral area of the display panel; At least one bridging circuit board, which is arranged on one side of the display panel along the thickness direction of the display panel, and each bridging circuit board is provided with a voltage signal line, and the voltage signal line is electrically connected to at least two of the driving chips, so that a reference voltage signal is transmitted between at least two of the driving chips through the voltage signal line.

2. The display module according to claim 1, characterized in that, At least one voltage pad group is arranged in the peripheral area corresponding to each driving chip, and each voltage pad group includes at least one voltage pad electrically connected to a reference voltage pin of the corresponding driving chip; The voltage signal line includes a first sub-signal line, and the first sub-signal line is respectively electrically connected to the voltage pads corresponding to two respective driving chips.

3. The display module according to claim 2, wherein All the driving chips are connected in series through the first sub-signal line.

4. The display module according to claim 2, wherein Two voltage pad groups are arranged in the peripheral area corresponding to each driving chip; The voltage signal line further includes a second sub-signal line, and the second sub-signal line is respectively electrically connected to the voltage pads of two voltage pad groups corresponding to the same driving chip.

5. The display module according to claim 2, wherein The peripheral area includes a bonding sub-area and a bending sub-area, and the bonding sub-area is farther from the display area of the display panel than the bending sub-area; The voltage pad group is arranged in the bonding sub-area.

6. The display module according to claim 1, characterized in that, Adjacent two driving chips are arranged at intervals, and the orthographic projection of the bridging circuit board on the display panel is at least located between adjacent two driving chips.

7. The display module according to claim 1, wherein The peripheral area includes a bonding sub-area and a bending sub-area, the driving chips are arranged in the bonding sub-area, and the orthographic projection of the bridging circuit board on the display panel does not coincide with the bending sub-area.

8. The display module according to claim 1, wherein A ground pad is arranged in the peripheral area corresponding to each driving chip, and the ground pad is electrically connected to a ground pin of the corresponding driving chip; The bridging circuit board is provided with a ground signal line, and the ground signal line is respectively electrically connected to all the ground pads.

9. The display module according to claim 1, wherein The thickness of the bridging circuit board is less than the thickness of the driving chip.

10. The display module according to claim 1, wherein, The bridging circuit board is a flexible circuit board.

11. The display module according to claim 1, wherein An adhesive layer is arranged between the bridging circuit board and the display panel, and the bridging circuit board is positioned on the display panel through the adhesive layer.

12. A display device, characterized in that, Including the display module according to any one of claims 1 to 11.

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