PCIE switch based on SM8748 bridge chip
Through the PCIE switch based on SM8748 bridge, the problem of high-speed and low-latency communication between weapons and equipment computing storage nodes is solved, and efficient multi-port configuration and redundant fault tolerance functions are realized, meeting the communication needs of weapons and equipment.
Patent Information
- Application Number
- CN202422283455.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-19
- Publication Date
- 2025-07-18
- Estimated Expiration
- 2034-09-19
AI Technical Summary
The prior art cannot meet the communication needs of high-speed and low-latency between weapons and equipment computing storage nodes. Simple Ethernet switching cannot meet the applications in specific scenarios and requires an efficient PCIE switch solution.
Design a PCIE switch based on SM8748 bridge chip, including PCIE switching chip module, power module, PCIE connection port module, EEPROM and digital dial switch module, LED signal conversion circuit, FPGA and management module, and clock circuit module, to realize multi-host system data exchange and PCIE peripheral equipment expansion.
It realizes high-speed PCIE communication, supports multi-port configuration, has redundant fault tolerance functions, has high transmission rate, large number of ports, flexible configuration, and meets different needs.
Smart Images
Figure CN223124913U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a switch, in particular to a PCIE switch based on an SM8748 bridge chip. Background Art
[0002] As an important method for upgrading servers or systems, horizontal expansion is becoming more and more popular, and more and more manufacturers are using this method to upgrade their products. Traditional networks, InfiniBand, and PCIE can all be used to help achieve horizontal expansion; and as an expansion bus in traditional computer systems, the PCIE bus has a very rich ecological and technical foundation, and with the continuous development of its switching technology, it has gradually become a powerful means of communication between systems. The realization of horizontal expansion and fault-tolerant design based on PCIE is inseparable from the PCIE multi-function switch. The so-called multi-function PCIE switch refers to a switching device with multiple PCIE bridges, support for multiple configurations, built-in non-transparent bridges and even DMA functions, which is flexible in configuration and easy to manage.
[0003] At present, electronic information systems mainly use Ethernet to establish interconnection architecture. However, as weapons and equipment put forward higher speed, lower latency and stronger functions for communication between computing and storage functional nodes, simple Ethernet switching can no longer meet the application of certain specific scenarios, and it is urgently necessary to use PCIE bus for upgrading. Utility Model Content
[0004] The utility model aims to provide a PCIE switch based on the SM8748 bridge chip, which can realize data exchange between multiple host systems and expand PCIE peripheral devices, and has the characteristics of high transmission rate, large number of ports, flexible configuration, etc.
[0005] The technical solution to achieve the purpose of this utility model is:
[0006] A PCIE switch based on SM8748 bridge chip, the device comprising:
[0007] A PCIE switching chip module is used to realize PCIE interface expansion. The module is connected with a power module, a PCIE connection port module, an EEPROM, a digital dial switch module, an LED signal conversion circuit, an FPGA, a management module, and a clock circuit module;
[0008] The power module realizes the power supply for each functional circuit of the switch;
[0009] PCIE connection port module, PCIE signal is led out;
[0010] EEPROM and digital DIP switch modules to initialize chip settings;
[0011] The LED signal conversion circuit outputs the working status signals of each port;
[0012] The FPGA and the management module jointly complete the control of the input network and USB signals for the switching system;
[0013] The clock circuit module is used to provide the PCIE common clock for each device.
[0014] Furthermore, for the PCIE switching module, the core PCIE switching chip is SM8748. The SM8748 chip can support up to 4 partitions, 16 ports, and 64 PCIE signals. In a separate partition, SM8748 can support one uplink port to achieve redundant fault tolerance. SM8748 has two working modes, the basic working mode and the virtual switch working mode. Through initialization configuration, the required PCIE switching function can be completed.
[0015] Furthermore, the power supply module uses a power supply chip or a power supply module to convert the input 12V DC power supply into various secondary power supplies required for the operation of the switch.
[0016] Furthermore, the PCIE connection port module adopts standard SFF-8644 or SFF-8643 connectors, and cooperates with special cables to lead out the PCIE signals outside the switch.
[0017] Furthermore, for the EEPROM and digital DIP switch module, an EEPROM storage chip is used to save the initial configuration of the switch. The EEPROM storage chip is connected to the SM8748 bridge chip through an SPI interface, with the bridge chip as the master end and the EEPROM as the slave end.
[0018] Furthermore, the DIP switch is connected to the CFG pin of the bridge chip. By changing the state of the digital DIP switch, the switch can be configured into different working modes.
[0019] Furthermore, for the LED signal conversion circuit, light-emitting diodes are used as light-emitting devices, and the light-emitting diodes are controlled through the PORT_GOOD pin of the SM8748 switching chip to indicate the working status of the switch.
[0020] Furthermore, the FPGA and the management module are connected to the PCIE switching chip through a 1-lane PCIE X1 interface to expand the external USB interface and gigabit network, and support reading the working information of the switch through USB or network and configuring the switch.
[0021] Further, the clock circuit module uses a 100 MHz crystal oscillator with high precision as the clock source, and uses a clock buffer chip with zero delay to multiplex the 100 MHz clock into PCIE homologous clocks, which are provided for the PCIE switch chip and the downstream PCIE devices to use.
[0022] Compared with the prior art, the beneficial effects of the present utility model are as follows:
[0023] 1) The PCIE communication rate is high, supporting up to PCIE GEN3 X16, with a rate of up to 128 GT / s;
[0024] 2) The ports are rich, and the number and bandwidth of the upstream and downstream ends can be flexibly configured according to actual usage requirements;
[0025] 3) The standard SFF connector is used, with strong scalability. Description of the Drawings
[0026] Figure 1 It is a working block diagram of a PCIE switch based on the SM8748 bridge chip. Detailed Embodiment
[0027] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0028] Embodiment 1
[0029] Combined with Figure 1 , this patent provides a PCIE switch based on the SM8748 bridge chip, and the device includes:
[0030] The PCIE switch chip module realizes PCIE interface expansion;
[0031] The power supply module realizes the power supply for each functional circuit of the switch;
[0032] The PCIE connection port module leads out the PCIE signal externally;
[0033] The EEPROM and digital dimming switch module realize the initialization chip settings;
[0034] The LED signal conversion circuit outputs the working state signals of each port;
[0035] The FPGA and management module jointly complete the control of the input network and USB signals for the switching system;
[0036] The clock circuit module is used to provide PCIE homologous clocks for each device.
[0037] Preferably, the core PCIE switching chip of the PCIE switching module is SM8748 of Shenzhen Guowei Company. The SM8748 chip can support up to 4 partitions, 16 ports, and 48 PCIE signals. In a separate partition, the SM8748 can support one uplink port to achieve redundant fault tolerance. The SM8748 has two working modes, the basic working mode and the virtual switch working mode. Through the initialization configuration, the required PCIE switching function can be completed.
[0038] Preferably, the power module uses a DC power chip, model MAC4630 of Tianyi Aerospace Company and XC9884 step-down chip of Jiangsu Zhanxin Company, to convert the input 12V DC power into various secondary power supplies such as +3.3V, +1.8V, +1.1V required for the operation of the switch.
[0039] Preferably, the PCIE connection port module uses a standard commercial SFF-8644 connector and cooperates with a dedicated cable to lead the PCIE signal out of the switch. When using a cable, the maximum lead-out length is 10 meters; when using an optical fiber, the maximum lead-out length is 100 meters.
[0040] Preferably, the EEPROM and digital dip switch modules, the EEPROM memory uses the SJ24C256PS memory of Shujun Micro Corporation, and the EEPROM storage chip is used to save the initial configuration of the switch. The dip switch uses the KCT-B-1-1 type 8-bit digital dip switch of 851 Factory. By changing the state of the digital dip switch, the switch can be configured to different working modes.
[0041] Preferably, the LED signal conversion circuit uses a light emitting diode as a light emitting device, and selects the BT003SC light emitting diode of Ruipu Beiguang Company, and controls the light emitting diode through the PORT_GOOD pin of the SM8748 switching chip to indicate the working status of the switching.
[0042] Preferably, the FPGA and management module are connected to an external USB interface and a gigabit network, and the FPGA chip uses a JFM7K325T programmable logic gate circuit of Fudan Microelectronics Company, which supports reading exchanged working information through USB or the network and configuring the switch.
[0043] Preferably, the clock circuit module uses the XO53 series high-precision 100MHz crystal oscillator of Jingyuxing Company as the clock source, and uses the SM9FG108 zero-delay clock buffer chip of Shenzhen Guowei Company to convert the 100MHz clock into multiple PCIE homologous clocks.
[0044] The above are only the preferred embodiments of the present utility model and are not intended to limit the present utility model. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.
[0045] Of course, the above description is not limited to the above examples. The technical features not described in the present utility model can be realized by or adopt the prior art, and will not be elaborated herein. The above embodiments and the drawings are only used to illustrate the technical solutions of the present utility model and are not intended to limit the present utility model. The present utility model has been described in detail with reference to the preferred embodiments. Those of ordinary skill in the art should understand that any changes, modifications, additions or substitutions made by those of ordinary skill in the art within the essence of the present utility model do not depart from the purpose of the present utility model and should also fall within the protection scope of the claims of the present utility model.
Claims
1. A PCIE switch based on the SM8748 bridge chip, characterized in that, Including: A PCIE switch chip module that realizes PCIE interface expansion. This module is connected to a power supply module, a PCIE connection port module, an EEPROM, a digital DIP switch module, an LED signal conversion circuit, an FPGA, a management module, and a clock circuit module; A power supply module that realizes the power supply for each functional circuit of the switch; A PCIE connection port module that leads out PCIE signals externally; An EEPROM and a digital DIP switch module that realize the initialization of chip settings; An LED signal conversion circuit that outputs the working state signals of each port; An FPGA and a management module that jointly complete the control of the input network and USB signals to the switching system; A clock circuit module that provides PCIE homologous clocks to each device; 2. The PCIE switch based on the SM8748 bridge chip according to claim 1, wherein, The PCIE switch chip module uses an SM8748 bridge chip.
3. The PCIE switch based on the SM8748 bridge chip according to claim 1, wherein, The power supply module uses a power chip or a power module to convert the input 12V DC power into the secondary power required for the operation of the switch.
4. The PCIE switch based on the SM8748 bridge chip according to claim 1, characterized in that, The PCIE connection port module uses a standard SFF-8644 or SFF-8643 connector, and cooperates with a special cable to lead out PCIE signals outside the switch.
5. The PCIE switch based on the SM8748 bridge chip according to claim 2, characterized in that, The EEPROM storage chip is connected to the SM8748 bridge chip through an SPI interface, with the bridge chip as the master end and the EEPROM storage chip as the slave end.
6. The PCIE switch based on the SM8748 bridge chip according to claim 2, wherein, The digital DIP switch module is connected to the CFG pin of the SM8748 bridge chip.
7. The PCIE switch based on the SM8748 bridge chip according to claim 2, wherein The LED signal conversion circuit uses a light-emitting diode as the light-emitting device, and the PORT_GOOD pin of the SM8748 bridge chip is connected to the light-emitting diode.
8. The PCIE switch based on the SM8748 bridge chip according to claim 2, characterized in that, The FPGA and the management module are connected to the SM8748 bridge chip through a 1-way PCIE X1 interface to expand the external USB interface and gigabit network.
9. The PCIE switch based on the SM8748 bridge chip according to claim 1, wherein The clock circuit module uses a 100MHz crystal oscillator as the clock source and uses a zero-delay clock buffer chip to generate multiple 100MHz PCIE homologous clocks.