Test machine analog signal calibration device and test machine

Abstract

The utility model relates to a test machine analog signal calibration device and a test machine, the calibration device comprises a signal processing module and a signal compensation module, and the signal processing module comprises a data receiving circuit for receiving analog signals of the test machine; the FFT circuit is used for converting the analog signal and outputting frequency domain data; the parameter output circuit is used for receiving frequency domain data and outputting compensation parameters; the data receiving circuit is connected with the FFT circuit, and the FFT circuit is connected with the parameter output circuit; the signal compensation module is connected with the parameter output circuit and receives compensation parameters to calibrate analog signals of the testing machine, deviation of the analog signals caused by external factors is reduced, and the anti-interference capability of the analog signals is improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor testing technology, and in particular, to a calibration device for analog signals of a tester and a tester. Background Art

[0002] Semiconductor automated testing refers to using Automatic Test Equipment (ATE) to detect various parameter indicators of a Device Under Test (DUT), and eliminating defective products to control the ex-factory quality of semiconductor devices. In addition to measuring the voltage and current of the device under test, the time parameters of the device under test are also one of the important indicators. When the tester inputs or outputs analog signals, due to external factors such as hardware design and external connection wires, the analog signals input and output by the tester will have deviations and poor anti-interference ability. Summary of the Utility Model

[0003] Based on this, in view of the above problems, it is necessary to provide a calibration device for analog signals of a tester and a tester that can improve the anti-interference ability of analog signals.

[0004] In the first aspect of this application, a calibration device for analog signals of a tester is provided, including a signal processing module and a signal compensation module, where:

[0005] The signal processing module includes:

[0006] A data receiving circuit for receiving the analog signal of the tester;

[0007] An FFT circuit for converting the analog signal and outputting frequency domain data;

[0008] A parameter output circuit for receiving the frequency domain data and outputting compensation parameters;

[0009] The data receiving circuit is connected to the FFT circuit, and the FFT circuit is connected to the parameter output circuit; the signal compensation module is connected to the parameter output circuit and receives the compensation parameters to calibrate the analog signal of the tester.

[0010] In one embodiment, the signal processing module further includes a data storage circuit, and the data receiving circuit is connected to the FFT circuit through the data storage circuit.

[0011] In one embodiment, the parameter output circuit includes a parameter processing circuit and a parameter storage circuit. The parameter processing circuit is connected to the FFT circuit and the parameter storage circuit, and the parameter storage circuit is connected to the signal compensation module.

[0012] In one embodiment, the parameter processing circuit includes an amplitude circuit and a filter. The amplitude circuit is connected to the FFT circuit and the filter, and the filter is connected to the parameter storage circuit. The amplitude circuit receives the frequency-domain data and outputs the amplitudes of the analog signal at different frequency points to the filter. The filter outputs the amplitude compensation parameters of the analog signal at different frequency points to the parameter storage circuit.

[0013] In one embodiment, the parameter processing circuit includes a phase circuit. The phase circuit is connected to the FFT circuit and the parameter storage circuit. The phase circuit receives the frequency-domain data and outputs the phase compensation parameters of the analog signal at different frequency points to the parameter storage circuit.

[0014] In one embodiment, the signal compensation module includes a parameter application circuit and a signal compensation circuit. The parameter application circuit is connected to the parameter output circuit and the signal compensation circuit.

[0015] In one embodiment, the signal compensation circuit includes a filter circuit and / or a phase processing circuit connected to the parameter application circuit.

[0016] In one embodiment, the signal compensation module is an FPGA, an MCU, or a CPU.

[0017] A second aspect of the present application provides a test device, including the above-mentioned test machine analog signal calibration device.

[0018] In one embodiment, the test device further includes a host computer and a test machine. The signal processing module is disposed in the host computer or the test machine, and the signal compensation module is disposed in the test machine.

[0019] For the above-mentioned test machine analog signal calibration device and test machine, the data receiving circuit receives the analog signal of the test machine, the FFT circuit converts the analog signal and outputs the frequency-domain data, the parameter output circuit receives the frequency-domain data and outputs the compensation parameters, and the signal compensation module receives the compensation parameters to calibrate the analog signal of the test machine, reducing the deviation caused by external factors to the analog signal and improving the anti-interference ability of the analog signal. Description of the Drawings

[0020] Figure 1 It is a structural block diagram of the test machine analog signal calibration device in one embodiment;

[0021] Figure 2 It is a structural block diagram of the test machine analog signal calibration device in another embodiment. Detailed Embodiments

[0022] In order to make the objectives, technical solutions and advantages of the present application more clear and understandable, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used in the description of this application herein are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0024] It can be understood that in the following embodiments, "connection", if there is an electrical signal or data transfer between the connected circuits, modules, units, etc., should be understood as "electrical connection", "communication connection", etc.

[0025] As used herein, the singular forms "a", "an" and "the" may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms "comprise / include" or "have" etc. specify the presence of the stated features, wholes, operations, components, parts or combinations thereof, but do not preclude the presence or addition of one or more other features, wholes, components, parts or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the related listed items.

[0026] In one embodiment, as Figure 1 shown, a calibration device for a test machine analog signal is provided, which includes a signal processing module 100 and a signal compensation module 200, wherein: the signal processing module 100 includes a data receiving circuit 110, an FFT (Fast Fourier Transform) circuit 130 and a parameter output circuit 140. The data receiving circuit 110 is connected to the FFT circuit 130, and the FFT circuit 130 is connected to the parameter output circuit 140. The signal compensation module 200 is connected to the parameter output circuit 140. The data receiving circuit 110 receives the analog signal of the test machine and sends it to the FFT circuit 130. The FFT circuit 130 converts the analog signal and outputs frequency domain data to the parameter output circuit 140. The parameter output circuit 140 receives the frequency domain data and outputs compensation parameters to the signal compensation module 200. The signal compensation module 200 receives the compensation parameters and calibrates the analog signal of the test machine.

[0027] Specifically, the signal processing module 100 and the signal compensation module 200 can be independent of the tester settings, or can be partially or entirely set inside the tester. For example, the signal processing module 100 can be set in the host computer, and the signal compensation module 200 can be set in the tester. By communicating between the host computer and the tester, the analog signals of the tester can be calibrated. The signal processing module 100 and the signal compensation module 200 can adopt a hardware circuit structure. For example, both the signal processing module 100 and the signal compensation module 200 can be functional devices such as FPGA (Field-Programmable Gate Array), MCU (Microcontroller Unit), and CPU (Central Processing Unit). The host computer can be, but is not limited to, various personal computers, laptops, smartphones, tablets, and portable wearable devices. The portable wearable device can be a smart watch, a smart bracelet, a head-mounted device, etc.

[0028] Further, the analog signals of the tester can include the output analog signals that the tester needs to output to external instrument devices, and the input analog signals sent from the external instrument devices to the tester. The output channel of the tester outputs the output analog signals at different amplitude levels and filtering levels as multi-tone signals, that is, multi-tone analog signals superimposed by multiple single-tone signals. The input analog signals received by the input channel of the tester can also be multi-tone signals. Taking the signal processing module 100 set in the host computer and the signal compensation module 200 using an FPGA set in the tester as an example, before the tester sends the output analog signal to the external instrument device, it first sends the output analog signal to the signal processing module 100 of the host computer through the FPGA or other devices. The signal processing module 100 returns the compensation parameters to the signal compensation module 200 in the tester. The signal compensation module 200 calibrates the output analog signal according to the compensation parameters and then sends it to the external instrument device; after the tester receives the input analog signal sent from the external instrument device, it first sends the input analog signal to the signal processing module 100 of the host computer through the FPGA or other devices. The signal processing module 100 returns the compensation parameters to the signal compensation module 200 in the tester. The signal compensation module 200 calibrates the input analog signal according to the compensation parameters, and then performs corresponding analysis and processing based on the calibrated signal.

[0029] It can be understood that for the output analog signal and the input analog signal, the method of the signal processing module 100 for analyzing the compensation parameters and the method of the signal compensation module 200 for signal calibration are the same. Hereinafter, these two analog signals will be collectively referred to as analog signals for the description of the compensation parameter analysis and calibration process.

[0030] As Figure 1As shown, the signal processing module 100 may further include a data storage circuit 120. The data receiving circuit 110 is connected to the FFT circuit 130 through the data storage circuit 120. The data receiving circuit 110 receives the analog signals of the input channel and the output channel of the test machine, forwards the collected analog signals to the data storage circuit 120 for storage, which facilitates the data conversion between the internal circuits of the signal processing module 100. The data in the data storage circuit 120 is forwarded to the FFT circuit 130, and the original data is FFT-converted into frequency-domain data. The FFT circuit 130 mainly analyzes the obtained multi-tone signals based on the FFT algorithm, converts the time-domain data into frequency-domain data, and the frequency-domain data is the data that the parameter output circuit 140 can recognize, which facilitates data conversion to obtain parameters such as amplitude and phase. After receiving the frequency-domain data, the parameter output circuit 140 analyzes it and determines the compensation parameters of the analog signal at different frequency points and sends them to the signal compensation module 200. The number and type of the compensation parameters are not unique either. The parameter output circuit 140 can select one or more from parameters such as amplitude and phase to generate the compensation parameters.

[0031] In one embodiment, as Figure 2 shown, the parameter output circuit 140 includes a parameter processing circuit 142 and a parameter storage circuit 144. The parameter processing circuit 142 is connected to the FFT circuit 130 and the parameter storage circuit 144, and the parameter storage circuit 144 is connected to the signal compensation module 200. The parameter processing circuit 142 analyzes the frequency-domain data, obtains the compensation parameters of the analog signal at different frequency points, and sends them to the parameter storage circuit 144. The parameter storage circuit 144 stores the obtained compensation parameters, which facilitates directly obtaining the compensation parameters during subsequent use. The obtained compensation parameters are sent down to the FPGA in the upper computer for direct use.

[0032] Among them, the parameter processing circuit 142 may include an amplitude circuit 1422 and a filter 1424. The amplitude circuit 1422 is connected to the FFT circuit 130 and the filter 1424, and the filter 1424 is connected to the parameter storage circuit 144. The amplitude circuit 1422 receives the frequency-domain data and outputs the amplitudes of different frequency points of the analog signal to the filter 1424. The filter 1424 outputs the amplitude compensation parameters of different frequency points of the analog signal to the parameter storage circuit 144. Among them, the filter 1424 may specifically be a FIR (Finite Impulse Response) filter. The amplitude circuit 1422 converts the frequency-domain data obtained by the FFT conversion, obtains the amplitudes of multiple frequency points superimposed in the multi-tone signal, and transfers them to the filter 1424. The filter 1424 performs data analysis on the data of all frequency points. After the processes of accumulation and summation, the amplitude compensation parameters of all frequency points in the entire frequency band are obtained, so that the amplitude accuracy of all frequency points meets the accuracy requirements. The generated amplitude compensation parameters are sent to the parameter storage circuit 144 for parameter storage, which is convenient for subsequent use.

[0033] Further, the parameter processing circuit 142 may further include a phase circuit 1426. The phase circuit 1426 is connected to the FFT circuit 130 and the parameter storage circuit 144. The phase circuit 1426 receives the frequency-domain data and outputs the phase compensation parameters of different frequency points of the analog signal to the parameter storage circuit 144.

[0034] To make the analog signals output by the tester have consistent phases for multiple channels, a multi-channel parallel calibration method is adopted. The multiple output channels of the tester and the multiple input channels of the tester are interconnected, and this method of simultaneously collecting analog signals with multi-channel data is used to calibrate and verify the output channels of the tester. The tester collects the output data. The collected analog signals are sent to the data storage circuit 120 through the data receiving circuit 110. The data in the data storage circuit 120 is forwarded to the FFT circuit 130, and the original data is FFT-converted into frequency-domain data. The frequency-domain data is forwarded to the phase circuit 1426 to convert the frequency-domain data transmitted by the FFT, obtain the initial phase angles of multiple frequency points superimposed in the multi-tone signal, and obtain the delay points of each frequency point by accumulating and averaging the collected initial phase angles. This delay point is the phase compensation parameter of each frequency point. The generated phase compensation parameters are sent to the parameter storage circuit 144 for parameter storage, which is convenient for subsequent use.

[0035] In one embodiment, continue to refer to Figure 2, the signal compensation module 200 includes a parameter application circuit 210 and a signal compensation circuit 220. The parameter application circuit 210 is connected to the parameter output circuit 140 and the signal compensation circuit 220. Among them, the parameter application circuit 210 is specifically connected to the parameter storage circuit 144 in the parameter output circuit 140, receives the compensation parameters in the parameter storage circuit 144, performs a code value conversion on the compensation parameters, converts them into binary data that can be recognized by the FPGA, and then transmits the converted binary data to the signal compensation circuit 220 to calibrate the analog signal according to the binary data. Taking the compensation parameters stored in the parameter storage circuit 144 including amplitude compensation parameters and phase compensation parameters as an example, the parameter application circuit 210 receives the amplitude compensation parameters and phase compensation parameters in the parameter storage circuit 144, and can apply the compensation for amplitude and phase to different application scenarios.

[0036] Among them, the signal compensation circuit 220 may include a filter circuit 222 and / or a phase processing circuit 224 connected to the parameter application circuit 210. Also taking the compensation parameters stored in the parameter storage circuit 144 including amplitude compensation parameters and phase compensation parameters as an example, the signal compensation circuit 220 includes a filter circuit 222 and a phase processing circuit 224. The parameter application circuit 210 receives the amplitude compensation parameters and phase compensation parameters in the parameter storage circuit 144, sends the amplitude compensation parameters to the filter circuit 222, and sends the phase compensation parameters to the phase processing circuit 224. The filter circuit 222 performs a conversion process of accumulation and summation on the amplitude compensation parameters and the analog signal to be sent or received by the testing machine, and inputs and outputs analog signals of different frequency points under different amplitude and filtering gear conditions, so that the analog signals input and output by the testing machine at different frequency points meet the accuracy index. After receiving the phase compensation parameters, the phase processing circuit 224 delays the analog signals to be sent or received by each channel equally, so that the analog signals input and output between different channels are synchronously input and output, so that the analog signals input and output by different channels reach the same input and output.

[0037] It should be noted that the FFT circuit 130, amplitude circuit 1422, filter 1424, phase circuit 1426, parameter application circuit 210, filter circuit 222, and phase processing circuit 224 in the above text can all be built with relevant electronic components to form a hardware circuit structure, and their respective functions are realized by applying conventional signal processing means on the basis of the hardware circuit structure.

[0038] The above-mentioned test machine analog signal calibration device is applicable to test machines with all input and output analog signals. By using the method of input and output multi-tone signals, calibration parameters for all frequency points are obtained, and analog signal calibration verification is automatically performed, ensuring that all frequency points supported by the test machine meet the performance indicators. When applying compensation parameters, the obtained compensation parameters are directly sent to the FPGA for processing by the FPGA, improving the overall execution efficiency and data conversion efficiency, and preventing data precision loss caused by code value conversion. Using the multi-tone signal method for calibration can save the time of using single-tone frequency sweeping. The FIR filter can act on the amplitudes of all frequency points within the entire frequency band, improving the amplitude precision of all frequency points. This calibration device can save a large amount of manpower, material resources and time, and can meet data calibration verification under different scenarios and multiple conditions.

[0039] In one embodiment, a test device is further provided, including the above-mentioned test machine analog signal calibration device. Among them, the test device further includes a host computer and a test machine. The signal processing module 100 can be set in the host computer or the test machine. The signal compensation module 200 is set in the test machine. The host computer can be, but is not limited to, various personal computers, laptop computers, smart phones, tablet computers and portable wearable devices. The portable wearable device can be a smart watch, a smart bracelet, a head-mounted device, etc.

[0040] Taking the signal processing module 100 set in the host computer and the signal compensation module 200 using the FPGA set in the test machine as an example, before the test machine sends the output analog signal to the external instrument device, the output analog signal is first sent to the signal processing module 100 of the host computer through the FPGA or other devices. The signal processing module 100 returns the compensation parameters to the signal compensation module 200 in the test machine. The signal compensation module 200 calibrates the output analog signal according to the compensation parameters and then sends it to the external instrument device. After the test machine receives the input analog signal sent by the external instrument device, the input analog signal is first sent to the signal processing module 100 of the host computer through the FPGA or other devices. The signal processing module 100 returns the compensation parameters to the signal compensation module 200 in the test machine. The signal compensation module 200 calibrates the input analog signal according to the compensation parameters and then performs corresponding analysis and processing according to the calibrated signal.

[0041] The technical features of the above-mentioned embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0042] The above-described embodiments merely represent several implementation manners of the present application. The description thereof is relatively specific and detailed, but it should not be construed as a limitation to the scope of the utility model patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all fall within the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.

Claims

1. A calibration device for analog signals of a testing machine, characterized in that It includes a signal processing module and a signal compensation module, where: The signal processing module includes: A data receiving circuit for receiving the analog signal of the testing machine; An FFT circuit for converting the analog signal and outputting frequency-domain data; A parameter output circuit for receiving the frequency-domain data and outputting compensation parameters; The data receiving circuit is connected to the FFT circuit, and the FFT circuit is connected to the parameter output circuit; the signal compensation module is connected to the parameter output circuit and receives the compensation parameters to calibrate the analog signal of the testing machine.

2. The calibration device according to claim 1, wherein The signal processing module further includes a data storage circuit, and the data receiving circuit is connected to the FFT circuit through the data storage circuit.

3. The calibration device according to claim 1, characterized in that The parameter output circuit includes a parameter processing circuit and a parameter storage circuit. The parameter processing circuit is connected to the FFT circuit and the parameter storage circuit, and the parameter storage circuit is connected to the signal compensation module.

4. The calibration device according to claim 3, characterized in that, The parameter processing circuit includes an amplitude circuit and a filter. The amplitude circuit is connected to the FFT circuit and the filter, and the filter is connected to the parameter storage circuit; the amplitude circuit receives the frequency-domain data and outputs the amplitudes of the analog signal at different frequency points to the filter, and the filter outputs the amplitude compensation parameters of the analog signal at different frequency points to the parameter storage circuit.

5. The calibration device according to claim 3, wherein The parameter processing circuit includes a phase circuit, and the phase circuit is connected to the FFT circuit and the parameter storage circuit; the phase circuit receives the frequency-domain data and outputs the phase compensation parameters of the analog signal at different frequency points to the parameter storage circuit.

6. The calibration device according to any one of claims 1-5, characterized in that, The signal compensation module includes a parameter application circuit and a signal compensation circuit, and the parameter application circuit is connected to the parameter output circuit and the signal compensation circuit.

7. The calibration device according to claim 6, wherein The signal compensation circuit includes a filter circuit and / or a phase processing circuit connected to the parameter application circuit.

8. The calibration device according to any one of claims 1-5, characterized in that The signal compensation module is an FPGA, an MCU or a CPU.

9. A testing machine, characterized in that, It includes the testing machine analog signal calibration device according to any one of claims 1-8.

10. The testing machine according to claim 9, wherein It further includes a host computer and a testing machine. The signal processing module is disposed in the host computer or the testing machine, and the signal compensation module is disposed in the testing machine.

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