Power switch control circuit and embedded device

Abstract

The utility model relates to a power switch control circuit and embedded equipment in the technical field of electronic circuits, which comprises an external power supply starting circuit, a key starting circuit, a voltage holding circuit and a master control circuit, the output end of the external power supply starting circuit is electrically connected with the key starting circuit, the key starting circuit is connected with the main control circuit, the voltage holding circuit is connected with the external power supply starting circuit, the voltage holding circuit is also connected with the main control circuit, and the voltage holding circuit is used for controlling the failure of the external power supply starting circuit. The problem that the on-off button fails after the on-off mode of the traditional embedded device is rectified by a manufacturer is solved.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic circuits, and particularly relates to a power switch control circuit and an embedded device. Background Art

[0002] Traditional embedded devices (such as outdoor monitors) are set to be started by a button and shut down by a button. However, since the installation position of the embedded device is at a high place, it is not convenient for staff to start or shut down the device. Therefore, in order to improve the flexibility of the staff to start and shut down the embedded device, the device startup circuit of the embedded device has been rectified. There are two rectification methods. The first is to control the detection of the power-on and power-off button through an external power supply; the second is to connect the external power supply to the enable pin of the power chip to control the enable of the power chip. These two rectification methods form a device startup method in which external power supply startup and button startup coexist.

[0003] However, in the device startup method in which external power supply startup and button startup coexist, after the embedded device is directly started up by the external power supply, the power-on and power-off functions of the button cannot work properly. The main reasons are as follows: When the first rectification method "control the power-on and power-off detection of the button through an external power supply" is adopted, when the external power supply is connected, it is equivalent to triggering the power-on and power-off button to be pressed, and the device will automatically start up. If the external power supply is always directly connected, the power-on button will always be displayed as pressed. When using the button to shut down, pressing the button has no response, that is, the power-on and power-off button fails; when the second rectification method "connect the external power supply to the enable pin of the power chip to control the enable of the power chip" is adopted, if the device always keeps the external power supply connected, when pressing the button to shut down the device, the embedded device cannot shut down normally, or the situation of restarting after shutdown occurs, that is, the power-on and power-off button fails. Summary of the Invention

[0004] Aiming at the shortcomings in the prior art, the utility model provides a power switch control circuit and an embedded device, which solve the problem of the failure of the power-on and power-off button that occurs after the power-on and power-off mode of the traditional embedded device is rectified by the manufacturer.

[0005] In order to solve the above technical problems, the utility model is solved by the following technical solutions:

[0006] A power switch control circuit includes an external power supply startup circuit, a key startup circuit, a voltage holding circuit, and a main control circuit. The input end of the external power supply startup circuit is electrically connected to an external power supply. The output end of the external power supply startup circuit is electrically connected to the key startup circuit. The key startup circuit is connected to the main control circuit. The voltage holding circuit is connected to the external power supply startup circuit and is also connected to the main control circuit. The voltage holding circuit is used to control the failure of the external power supply startup circuit.

[0007] Optionally, the voltage holding circuit includes transistor seven, opto-coupler switch, capacitor four, transistor eight, transistor six, resistor sixteen, transistor two, and transistor nine. The base of transistor seven is connected to the main control circuit. The collector of transistor seven is grounded. The emitter of transistor seven is connected to the negative terminal of the emitter of the opto-coupler switch. The positive terminal of the emitter of the opto-coupler switch is connected to the supply voltage of the main control circuit. One receiving terminal of the opto-coupler switch is connected to capacitor four, and the other receiving terminal is connected to the base of transistor eight. And the end of capacitor four far from the opto-coupler switch is connected to the emitter of transistor eight. The collector of transistor eight is connected to the base of transistor six. The emitter of transistor six is connected to the external power supply voltage. The collector of transistor six is connected to resistor sixteen. The end of resistor sixteen far from transistor six is connected to the bases of transistor two and transistor nine. The emitter of transistor two is grounded and is also connected to the emitter of transistor nine. The collector of transistor two is connected to the external power supply voltage. The collector of transistor nine is connected to the external power supply disable detection signal terminal of the main control circuit.

[0008] Optionally, the external power supply startup circuit includes resistor one, resistor seven, resistor nine, and MOS transistor five. One end of resistor one is connected to the external power supply. The other end of resistor one is connected to resistor seven and is also connected to the gate of MOS transistor five. The end of resistor seven far from resistor one is connected to resistor nine. The end of resistor nine far from resistor seven is also connected to the gate of MOS transistor five. The drain of MOS transistor five is connected to the key startup circuit.

[0009] Optionally, the key startup circuit includes a key detection circuit, and the key detection circuit is used to detect whether the key is pressed.

[0010] Optionally, the key detection circuit includes resistor four, transistor four, key, diode, and resistor three. Resistor four is in series with transistor four. Resistor three is in series with the diode. The collector of transistor four is grounded. After the base of the transistor is connected to the negative terminal of the diode, it is connected to one end of the key. The other end of the key is grounded. The emitter of transistor four is also connected to the key detection signal terminal of the main control circuit.

[0011] Optionally, the button startup circuit further includes a first MOS transistor, a third triode, an eighth resistor, a second resistor, and a second capacitor. The gate of the first MOS transistor is connected to the collector of the third triode. The drain of the first MOS transistor is connected to the control signal terminal of the power supply chip of the main control circuit. The collector of the third triode is further connected to the second capacitor, and the other end of the second capacitor is grounded. The base of the triode is connected to the control signal terminal of the power supply chip of the main control circuit. The emitter of the triode is connected to the eighth resistor, the second resistor is connected in parallel with the eighth resistor, and one end of the second resistor is connected to the control signal terminal of the power supply chip of the main control circuit.

[0012] Optionally, it further includes an external power supply detection circuit for detecting whether an external power supply is connected.

[0013] Optionally, the external power supply detection circuit includes a twenty-third resistor, a twenty-second resistor, a tenth triode, and a twenty-fourth resistor. The twenty-second resistor and the twenty-third resistor are connected in parallel. One end of the twenty-second resistor is connected to the supply voltage of the main control circuit, and the other end of the twenty-second resistor is connected to the collector of the tenth triode. One end of the twenty-third resistor is connected to the external power supply voltage, and the other end of the twenty-third resistor is connected to the base of the tenth triode. The other end of the twenty-third resistor is further connected to the twenty-fourth resistor, and the emitter of the tenth triode is connected to the other end of the twenty-fourth resistor.

[0014] Optionally, it further includes a main control power supply circuit for supplying power to the main control circuit.

[0015] An embedded device includes the power switch control circuit as described in any one of the above.

[0016] Adopting the technical solution provided by the present invention, compared with the prior art, it has the following beneficial effects:

[0017] By introducing a voltage holding circuit, the external power supply startup circuit is controlled to fail through the voltage holding circuit, so that the button startup circuit is not affected by the external power supply startup circuit in subsequent operations, and the effectiveness of button operations in the button startup circuit is maintained. At the same time, after the device is shut down, the method of controlling the failure of the external power supply startup circuit through the voltage holding circuit can also be used to avoid the situation of the device restarting after shutdown. Description of the Drawings

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0019] Figure 1 This is the circuit module diagram of a power switch control circuit proposed in the first embodiment;

[0020] Figure 2 This is the circuit structure diagram of the main control circuit proposed in the first embodiment;

[0021] Figure 3 This is the circuit structure diagram of the external power supply startup circuit proposed in the first embodiment;

[0022] Figure 4 This is the circuit structure diagram of the button startup circuit proposed in the first embodiment;

[0023] Figure 5 This is the circuit structure diagram of the voltage holding circuit proposed in the first embodiment;

[0024] Figure 6 This is the circuit structure diagram of the external power supply detection circuit proposed in the first embodiment;

[0025] Figure 7 This is the circuit structure diagram of the main control power supply circuit proposed in the first embodiment. Detailed implementation manners

[0026] The following further elaborates on the present utility model in conjunction with embodiments. The following embodiments are explanations of the present utility model, and the present utility model is not limited to the following embodiments.

[0027] Embodiment 1

[0028] As Figure 1 shown, a power switch control circuit includes an external power supply startup circuit, a button startup circuit, a voltage holding circuit, and a main control circuit. The input end of the external power supply startup circuit is electrically connected to an external power supply. The output end of the external power supply startup circuit is electrically connected to the button startup circuit. The button startup circuit is connected to the main control circuit. The voltage holding circuit is connected to the external power supply startup circuit and is also connected to the main control circuit. The voltage holding circuit is used to control the failure of the external power supply startup circuit. It further includes an external power supply detection circuit for detecting whether an external power supply is connected, and a main control power supply circuit for supplying power to the main control circuit.

[0029] Among them, as Figure 2 shown, in this embodiment, the main control circuit can be a main control chip with the model STM32D405RGT6. The PC0 pin of the main control chip is connected to an external power supply signal. The PC1 pin of the main control chip outputs an external power supply disable control signal. The PC2 pin outputs an external power supply disable detection signal. The PC3 pin outputs a power control signal. The PC4 pin outputs a button detection signal. As Figure 7As shown, the main control power supply circuit can be a power supply chip with the model number SCT2321TVBR. And in this embodiment, the main control power supply circuit is set as a circuit composed of a power supply chip with the model number SCT2321TVBR and its peripheral circuit structure, which is used to provide 3.3V voltage for the main control circuit.

[0030] When the device is powered on, the external power supply startup circuit is connected to an external charger to start up the device. After the device startup is completed, the external power supply detection circuit detects whether the power switch control circuit is a device started by the external power supply startup circuit. If so, the voltage holding circuit is used to control the external power supply startup circuit to fail, so that the button startup circuit is not affected by the external power supply startup circuit in subsequent operations, and the effectiveness of the button operation in the button startup circuit is maintained; if the external power supply detection circuit detects that the power switch control circuit is controlled and started by the button startup circuit, there is no need to borrow the voltage holding circuit to make the external power supply startup circuit fail, so that the power on / off button in the power switch control circuit always remains effective.

[0031] Further, as Figure 3 shown, the external power supply startup circuit includes resistor one, resistor seven, resistor nine and MOS transistor five. One end of resistor one is connected to the external power supply, the other end of resistor one is connected to resistor seven, and the other end of resistor one is also connected to the gate of MOS transistor five. The end of resistor seven far from resistor one is connected to resistor nine, and the end of resistor nine far from resistor seven is also connected to the gate of MOS transistor five. The drain of MOS transistor five is connected to the button startup circuit, that is: the drain of MOS transistor five is connected to the base of transistor four in the button startup circuit.

[0032] As Figure 4 shown, the button startup circuit includes a button detection circuit, which is used to detect whether the button is pressed. The button detection circuit includes resistor four, transistor four, button, diode and resistor three. Resistor four is in series with transistor four, and resistor three is in series with the diode. The collector of transistor four is grounded, and the base of the transistor is connected to the negative electrode of the diode and then connected to one end of the button. The other end of the button is grounded, and the emitter of transistor four is also connected to the button detection signal terminal of the main control circuit.

[0033] The button startup circuit also includes MOS transistor one, transistor three, resistor eight, resistor two and capacitor two. The gate of MOS transistor one is connected to the collector of transistor three, the drain of MOS transistor one is connected to the power supply chip control signal terminal of the main control circuit, and the collector of transistor three is also connected with capacitor two. The other end of capacitor two is grounded. The base of the transistor is connected to the power supply chip control signal terminal of the main control circuit, the emitter of the transistor is connected with resistor eight, and resistor two is in parallel with resistor eight, and one end of resistor two is connected to the power supply chip control signal terminal of the main control circuit.

[0034] Based on the circuit structure of the external power supply startup circuit and the button startup circuit, if the external power supply startup circuit starts, the external power supply (where the external power supply can be an external charger of 15V) will be connected. Due to the voltage division of resistor R1 and resistor R7, point C is approximately equal to 7.5V, the Vgs of MOS transistor Q5 > 0V, and MOS transistor Q5 conducts. At this time Figure 4 Points A and B in are approximately equal to 4.2V (the Vf1 of Schottky diode XBS104S14 is 0.34V at If = 100mA, which has little impact on the circuit and can be ignored, so the voltages at points A and B are equal). If there is no external power supply (15V) connected, point C is approximately equal to 0V, the Vgs of MOS transistor Q5 ≈ 0V, and MOS transistor Q5 is cut off, thereby determining whether the external power supply startup circuit starts.

[0035] If the power switch control circuit is started by the button startup circuit, then when the button KEY1 is pressed, Figure 4 Points A and B in are approximately equal to 0V (at this time, the main control chip does not work, and the button detection function of the main control chip fails. The button detection of the main control chip will be introduced below). Whether points A and B are approximately equal to 0V caused by pressing the button KEY1 or Figure 4 Points A and B in are approximately equal to 4.2V caused by connecting the external power supply (15V), both will cause the Vgs of MOS transistor Q1 < 0V, and MOS transistor Q1 conducts.

[0036] If there is no external power supply (15V) connected or the button KEY1 is not pressed, since the power control signal terminal Power_IO of the main control chip is pulled low through the pull-down resistor R2 to maintain a low level, the triode Q3 is cut off (Power_IO is connected to the IO pin of the main control chip and is configured in the output mode). The voltages at points A and B are approximately equal to the voltage of the built-in battery (8.4V), the Vgs of MOS transistor Q1 = 0V, MOS transistor Q1 is cut off, and the power chip control signal Power_EN of the main control chip is 0V, that is, a low level (where Power_EN is connected to the enable pin of the power chip to control the enable and disable of the power chip. When Power_EN is at a high level, the power chip works normally, and the power circuit outputs 3.3V for power supply to the main control chip; when Power_EN is at a low level, the power chip does not work, resulting in the main control chip not working. Among them, the power circuit in this embodiment is the main control power supply circuit as shown in Figure 7 ).

[0037] After the MOS transistor Q1 is turned on, Power_EN becomes high level (about 8.4V), the power supply circuit works normally, outputs 3.3V voltage, the main control chip starts to work, and then the main control chip controls the relevant IO pins to make Power_IO output high level (3.3V). The transistor Q3 is turned on, and the voltages at points A and B are approximately equal to the battery voltage × (R8 / (R3 + R8)) ≈ 3V. The Vgs of the MOS transistor Q1 < 0V, keeping the MOS transistor Q1 turned on, and the device starts to work normally.

[0038] As Figure 6 shown, the external power supply detection circuit includes resistor R23, resistor R22, transistor Q10, and resistor R24. Resistor R22 and resistor R23 are connected in parallel. One end of resistor R22 is connected to the power supply voltage of the main control circuit, the other end of resistor R22 is connected to the collector of transistor Q10, one end of resistor R23 is connected to the external power supply voltage, the other end of resistor R23 is connected to the base of transistor Q10, the other end of resistor R23 is also connected to resistor R24, and the emitter of transistor Q10 is connected to the other end of resistor R24.

[0039] When the power switch control circuit starts the device and makes the device start to work normally, it first detects whether there is an external power supply connected. Specifically, based on Figure 6 the structure of the external power supply detection circuit shown, the 3.3V voltage corresponds to the 3.3V in the key start circuit, and the 15V voltage corresponds to the 15V in the external power supply start circuit. If the device is started by the external power supply start circuit, then the transistor Q10 is turned on, and Exte Power outputs low level, indicating that the device is started by the external power supply circuit; if the device is started by the key start circuit, then the transistor Q10 is not turned on, and Exte Power outputs high level, indicating that the device is started by the key.

[0040] If the external power supply detection circuit detects that the device is started by the key start circuit, the startup process ends. If it detects that the device is started by the external power supply start circuit, it checks whether Power_det (Power_det is connected to the IO pin of the main control unit and configured as an input mode) is high level through the main control chip. If Power_det is low level, it means that the external power supply direct start circuit is disabled, and the startup process ends; if Power_det is high level, it means Figure 5 the transistor Q2 in Figure 2 is in the cut-off state, and the voltage at point C is approximately 7.5V. The MOS transistor Q5 is turned on,

[0041] Further, as Figure 5 shown, the voltage holding circuit includes transistor seven, opto-coupler switch, capacitor four, transistor eight, transistor six, resistor sixteen, transistor two, and transistor nine. The base of transistor seven is connected to the main control circuit, the collector of transistor seven is grounded, the emitter of transistor seven is connected to the negative terminal of the emitter of the opto-coupler switch, the positive terminal of the emitter of the opto-coupler switch is connected to the supply voltage of the main control circuit, one receiving terminal of the opto-coupler switch is connected to capacitor four, the other receiving terminal is connected to the base of transistor eight, and the end of capacitor four far from the opto-coupler switch is connected to the emitter of transistor eight. The collector of transistor eight is connected to the base of transistor six, the emitter of transistor six is connected to the external power supply voltage, the collector of transistor six is connected to resistor sixteen, the end of resistor sixteen far from transistor six is connected to the bases of transistor two and transistor nine. The emitter of transistor two is grounded and is also connected to the emitter of transistor nine. The collector of transistor two is connected to the external power supply voltage, and the collector of transistor nine is connected to the external power supply disable detection signal terminal of the main control circuit.

[0042] Specifically, the external power supply disable control signal Power_Cont of the main control chip is connected to the IO pin of the main control chip and configured in the output mode. When the main control chip detects that Power_det is at a high level, the main control chip controls Power_Cont to output a low-level pulse, and the low-level pulse time is about 22 μs. When Power_Cont is at a low level, transistor seven Q7 conducts, the opto-coupler switch V2 turns on, capacitor four C4 discharges, the voltage at point E is greater than the voltage at point D, that is: the voltage at point E is greater than 5V, transistor eight Q8 conducts, causing transistor six Q6 to conduct, point F is approximately equal to the external power supply of 15V, and transistors two Q2 and nine Q9 conduct.

[0043] Due to the existence of resistor sixteen R16, when transistors two Q2 and nine Q9 conduct, the voltage at point F does not drop and remains approximately equal to 15V. When F is approximately equal to 15V, the voltage at point G is 12V at this time, which can keep transistor eight Q8 conducting, that is: keep transistors two Q2 and nine Q9 conducting. The voltage at point C will drop to nearly 0V due to the conduction of transistor two Q2, and MOS transistor five Q5 turns off. Since transistor nine Q9 conducts, the voltage of Power_det will be reduced to nearly 0V. When the main control chip detects that Power_det is at a low level, the device startup process ends.

[0044] Further, it should be noted that, as Figure 5 shown, in this embodiment, the voltage holding circuit has four states, specifically as follows:

[0045] The first state, when the device is connected to an external power supply: When the device is just connected to the external power supply (15V), due to the voltage division of resistor eleven R11 and resistor fifteen R15, the voltage at point D is about 5V. At the same time, capacitor four C4 will be charged. At this time, the voltage at point E is about equal to 0V. When the device is just connected to the external power supply (15V), the power supply chip does not work and there is no 3.3V voltage. The optocoupler switch V2 remains closed, transistor eight Q8 is cut off, and due to the pull-up effect of resistor six R6, transistor six Q6 is also in the cut-off state. The voltage at point F is 0V, transistors two Q2 and nine Q9 are cut off, the voltage at point C remains 7.5V, and Power_det is at a high level of 3.3V when the device is in the operating state.

[0046] The second state, when the device disconnects from the external power supply: When the device disconnects from the external power supply, since there is no external power supply (15V), the voltages at points D, E, and F will all become 0V. Transistors two Q2 and nine Q9 are cut off, the voltage at point C is 0V and is not affected by the device state (whether the device is turned on or off, the voltage at point C is 0V), and Power_det is at a high level of 3.3V when the device is in the operating state.

[0047] The third state, when the device is in normal use: Power_det does not output a low-level pulse, the optocoupler switch V2 remains closed, and the states of transistors two Q2, six Q6, and eight Q8 remain unchanged; the state of MOS transistor five Q5 remains unchanged. If Power_det outputs a low-level pulse, the optocoupler switch V2 conducts within the low-level pulse, and the states of transistors Q2, six Q6, and eight Q8 will change, and the state of MOS transistor five Q5 will change.

[0048] The fourth state, when the device is shut down: The 3.3V power supply chip has no output, the optocoupler switch V2 remains closed, and the states of transistors Q2, six Q6, and eight Q8 remain unchanged; the state of MOS transistor five Q5 remains unchanged.

[0049] When the power switch control circuit controls the device to shut down, it first detects whether the button KEY1 is pressed. KEY_POW is connected to the IO pin of the main control chip, and the IO mode is the input mode. The configured function is the power-on / off button detection function; +3.3V is the high-level voltage of the main control chip, which can be designed according to the main control chip.

[0050] Since the voltage of the built-in battery is 8.4V, which is higher than the maximum withstand voltage of the IO pins of the main control chip, the conduction and cut-off of the triode Q4 are controlled by the button KEY1. When the button KEY1 is pressed, the triode Q4 conducts, and KEY_POW is at a low level. The main control chip detects the low level of KEY_POW, indicating that the button is pressed. When the button KEY1 is released, the triode Q4 cuts off, and KEY_POW is at a high level. The main control chip detects the high level of KEY_POW, indicating that the button is not pressed.

[0051] Adding the resistor R4 can control the current when the triode Q4 conducts, reducing power consumption. Using a button to control the conduction and cut-off of the triode can match a wider range of battery voltages.

[0052] When the main control chip detects that KEY_POW is at a low level, the shutdown process is executed. First, the main control chip checks whether Power_det is at a low level. If Power_det is at a high level, the operation of the voltage holding circuit is performed to cut off the MOS tube Q5, eliminating the hidden danger that the device will automatically restart after shutdown. Then, the main control chip completes other necessary pre-shutdown operations. Finally, it drives Power_IO to output a low level. At this time, the MOS tube Q5 is cut off, the button KEY1 is not pressed, the triode Q3 is cut off, the voltages at points A and B are approximately equal to the voltage of the built-in battery (8.4V), the MOS tube Q1 is cut off, the power supply chip is disabled, and stops outputting 3.3V. The main control chip stops working, and the device shuts down.

[0053] It should be noted that the reception and transmission of all control signals of the main control chip in this example are implemented through software program codes, and these software program codes are all prior arts and will not be further elaborated here.

[0054] Embodiment 2

[0055] An embedded device, which includes the power switch control circuit as described in Embodiment 1. In this embodiment, the embedded device can be an outdoor monitor or other devices installed at high places outdoors, and no specific limitation is made in this example.

[0056] The above are only the preferred embodiments of the present utility model, and do not impose any formal or substantial limitations on the present utility model. It should be noted that for those of ordinary skill in the technical field, without departing from the method of the present utility model, several improvements and supplements can still be made, and these improvements and supplements should also be regarded as the protection scope of the present utility model. Those skilled in the art, without departing from the spirit and scope of the present utility model, when making some equivalent changes such as minor modifications, decorations and evolutions by using the technical content disclosed above, are all equivalent embodiments of the present utility model; at the same time, any equivalent changes, modifications and evolutions made to the above embodiments based on the substantial technology of the present utility model still fall within the scope of the technical solution of the present utility model.

Claims

1. A power switch control circuit, characterized in that, It includes an external power supply startup circuit, a key startup circuit, a voltage holding circuit, and a main control circuit. The input end of the external power supply startup circuit is electrically connected to an external power supply. The output end of the external power supply startup circuit is electrically connected to the key startup circuit. The key startup circuit is connected to the main control circuit. The voltage holding circuit is connected to the external power supply startup circuit. The voltage holding circuit is also connected to the main control circuit. The voltage holding circuit is used to control the failure of the external power supply startup circuit.

2. The power switch control circuit according to claim 1, characterized in that, The voltage holding circuit includes transistor seven, opto-coupler switch, capacitor four, transistor eight, transistor six, resistor sixteen, transistor two, and transistor nine. The base of transistor seven is connected to the main control circuit. The collector of transistor seven is grounded. The emitter of transistor seven is connected to the negative electrode of the emitter of the opto-coupler switch. The positive electrode of the emitter of the opto-coupler switch is connected to the supply voltage of the main control circuit. One receiving end of the opto-coupler switch is connected to capacitor four, and the other receiving end is connected to the base of transistor eight. And the end of capacitor four far from the opto-coupler switch is connected to the emitter of transistor eight. The collector of transistor eight is connected to the base of transistor six. The emitter of transistor six is connected to the external power supply voltage. The collector of transistor six is connected to resistor sixteen. The end of resistor sixteen far from transistor six is connected to the bases of transistor two and transistor nine. The emitter of transistor two is grounded, and the emitter of transistor two is also connected to the emitter of transistor nine. The collector of transistor two is connected to the external power supply voltage. The collector of transistor nine is connected to the external power supply disable detection signal terminal of the main control circuit.

3. The power switch control circuit according to claim 1, wherein The external power supply startup circuit includes resistor one, resistor seven, resistor nine, and MOS transistor five. One end of resistor one is connected to the external power supply. The other end of resistor one is connected to resistor seven. The other end of resistor one is also connected to the gate of MOS transistor five. The end of resistor seven far from resistor one is connected to resistor nine. The end of resistor nine far from resistor seven is also connected to the gate of MOS transistor five. The drain of MOS transistor five is connected to the key startup circuit.

4. The power switch control circuit according to claim 1, wherein The key startup circuit includes a key detection circuit. The key detection circuit is used to detect whether the key is pressed.

5. The power switch control circuit according to claim 4, wherein, The key detection circuit includes resistor four, transistor four, key, diode, and resistor three. Resistor four is in series with transistor four. Resistor three is in series with the diode. The collector of transistor four is grounded. After the base of the transistor is connected to the negative electrode of the diode, it is connected to one end of the key. The other end of the key is grounded. The emitter of transistor four is also connected to the key detection signal terminal of the main control circuit.

6. A power switch control circuit according to claim 4, characterized in that, The button start circuit further includes a first MOS transistor, a third triode, an eighth resistor, a second resistor, and a second capacitor. The gate of the first MOS transistor is connected to the collector of the third triode. The drain of the first MOS transistor is connected to the control signal terminal of the power supply chip of the main control circuit. The collector of the third triode is further connected with the second capacitor, and the other end of the second capacitor is grounded. The base of the triode is connected to the control signal terminal of the power supply chip of the main control circuit. The emitter of the triode is connected with the eighth resistor, the second resistor is in parallel with the eighth resistor, and one end of the second resistor is connected to the control signal terminal of the power supply chip of the main control circuit.

7. A power switch control circuit according to claim 1, characterized in that, It further includes an external power supply detection circuit for detecting whether an external power supply is connected.

8. A power switch control circuit according to claim 7, characterized in that, The external power supply detection circuit includes a twenty-third resistor, a twenty-second resistor, a tenth triode, and a twenty-fourth resistor. The twenty-second resistor and the twenty-third resistor are in parallel. One end of the twenty-second resistor is connected to the supply voltage of the main control circuit, and the other end of the twenty-second resistor is connected to the collector of the tenth triode. One end of the twenty-third resistor is connected to the external power supply voltage, and the other end of the twenty-third resistor is connected to the base of the tenth triode. The other end of the twenty-third resistor is further connected to the twenty-fourth resistor, and the emitter of the tenth triode is connected to the other end of the twenty-fourth resistor.

9. A power switch control circuit according to claim 1, wherein, It further includes a main control power supply circuit for supplying power to the main control circuit.

10. An embedded device, characterized in that, The embedded device includes the power switch control circuit according to any one of claims 1-9.

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