CPCI-E display control module

Abstract

The utility model discloses a CPCI-E (Compact Peripheral Component Interconnect-Express) display control module which comprises a CPU (Central Processing Unit), a memory chip, a system starting chip, a display chip, a PCH (Platform Controller Hub) chip, a BMC (Baseboard Management Controller) chip, a 1Gb network chip, an NVME connector, an mSATA (Micro Serial Advanced Technology Attachment) connector and a CPCI-E connector. The CPCI-E display control module mainly provides display processing resources, computing resources and network exchange resources for image processing, comprehensive display processing and the like, and the safety of the CPCI-E display control module is improved through full localization. Besides, functions of signal conversion and control, port expansion and the like can be realized, the structure is extremely compact, and various embedded functions of the CPCI-E can be completed.

Description

Technical Field

[0001] The utility model relates to the field of computer technology, in particular to a CPCI-E display control module with all domestic products. Background Art

[0002] In recent years, with the continuous deepening of globalization, the procurement activities of global computer products and services inevitably face a more open and less secure external environment. The integrated supply chain provides more convenient penetration opportunities for insecure network products and services. Some foreign CPUs have backdoors and other undisclosed instructions. Most of the cyber espionage and cyber sabotage activities targeting critical information infrastructure and confidential data are carried out based on this, posing a serious threat to information security.

[0003] The continuously upgraded huge consumer market and domestic demand potential provide rich application scenarios and huge development space for technological innovation. At the present stage, the key lies in breaking through the "stuck neck" bottlenecks, removing innovation obstacles, and taking the mastery of core technologies and the development of leading-edge and disruptive technologies as the key work for scientific and technological self-reliance and strength.

[0004] The computers used in the key products of key users are mainly based on the embedded core for applications such as high-performance computing, display control, network switching, and data storage. However, the existing embedded computer module products have insufficient data security; the display performance is not strong, which is not conducive to applications in occasions with high requirements for display control; the memory capacity is small and the computing performance is poor, which is not conducive to applications in occasions with high requirements for data computing. And currently, CPCI-E bus products are widely used in various fields and have corresponding standard specifications and application bases. Therefore, it is necessary to design an all-domestic CPCI-E display control module for products with high requirements for data security, display control, and computing performance. Summary of the Invention

[0005] In order to solve the technical problems of weak data security, poor display control function effect, and lack of computing performance in the existing embedded computer module products. The present invention provides a CPCI-E display control module with good security, good display control function effect, and strong computing performance.

[0006] In order to achieve the above technical objectives, the technical solution of the utility model is as follows.

[0007] A CPCI-E display control module includes a CPU unit, a memory chip, a system startup chip, a display chip, a PCH chip, a BMC chip, a 1Gb network chip, an NVME connector, an mSATA connector, and a CPCI-E connector;

[0008] The described CPU unit is respectively communicatively connected to a memory chip, a system startup chip, a display chip, a PCH chip, and a BMC chip;

[0009] The described PCH chip is connected to a CPCI-E connector through a 1Gb network chip to achieve a 1Gb network signal connection;

[0010] The described NVME connector is communicatively connected to the PCH chip;

[0011] The described mSATA connector is communicatively connected to the PCH chip;

[0012] The described CPCI-E connector is respectively communicatively connected to the PCH chip, the display chip, the CPU unit, and the BMC chip.

[0013] For the described CPCI-E display control module, the communication connection lines of the described CPU unit include:

[0014] Connected to the described memory chip through a memory bus;

[0015] Connected to the described system startup chip through an SPI bus;

[0016] Connected to the input port of the described display chip through a 1-lane × 8 PCIe3.0 signal;

[0017] Connected to the input port of the described PCH chip through a 1-lane × 8 PCIe3.0 signal;

[0018] Connected to the described CPCI-E connector through two 2-lane × 8 PCIe3.0 interfaces serving as output ports;

[0019] Connected to the described BMC chip through an I2C bus.

[0020] For the described domestically produced CPCI-E display control module, the described CPU unit is connected to the described CPCI-E connector through two 2-lane × 8 PCIe3.0 interfaces serving as output ports, and the two 2-lane × 8 PCIe3.0 interfaces can also be combined into a 1-lane × 16 PCIe3.0 interface.

[0021] For the described domestically produced CPCI-E display control module, the described CPU unit also outputs a 1-lane RS232 serial port signal and eight GPIO signals to the described CPCI-E connector, and the CPU unit also separately provides a 1-lane serial port signal as an independent serial port interface.

[0022] For the described CPCI-E display control module, the described PCH chip communicates and connects through the following extended interfaces:

[0023] Expand to 2 × 2 PCIE3.0 interfaces. One of the 2 × 2 PCIE3.0 interfaces is further expanded through the 1Gb network chip to 4 × 1Gb network interfaces for connection to the CPCI-E connector; the other 2 × 2 PCIE3.0 interface is connected to the NVME connector;

[0024] Expand to 3 SATA3.0 interfaces. One of the SATA3.0 interfaces is connected to the mSATA connector, and the other 2 SATA3.0 interfaces are connected to the CPCI-E connector;

[0025] Expand to 6 USB2.0 interfaces and 2 USB3.0 interfaces. 4 of the USB2.0 interfaces and 2 of the USB3.0 interfaces are connected to the CPCI-E connector, and the other 2 USB2.0 interfaces are used as independent USB interfaces.

[0026] For the CPCI-E display control module described above, the display chip outputs 2 HDMI display digital signals to the CPCI-E connector and also outputs 1 VGA display analog signal to an independent VGA interface.

[0027] For the CPCI-E display control module described above, the 1Gb network chip outputs 4 1Gb network signals to the CPCI-E connector.

[0028] For the CPCI-E display control module described above, the BMC chip outputs 2 IPMB signals and 8 GPIO signals to the CPCI-E connector.

[0029] For the CPCI-E display control module described above, the chip is a domestic CXDQ3A8AM-WG type integrated device, the PCH chip is a domestic Feiteng X100 type integrated device, the display chip is a domestic Jingjiawei JH920 type integrated device, the 1Gb network chip is a domestic Netcom WX1860AL4 type integrated device, the system startup chip is a domestic GD25Q80CSIG type integrated device, and the BMC chip is a domestic GigaDevice GD32F103RET6.

[0030] For the CPCI-E display control module described above, the CPU unit is a Feiteng D2000 type integrated device.

[0031] The technical effect of the present utility model lies in that the domestically produced CPCI-E display control module proposed by the present utility model has multiple display interfaces, such as HDMI interface and VGA interface, and supports OpenGL 4.0, OpenGLES 3.2, OpenCL 3.0, supports H.264 and H.265 video encoding and decoding, supports video formats such as MPEG4, and maximally supports 2-way 4K@60Hz independent display; it has high-speed data buses, such as PCIE 3.0 interface, 1Gb network interface, SATA 3.0 interface, USB 3.0 interface; multiple high-speed data interfaces are multiplexed, and the interface redundancy function can be realized; it has a BMC system management unit, through which the system management of the board can be realized, and the board can be remotely controlled and managed through the network; the present utility model can provide display processing resources, computing resources and network switching resources for image processing, integrated display processing, etc., and improve its security through domestic production. In addition, functions such as signal conversion and control, port expansion, etc. can be realized, the structure is extremely compact, and various functions of CPCI-E embedding can be completed. And the present utility model is based on domestic production, has powerful display control capabilities, high density, multi-functional interfaces, and standardization, so that the present utility model can be applied to various occasions. Brief Description of the Drawings

[0032] Figure 1 It is the overall structural block diagram of the embodiment of the present utility model. Detailed Embodiment

[0033] The present utility model will be described in detail below in conjunction with the drawings and the detailed embodiment. It should be noted here that the described embodiments are only a part of the embodiments of the present utility model, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present utility model without creative efforts shall fall within the protection scope of the present utility model.

[0034] As Figure 1 shown, the embodiment of the present utility model provides a domestically produced CPCI-E display control module, which includes a CPU unit, a memory chip, a system startup chip, a display chip, a PCH chip, a BMC chip, a 1Gb network chip, an NVME connector, an mSATA connector and a CPCI-E connector. In this embodiment, the above components are all fixed and interconnected through the currently most common PCB board. Specifically, those skilled in the art can select other implementable connection methods according to specific requirements during implementation.

[0035] In this embodiment, the CPU unit is communicatively connected to the memory chip, the system startup chip, the display chip, the PCH chip and the BMC chip respectively;

[0036] Among them, the CPU unit of this embodiment for communication connections with various components includes: a memory chip connected via a memory bus; a system startup chip connected via an SPI bus; an input port of a display chip connected via one ×8 PCIe 3.0 signal; an input port of a PCH chip connected via one ×8 PCIe 3.0 signal; a BMC chip connected via an I2C bus; a CPCI-E connector connected via two ×8 PCIe 3.0 interfaces as output ports, and the two ×8 PCIe 3.0 interfaces here can also be combined into one ×16 PCIe 3.0 interface. Since different data transmission bandwidth requirements are different, the wider the bandwidth, the more data can be transmitted and the faster the speed. It should be clear here that because the ×8 PCIe 3.0 interface has good compatibility, the ×8 PCIe 3.0 interface can also be used as a ×4 PCIe 3.0, ×2 PCIe 3.0, or ×1 PCIe 3.0 interface to better be compatible with chips that only accept various ×4 PCIe 3.0, ×2 PCIe 3.0, or ×1 PCIe 3.0 signals.

[0037] In addition, the CPU unit also outputs one RS232 serial port signal and eight GPIO signals to the CPCI-E connector, and the eight GPIO signals here are used for the control of system peripheral signals. At the same time, the CPU also separately provides one serial port signal as an independent serial port interface, and this serial port interface can be connected to the front panel of the chassis as the front panel interface during specific implementation.

[0038] In this embodiment, the PCH chip realizes a 1Gb network signal connection with the CPCI-E connector via a 1Gb network chip; at the same time, the PCH chip conducts communication connections by expanding the following interfaces: expanding two ×2 PCIe 3.0 interfaces, and one of the ×2 PCIe 3.0 interfaces expands four 1Gb network interfaces via the 1Gb network chip to connect to the CPCI-E connector; the other ×2 PCIe 3.0 interface is connected to the NVME connector. In addition, three SATA 3.0 interfaces are also expanded, one of the SATA 3.0 interfaces is connected to the mSATA connector, and the other two SATA 3.0 interfaces are connected to the CPCI-E connector. In addition, six USB 2.0 interfaces and two USB 3.0 interfaces are also expanded, four of the USB 2.0 interfaces and two of the USB 3.0 interfaces are connected to the CPCI-E connector, and the other two USB 2.0 interfaces are used as independent USB interfaces and can be connected to the front panel of the chassis as the front panel interface during specific implementation.

[0039] The display chip in this embodiment outputs 2 channels of HDMI display digital signals to the CPCI-E connector, and at the same time outputs 1 channel of VGA display analog signal to an independent VGA interface. These interfaces are used for the system display interface output to externally connect a VGA or HDMI monitor.

[0040] The 1Gb network chip in this embodiment outputs 4 channels of 1Gb network signals to the CPCI-E connector, which is used to form a high-speed transmission network for system data and a transmission network for system control signals. The two networks can be used as independent networks respectively, thus increasing the efficiency of system control and data transmission.

[0041] The BMC chip in this embodiment outputs 2 channels of IPMB signals and 8 channels of GPIO signals to the CPCI-E connector. Among them, the 2 channels of IPMB signals are used for detecting and collecting information such as internal temperature and voltage and reporting to the outside, and the 8 channels of GPIO signals are used for controlling system peripheral signals.

[0042] All components in this embodiment are domestically produced products. Among them, the CPU as the core chip is the Feiteng D2000 integrated device, the memory particle chip is the CXDQ3A8AM-WG integrated device, the PCH chip is the Feiteng X100 integrated device, the display chip is the Jingjiawei JH920 integrated device, the 1Gb network chip is the Netcom WX1860AL4 integrated device, and the BMC chip is the GD32F103RET6 of GigaDevice Semiconductor Inc.

[0043] The system takes the Feiteng D2000 CPU as the center and starts its operation through the system startup chip GD25LQ128ESIG. The Feiteng D2000 CPU comes with a dual-channel DDR4 memory controller and a board-mounted 32GB memory with a maximum speed of 3200MHz.

[0044] Feiteng D2000 CPU expands 32 PCIE3.0 channels, of which 1 x8 PCIE3.0 signal from Feiteng D2000 CPU outputs 1 VGA display analog signal and 2 HDMI display digital signals through display chip Jingjiawei JH920. 1 x8 PCIE3.0 signal from Feiteng D2000 CPU expands 6 USB2.0 signals, 2 USB3.0 signals, 3 SATA3.0 signals and 2 x2 PCIE3.0 signals through Feiteng X100 PCH chip, of which 1 x2 PCIE3.0 signal is connected to the NVME connector on the board, and 1 x2 PCIE3.0 signal expands 4 1Gb network signals through Netcom WX1860AL41Gb network chip. GigaDevice's GD32F103RET6 BMC chip is interconnected with the CPU through the I2C bus, and outputs 2 IPMB signals and 8 GPIO signals. The CPU's built-in serial port and GPIO are output to the CPCI-E connector.

[0045] The fully domestic CPCI-E display control module provided in this embodiment uses the Feiteng D2000 CPU, which is a high-performance general-purpose 64-bit CPU independently developed by Feiteng Information Technology Co., Ltd. It is the latest series of processors based on the ARMv8 architecture and integrates 8 FTC663 cores. It is mainly aimed at application fields such as notebooks, servers and high-end embedded systems. The Jingjiawei JH920 graphics card is a third-generation high-performance graphics processor chip independently developed by Jingjiawei Electronics Co., Ltd. It is mainly used in mid-to-high-end graphics display, general computing, and embedded fields to meet the display computing needs of geographic information systems, image matching, signal processing, display control, etc.

[0046] The domestically produced CPCI-E display control module of this embodiment has multiple display interfaces, such as HDMI interface, VGA interface, and supports OpenGL4.0, OpenGLES3.2, OpenCL3.0, supports H.264, H.265 video codec, supports video formats such as MPEG4, and supports up to 2-way 4k@60Hz independent display. It has a high-speed data bus, such as PCIE3.0 interface, 1Gb network interface, SATA3.0 interface, and USB3.0 interface. A variety of high-speed data interfaces are multi-channel, and interface redundancy function can be realized. It has a BMC system management unit, through which the system management of the board can be realized, and the board can be remotely controlled and managed through the network. National production, powerful display control capabilities, high density, multi-function interface, standardization, so that the board can be applied to a variety of occasions.

[0047] The above are only the preferred embodiments of the present utility model and are not intended to limit the present utility model. For those skilled in the art, various modifications and variations can be made to the present utility model. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. A CPCI-E display control module, characterized in that, It includes a CPU unit, a memory chip, a system startup chip, a display chip, a PCH chip, a BMC chip, a 1Gb network chip, an NVME connector, an mSATA connector, and a CPCI-E connector; The CPU unit is communicatively connected to the memory chip, the system startup chip, the display chip, the PCH chip, and the BMC chip respectively; The PCH chip realizes a 1Gb network signal connection with the CPCI-E connector through the 1Gb network chip; The NVME connector is communicatively connected to the PCH chip; The mSATA connector is communicatively connected to the PCH chip; The CPCI-E connector is communicatively connected to the PCH chip, the display chip, the CPU unit, and the BMC chip respectively.

2. The CPCI-E display control module according to claim 1, wherein The communication connection lines of the CPU unit include: Connected to the memory chip through a memory bus; Connected to the system startup chip through an SPI bus; Connected to the input port of the display chip through a 1-lane × 8 PCIE3.0 signal; Connected to the input port of the PCH chip through a 1-lane × 8 PCIE3.0 signal; Connected to the CPCI-E connector through a 2-lane × 8 PCIE3.0 interface as an output port; Connected to the BMC chip through an I2C bus.

3. The CPCI-E display control module according to claim 2, characterized in that The CPU unit is connected to the CPCI-E connector through a 2-lane × 8 PCIE3.0 interface as an output port, where the 2-lane × 8 PCIE3.0 interface can also be combined into a 1-lane × 16 PCIE3.0 interface.

4. The CPCI-E display control module according to claim 2, wherein, The CPU unit also outputs a 1-lane RS232 serial signal and 8-lane GPIO signals to the CPCI-E connector, and the CPU unit also provides a 1-lane serial signal as an independent serial interface.

5. A CPCI-E display control module according to claim 1, wherein The PCH chip communicates and connects by expanding the following interfaces: Expands a 2-lane × 2 PCIE3.0 interface, where one 1-lane × 2 PCIE3.0 interface is further expanded through the 1Gb network chip to 4 1Gb network interfaces to connect to the CPCI-E connector; the other 1-lane × 2 PCIE3.0 is connected to the NVME connector; Expands 3 SATA3.0 interfaces, where one SATA3.0 interface is connected to the mSATA connector, and the other 2 SATA3.0 interfaces are connected to the CPCI-E connector; Expands 6 USB2.0 interfaces and 2 USB3.0 interfaces, where 4 USB2.0 interfaces and 2 USB3.0 interfaces are connected to the CPCI-E connector, and the other 2 USB2.0 interfaces are used as independent USB interfaces.

6. A CPCI-E display control module according to claim 1, characterized in that, The display chip outputs 2 HDMI display digital signals to the CPCI-E connector, and at the same time outputs 1 VGA display analog signal to an independent VGA interface.

7. A CPCI-E display control module according to claim 1, characterized in that The 1Gb network chip outputs 4 1Gb network signals to the CPCI-E connector.

8. A CPCI-E display control module according to claim 1, characterized in that, The described BMC chip outputs two IPMB signals and eight GPIO signals to the CPCI-E connector.

9. A CPCI-E display control module according to any one of claims 1-8, characterized in that, The described chip is a domestic integrated device of the CXDQ3A8AM-WG type, the PCH chip is a domestic integrated device of the Feiteng X100 type, the display chip is a domestic integrated device of the Jingjiawei JH920 type, the 1Gb network chip is a domestic integrated device of the Netcom WX1860AL4 type, the system startup chip is a domestic integrated device of the GD25Q80CSIG type, and the BMC chip is a domestic GD32F103RET6 of GigaDevice Semiconductor Inc.

10. A CPCI-E display control module according to any one of claims 1-8, characterized in that, The described CPU unit is an integrated device of the Feiteng D2000 type.

Images