Transmission state indicating circuit, embedded memory, mainboard and computer equipment

Abstract

The utility model provides a transmission state indicating circuit, an embedded memory, a mainboard and computer equipment. The circuit comprises a switch module and a reminding module, the switch module comprises a switch driving end, a switch input end and a switch output end; the reminding module comprises a first end and a second end; a switch driving end of the switch module is used for receiving a data transmission state signal of the embedded memory, a switch input end of the switch module is connected with a first end of the reminding module, and a switch output end of the switch module is grounded; the second end of the reminding module is connected with the working power supply. According to the utility model, a prompt can be given out when data interaction occurs in the embedded memory.

Description

Technical Field

[0001] The utility model relates to the technical field of transmission state indication, and particularly relates to a transmission state indication circuit, an embedded memory, a main board and a computer device. Background Art

[0002] The embedded memory has the characteristics of large capacity, high reliability, low power consumption, strong scalability, etc., and is thus widely used in various embedded systems, such as mobile devices like mobile phones and tablets. However, since the relevant circuit of the embedded memory lacks a circuit structure for data interaction reminder, when the embedded memory conducts data interaction, it is unable to remind the user, and the user cannot accurately know whether the embedded memory is in the state of data interaction. To sum up, the relevant circuit of the embedded memory has the problem that it cannot indicate whether the embedded memory is in the state of data interaction. Summary of the Utility Model

[0003] The purpose of the utility model is to overcome the defects and deficiencies in the prior art, and provide a transmission state indication circuit, an embedded memory, a main board and a computer device, which can give a reminder when data interaction occurs in the embedded memory.

[0004] An embodiment of the utility model provides a transmission state indication circuit, which is applied to an embedded memory. The circuit includes: a switch module and a reminder module; the switch module includes a switch driving end, a switch input end and a switch output end; the reminder module includes a first end and a second end;

[0005] The switch driving end of the switch module is used to receive the data transmission state signal of the embedded memory. The switch input end of the switch module is connected to the first end of the reminder module, and the switch output end of the switch module is grounded; the second end of the reminder module is connected to the working power supply.

[0006] A second embodiment of the present application provides an embedded memory, including: a transmission state signal pin, and the transmission state signal pin is connected to the switch driving end of the switch module of the transmission state indication circuit as described above, and the transmission state signal pin is used to output a data transmission state signal.

[0007] A third embodiment of the present application provides a main board, including the embedded memory as described above.

[0008] A fourth embodiment of the present application provides a computer device, including the main board as described above.

[0009] Compared with the related art, the switch driving end of the switch module of the present application is used for the data transmission status signal of the embedded memory. The switch input end of the switch module is connected to the first end of the reminder module, and the switch output end of the switch module is grounded; the second end of the reminder module is connected to the working power supply. When data interaction occurs in the embedded memory, the data transmission status signal sent by the embedded memory through the pin is received by the switch driving end of the switch module, causing the switch module to conduct. At this time, the first end of the reminder module is grounded through the switch module, and the working power supply is grounded through the reminder module, that is, the loop where the reminder module is located is conducted, causing the reminder module to enter the working state to send a reminder, achieving the technical effect of sending a reminder when data interaction occurs in the embedded memory.

[0010] In order to better understand the present invention, the specific embodiments of the present invention will be described below in conjunction with the accompanying drawings. Brief Description of the Drawings

[0011] Figure 1 It is a schematic diagram of the module connection of the transmission status indication circuit according to an embodiment of the present invention.

[0012] Figure 2 It is a circuit diagram of the transmission status indication circuit according to an embodiment of the present invention.

[0013] Figure 3 It is a schematic diagram of the module of the embedded memory according to an embodiment of the present invention.

[0014] Figure 4 It is a schematic diagram of the module of the main board according to an embodiment of the present invention.

[0015] Figure 5 It is a schematic diagram of the module of the computer device according to an embodiment of the present invention.

[0016] 100. Transmission status indication circuit; 110. Switch module; 111. First switch unit; Q1. First switch tube; R3. Current limiting resistor; R1. First load resistor; 113. Second switch unit; Q2. Second switch tube; R2. Second load resistor; 130. Reminder module; D1. Light emitting diode; R4. Pull-up resistor; 10. Embedded memory; 1. Main board. Detailed Embodiments

[0017] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.

[0018] An embedded memory (eMMC) refers to a memory composed of an embedded storage solution, with an MMC (Multimedia Card) interface, a flash memory device, and a main controller. The embedded memory has characteristics such as large capacity, high reliability, low power consumption, and strong scalability, so it is widely used in various embedded systems, such as mobile devices like mobile phones and tablets.

[0019] However, in the prior art, the related circuits of the embedded memory lack a circuit structure for data interaction reminder. Therefore, when the embedded memory performs data interaction, it cannot play a role in reminding the user.

[0020] This application analyzed the embedded memory and found that the embedded memory includes a signal pin CMD. When the embedded memory is not performing data transmission, the signal pin CMD outputs an electrical signal of 1.8V. When the embedded memory performs data transmission, the signal pin CMD outputs a low-level electrical signal. Specifically, when the embedded memory performs data transmission, the data is transmitted multiple times, for example, the data is divided into multiple parts for transmission one by one. Before each transmission, the signal pin CMD of the embedded memory will output a low-level electrical signal. Therefore, when the embedded memory performs data transmission, the signal pin CMD of the embedded memory will output low-level electrical signals at a high frequency.

[0021] Therefore, this application discloses a technical solution for indicating the transmission state of the embedded memory based on the signal pin CMD of the embedded memory. Among them, the technical solution can be implemented in the form of a circuit structure. For example, when data interaction occurs in the embedded memory, the signal pin CMD of the embedded memory will output a data transmission state signal at a high frequency. This application can respond to the data transmission state signal through the circuit structure of circuit modules such as a switch module and a reminder module to issue a reminder, so as to achieve the technical effect of issuing a reminder when data interaction occurs in the embedded memory.

[0022] Please refer to Figure 1 , which is a schematic diagram of a transmission state indication circuit 100 according to an embodiment of the present utility model, including: a switch module 110 and a reminder module 130; the switch module 110 includes a switch driving end, a switch input end, and a switch output end; the reminder module 130 includes a first end and a second end.

[0023] The switch driving end of the switch module 110 is used to receive the data transmission state signal of the embedded memory. The switch input end of the switch module 110 is connected to the first end of the reminder module 130. The switch output end of the switch module 110 is grounded; the second end of the reminder module 130 is connected to the working power supply.

[0024] The working principle of the transmission status indication circuit 100 in this embodiment is as follows:

[0025] When there is no data interaction in the embedded memory, the embedded memory outputs an electrical signal of 1.8V through the signal pin. At this time, the switch module 110 is in the off state, and the loop where the reminder module 130 is located is also in the off state, so the reminder module 130 does not work. When there is data interaction in the embedded memory, the embedded memory sends a low-level data transmission status signal through the signal pin. The switch driving end of the switch module 110 receives the data transmission status signal, making the switch module 110 conduct. At this time, the first end of the reminder module 130 is grounded via the switch module 110, and the working power supply is grounded via the reminder module 130, that is, the loop where the reminder module 130 is located is conducting, and the reminder module 130 enters the working state to issue a reminder.

[0026] Among them, the switch module 110 can select a switch module 110 with an isolation effect, such as a switch module 110 that realizes switch control through two or more switch units, a switch module 110 that realizes switch control through electromagnetic induction, etc., to prevent the signal pin of the embedded memory from being affected by the power supply voltage of the transmission status indication circuit 100 and protect the safety of the embedded memory.

[0027] The reminder module 130 can adopt a reminder module 130 with fast response and low delay, such as an optical reminder module 130 or a sound reminder module 130, and can achieve an accurate reminder effect through optical signals or sound signals when the embedded memory is transmitting data.

[0028] Compared with the related art, the switch driving end of the switch module 110 in this application is used for the data transmission status signal of the embedded memory. The switch input end of the switch module 110 is connected to the first end of the reminder module 130, and the switch output end of the switch module 110 is grounded; the second end of the reminder module 130 is connected to the working power supply. When there is data interaction in the embedded memory, the embedded memory sends a data transmission status signal through the pin. The switch driving end of the switch module 110 receives the data transmission status signal, making the switch module 110 conduct. At this time, the first end of the reminder module 130 is grounded via the switch module 110, and the working power supply is grounded via the reminder module 130, that is, the loop where the reminder module 130 is located is conducting, and the reminder module 130 enters the working state to issue a reminder, achieving the technical effect of issuing a reminder when there is data interaction in the embedded memory.

[0029] Please refer to Figure 2, in a feasible embodiment, the switch module 110 includes a first switch unit 111 and a second switch unit 113; the first switch unit 111 includes a first driving end, a first connection end, and a second connection end; the second switch unit 113 includes a second driving end, a third connection end, and a fourth connection end.

[0030] The first driving end of the first switch unit 111 is the switch driving end of the switch module 110. The first connection end of the first switch unit 111 is connected to the power supply via a first load resistor R1, and the second connection end of the first switch unit 111 is grounded.

[0031] The second driving end of the second switch unit 113 is connected to the first connection end of the first switch unit 111. The third connection end of the second switch unit 113 is the switch input end of the switch module 110, and the third connection end of the second switch unit 113 is connected to the power supply via a second load resistor R2; the fourth connection end of the second switch unit 113 is the switch output end of the switch module 110.

[0032] Wherein, both the first switch unit 111 and the second switch unit 113 can include a switch chip or a switching tube; when the first switch unit 111 and the second switch unit 113 include a switching tube, the user can also connect any number of connection ends of the three connection ends of the switching tube to other modules or components in the circuit via a resistor.

[0033] The working principles of the first switch unit 111 and the second switch unit 113 in this embodiment are as follows:

[0034] Since the first connection end of the first switch unit 111 is connected to the power supply via the first load resistor R1, when data interaction occurs in the embedded memory and the data transmission status signal sent by the embedded memory through the signal pin is at a low level, the first driving end of the first switch unit 111 is in a low-level state, and the first connection end of the first switch unit 111 is in a high-level state. At this time, the first switch unit 111 is turned on, and the second driving end of the second switch unit 113 is grounded via the first switch unit 111. The second driving end of the second switch unit 113 is in a low-level state, and the third connection end of the second switch unit 113 is in a high-level state. At this time, the second switch unit 113 is turned on, so that the circuit where the reminder module 130 is located forms a loop, and the electrical signal output by the working power supply flows to the ground successively through the reminder module 130 and the second switch unit 113, that is, the reminder module 130 enters the working state to issue a reminder.

[0035] Wherein, the power supply in this embodiment can be the same power supply as the working power supply connected to the reminder module 130.

[0036] In this embodiment, the first switch unit 111 and the second switch unit 113 can be used to drive the reminder module 130 to issue a reminder when data interaction occurs in the embedded memory. Moreover, by using the first switch unit 111 and the second switch unit 113 to implement switch control, the isolation effect of the switch module 110 can be enhanced, preventing the signal pins of the embedded memory from being affected by the power supply voltage of the transmission status indication circuit 100, so as to protect the security of the embedded memory.

[0037] In a feasible embodiment, the first switch unit 111 includes a first switch transistor Q1 and a current limiting resistor R3; the first switch transistor Q1 includes a first transistor drive end, a first transistor connection end, and a second transistor connection end.

[0038] The first transistor drive end of the first switch transistor Q1 is connected to the current limiting resistor R3 to serve as the first drive end of the first switch unit 111; the first transistor connection end of the first switch transistor Q1 is the first connection end of the first switch unit 111, and the second transistor connection end of the first switch transistor Q1 is the second connection end of the first switch unit 111.

[0039] Wherein, the first transistor connection end of the first switch transistor Q1 is the drain of the field effect transistor, the second transistor connection end of the first switch transistor Q1 is the source of the field effect transistor, and the first transistor drive end of the first switch transistor Q1 is the gate of the field effect transistor; or, the first transistor connection end of the first switch transistor Q1 is the collector of the triode, the second transistor connection end of the first switch transistor Q1 is the emitter of the triode, and the first transistor drive end of the first switch transistor Q1 is the base of the triode.

[0040] Optionally, the first switch transistor Q1 can be an Nmos transistor or an NPN transistor.

[0041] In this embodiment, the switching function of the first switch unit 111 can be realized by the first switch transistor Q1, and the current limiting resistor R3 can play a current limiting role to reduce the current flowing to the first transistor drive end of the first switch transistor Q1, thus playing a role in protecting the first switch transistor Q1.

[0042] In a feasible embodiment, the second switch unit 113 includes a second switch transistor Q2; the second switch transistor Q2 includes a second transistor drive end, a third transistor connection end, and a fourth transistor connection end.

[0043] The second transistor drive end of the second switch transistor Q2 is the second drive end of the second switch unit 113, the third transistor connection end of the second switch transistor Q2 is the third connection end of the second switch unit 113, and the fourth transistor connection end of the second switch transistor Q2 is the fourth connection end of the second switch unit 113.

[0044] Among them, the third tube connection end of the second switching tube Q2 is the drain of the field effect transistor, the fourth tube connection end of the second switching tube Q2 is the source of the field effect transistor, and the second tube driving end of the second switching tube Q2 is the gate of the field effect transistor; or, the third tube connection end of the second switching tube Q2 is the collector of the triode, the fourth tube connection end of the second switching tube Q2 is the emitter of the triode, and the second tube driving end of the second switching tube Q2 is the base of the triode.

[0045] Optionally, the second switching tube Q2 can be an Nmos transistor or an NPN transistor.

[0046] In this embodiment, the switching function of the second switching unit 113 can be realized by the second switching tube Q2.

[0047] In a feasible embodiment, the reminder module 130 includes a light emitting diode D1. The anode of the light emitting diode D1 is the second end of the reminder module, and the cathode of the light emitting diode D1 is the first end of the reminder module.

[0048] In this embodiment, by using the characteristic that the light emitting diode D1 emits light when powered on, when data interaction occurs in the embedded memory, the data transmission status of the embedded memory can be indicated by an optical signal.

[0049] In a feasible embodiment, the anode of the light emitting diode D1 is connected to the working power supply through a pull-up resistor R4.

[0050] In this embodiment, by connecting the pull-up resistor R4 to the working power supply, the anode of the light emitting diode D1 can be in a high level state. When the switching module 110 is turned on, the light emitting diode D1 can quickly emit an optical signal, and can play a current limiting role when the switching module 110 is turned on to protect the light emitting diode D1.

[0051] Please refer to Figure 3 , the second embodiment of the present application provides an embedded memory 10, including: a transmission status signal pin, the transmission status signal pin is connected to the switching drive end of the switching module 110 of the transmission status indication circuit 100 as described above, and the transmission status signal pin is used to output a data transmission status signal.

[0052] It should be noted that the embedded memory 10 provided in the second embodiment of the present application and the transmission status indication circuit 100 of the first embodiment of the present application belong to the same concept. The implementation process is detailed in the first embodiment and will not be repeated here.

[0053] Please refer to Figure 4 , the third embodiment of the present application provides a main board 1, including the embedded memory 10 as described above.

[0054] It should be noted that the main board 1 provided in the third embodiment of the present application and the transmission status indication circuit 100 of the first embodiment of the present application belong to the same concept. For the implementation process, please refer to the first embodiment, which will not be elaborated here.

[0055] Please refer to Figure 5 , a computer device is provided in the fourth embodiment of the present application, which includes the main board 1 as described above.

[0056] It should be noted that the computer device provided in the fourth embodiment of the present application and the transmission status indication circuit 100 of the first embodiment of the present application belong to the same concept. For the implementation process, please refer to the first embodiment, which will not be elaborated here.

[0057] Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A transmission status indication circuit, applied to an embedded memory, characterized in that The circuit includes: a switch module and a reminder module; the switch module includes a switch driving end, a switch input end, and a switch output end; the reminder module includes a first end and a second end; The switch driving end of the switch module is used to receive the data transmission status signal of the embedded memory. The switch input end of the switch module is connected to the first end of the reminder module, and the switch output end of the switch module is grounded; the second end of the reminder module is connected to the working power supply.

2. The transmission state indicating circuit according to claim 1, wherein: The switch module includes a first switch unit and a second switch unit; the first switch unit includes a first driving end, a first connection end, and a second connection end; the second switch unit includes a second driving end, a third connection end, and a fourth connection end; The first driving end of the first switch unit is the switch driving end of the switch module. The first connection end of the first switch unit is connected to the power supply via a first load resistor, and the second connection end of the first switch unit is grounded; The second driving end of the second switch unit is connected to the first connection end of the first switch unit. The third connection end of the second switch unit is the switch input end of the switch module, and the third connection end of the second switch unit is connected to the power supply via a second load resistor; the fourth connection end of the second switch unit is the switch output end of the switch module.

3. The transmission status indication circuit according to claim 2, wherein: The first switch unit includes a first switch tube and a current limiting resistor; the first switch tube includes a first tube driving end, a first tube connection end, and a second tube connection end; The first tube driving end of the first switch tube is connected to the current limiting resistor to serve as the first driving end of the first switch unit; the first tube connection end of the first switch tube is the first connection end of the first switch unit, and the second tube connection end of the first switch tube is the second connection end of the first switch unit.

4. The transmission state indication circuit according to claim 2, wherein: The second switch unit includes a second switch tube; the second switch tube includes a second tube driving end, a third tube connection end, and a fourth tube connection end; The second tube driving end of the second switch tube is the second driving end of the second switch unit, the third tube connection end of the second switch tube is the third connection end of the second switch unit, and the fourth tube connection end of the second switch tube is the fourth connection end of the second switch unit.

5. The transmission status indication circuit according to claim 3, characterized in that: The first tube connection end of the first switch tube is the drain of the field effect transistor, the second tube connection end of the first switch tube is the source of the field effect transistor, and the first tube driving end of the first switch tube is the gate of the field effect transistor; Or, The first tube connection end of the first switch tube is the collector of the triode, the second tube connection end of the first switch tube is the emitter of the triode, and the first tube driving end of the first switch tube is the base of the triode.

6. The transmission state indication circuit according to claim 4, wherein: The third tube connection end of the second switch tube is the drain of the field effect transistor, the fourth tube connection end of the second switch tube is the source of the field effect transistor, and the second tube driving end of the second switch tube is the gate of the field effect transistor; or, the third tube connection end of the second switch tube is the collector of the triode, the fourth tube connection end of the second switch tube is the emitter of the triode, and the second tube driving end of the second switch tube is the base of the triode.

7. The transmission state indication circuit according to any one of claims 1-6, characterized in that: The reminder module includes a light-emitting diode. The anode of the light-emitting diode is the second end of the reminder module, and the cathode of the light-emitting diode is the first end of the reminder module.

8. The transmission status indication circuit according to claim 7, wherein: The anode of the light-emitting diode is connected to the working power supply through a pull-up resistor.

9. An embedded memory, characterized in that, Comprising: A transmission status signal pin, which is connected to the switch driving end of the switch module of the transmission status indication circuit according to any one of claims 1-8, and the transmission status signal pin is used to output a data transmission status signal.

10. A main board, characterized in that: Comprising the embedded memory according to claim 9.

11. A computer device, characterized in that: Comprising the main board according to claim 10.

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