Multipath pulse light source coding control panel

Through the acquisition, voltage transformation and output module of the multi-channel pulsed light source encoding control board, the problem of distortion of the light source signal during transmission is solved, and the accurate and stable signal transmission and communication adaptation between devices are achieved.

CN223182365UActive Publication Date: 2025-08-01NANTONG SICONT INTELLIGENT EQUIP CO LTD
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Patent Information

Application Number
CN202422039765.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-22
Publication Date
2025-08-01
Estimated Expiration
2034-08-22

AI Technical Summary

Technical Problem

In the prior art, light source signals are prone to distortion during reading from the device to the host computer software, resulting in a decrease in the accuracy of PWM signal transmission.

Method used

The multi-channel pulse light source encoding control board is adopted, including the main control circuit, acquisition module, transformer module and output module. The PWM signal is obtained through the acquisition module, the transformer module performs level conversion, and is sent to the upper computer through the output module to ensure the accurate transmission of the signal.

Benefits of technology

It improves the accuracy and stability of light source signal transmission, reduces signal distortion rate, enhances anti-interference performance, and ensures communication accuracy between different devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to a multi-path pulse light source coding control panel, which relates to the technical field of light source adjustment, and comprises a main control circuit, the main control circuit comprises a main control panel, the main control panel is an STM32F103C8T6 control chip, the main control circuit further comprises a first input port, a second input port, a third input port and a fourth input port, the first input port, the second input port, the third input port and the fourth input port are jointly connected with an acquisition module, the acquisition module is used for acquiring a PWM signal, the acquisition module is connected with a voltage transformation module, the voltage transformation module is used for converting a PWM signal level, an output end of the voltage transformation module is connected with an input interface of the main control board, and an output end of the main control board is connected with an output end of the main control board. An output interface of the main control board is connected with an output module, and the output module is used for outputting PWM signals to an upper computer. The utility model has the effect of improving the light source signal transmission stability.
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Description

Technical Field

[0001] The utility model relates to the technical field of light source regulation, in particular to a multi-channel pulse light source coding control board. Background Art

[0002] In the field of semiconductor production, the clarity of the camera's image capture is ensured by changing the light source, so as to ensure the accurate identification of products.

[0003] Currently, the adopted light source regulation method is that the operator observes the clarity of the product imaging with the naked eye while changing the light source brightness value of the device. At the same time, the controller reads the light source signal and sends the PWN signal to the host computer software, and the host computer software calculates the light source brightness data that can make the device camera image clearly. However, during the process of reading the light source signal and sending it to the host computer software, the PWM signal is prone to distortion, reducing the accuracy of the PWM signal transmission. Content of the Utility Model

[0004] In order to improve the transmission stability of the light source signal, this application provides a multi-channel pulse light source coding control board.

[0005] The multi-channel pulse light source coding control board provided by this application adopts the following technical solutions:

[0006] A multi-channel pulse light source coding control board includes a main control circuit. The main control circuit includes a main control board, and the main control board is an STM32F103C8T6 control chip. It also includes a first input port, a second input port, a third input port, and a fourth input port. A collection module is commonly connected to the first input port, the second input port, the third input port, and the fourth input port. The collection module is used to obtain the PWM signal. A voltage conversion module is connected to the collection module. The voltage conversion module is used to convert the PWM signal level. The output end of the voltage conversion module is connected to the input interface of the main control board. An output module is connected to the output interface of the main control board. The output module is used to output the PWM signal to the host computer.

[0007] Preferably, the voltage conversion module includes a first voltage conversion circuit, a second voltage conversion circuit, a third voltage conversion circuit, a fourth voltage conversion circuit, and a fifth voltage conversion circuit. The first voltage conversion circuit is electrically connected between the first input port and the main control board. The second voltage conversion circuit is electrically connected between the second input port and the main control board. The third voltage conversion circuit is electrically connected between the third input port and the main control board. The fourth voltage conversion circuit is electrically connected between the fourth input port and the main control board. The fifth voltage conversion circuit is electrically connected between the collection module and the main control board.

[0008] Preferably, the acquisition module includes a first acquisition diode, a second acquisition diode, a third acquisition diode, and a fourth acquisition diode. The anode of the first acquisition diode is electrically connected to the first input port, the anode of the second acquisition diode is electrically connected to the second input port, the anode of the third acquisition diode is electrically connected to the third input port, and the anode of the fourth acquisition diode is electrically connected to the fourth input port. The cathodes of the first acquisition diode, the second acquisition diode, the third acquisition diode, and the fourth acquisition diode are commonly electrically connected to the fifth voltage transformation circuit.

[0009] Preferably, the fifth voltage transformation circuit includes a sixth MOS transistor, a sixth current-limiting resistor, and a fifteenth capacitor. The cathodes of the first acquisition diode, the second acquisition diode, the third acquisition diode, and the fourth acquisition diode are commonly electrically connected to the drain of the sixth MOS transistor. The gate of the sixth MOS transistor and one end of the fifteenth capacitor are commonly pulled up to the signal DR terminal. The source of the sixth MOS transistor and one end of the sixth current-limiting resistor are commonly electrically connected to pin 10 of the main control board. The other end of the sixth current-limiting resistor and the other end of the fifteenth capacitor are commonly grounded.

[0010] Preferably, the fourth voltage transformation circuit includes a fifth MOS transistor, a fifth current-limiting resistor, and a fourteenth capacitor. The fourth input port is electrically connected to the drain of the fifth MOS transistor. The gate of the fifth MOS transistor and one end of the fourteenth capacitor are commonly pulled up to the signal DR terminal. The source of the fifth MOS transistor and one end of the fifth current-limiting resistor are commonly electrically connected to pin 42 of the main control board. The other end of the fifth current-limiting resistor and the other end of the fourteenth capacitor are commonly grounded.

[0011] Preferably, the third voltage transformation circuit includes a fourth MOS transistor, a fourth current-limiting resistor, and a thirteenth capacitor. The third input port is electrically connected to the drain of the fourth MOS transistor. The gate of the fourth MOS transistor and one end of the thirteenth capacitor are commonly pulled up to the signal DR terminal. The source of the fourth MOS transistor and one end of the fourth current-limiting resistor are commonly electrically connected to pin 29 of the main control board. The other end of the fourth current-limiting resistor and the other end of the thirteenth capacitor are commonly grounded.

[0012] Preferably, the second voltage transformation circuit includes a third MOS transistor, a third current-limiting resistor, and a twelfth capacitor. The second input port is electrically connected to the drain of the third MOS transistor. The gate of the third MOS transistor and one end of the twelfth capacitor are commonly pulled up to the signal DR terminal. The source of the third MOS transistor and one end of the third current-limiting resistor are commonly electrically connected to pin 16 of the main control board. The other end of the third current-limiting resistor and the other end of the twelfth capacitor are commonly grounded.

[0013] Preferably, the first voltage transformation circuit includes a first current-limiting resistor, a first MOS transistor, a second MOS transistor, a voltage-regulating Schottky diode, a second current-limiting resistor, and an eleventh capacitor. One end of the first current-limiting resistor is connected to the power supply of 12V, the other end of the first current-limiting resistor is electrically connected to the drain of the first MOS transistor, the source of the first MOS transistor is electrically connected to the cathode of the voltage-regulating Schottky diode, the first input port is electrically connected to the drain of the second MOS transistor, the source of the first MOS transistor and one end of the second current-limiting resistor are commonly electrically connected to pin 11 of the main control board, the drain of the first MOS transistor, the gate of the first MOS transistor, the gate of the second MOS transistor, and one end of the eleventh capacitor commonly pull up the signal DR terminal, and the anode of the voltage-regulating Schottky diode, the other end of the eleventh capacitor, and the other end of the second current-limiting resistor are commonly grounded.

[0014] Preferably, the output module includes an output chip and a plurality of output circuits. The output circuits are connected between the output chip and the main control board, and pins 11, 12, 13, 14, and 15 of the output chip are all grounded.

[0015] Preferably, the output circuit includes a left resistor, a right resistor, an upper resistor, a middle resistor, a lower resistor, an upper MOS transistor, and a lower MOS transistor. One end of the left resistor and one end of the right resistor are both electrically connected to the power supply of 12V, the other end of the left resistor, one end of the middle resistor, and the gate of the upper MOS transistor are electrically connected, the other end of the right resistor is electrically connected to the drain of the upper MOS transistor, the source of the upper MOS transistor is connected to the output chip, the other end of the middle resistor is electrically connected to the drain of the lower MOS transistor, the source of the lower MOS transistor and one end of the lower resistor are both grounded, the gate of the lower MOS transistor, the other end of the lower resistor, and one end of the upper resistor are electrically connected, and the other end of the upper resistor is electrically connected to pin 25 of the main control board.

[0016] In summary, the present application includes at least one of the following beneficial technical effects:

[0017] 1. The acquisition module acquires the PWM signal for the operator to adjust the light source. The acquired PWM signal is subjected to level conversion by the voltage transformation module, and the PWM signal after level conversion is sent to the host computer through the output module. The acquisition module combines multiple PWM signals and transmits them to the voltage transformation module, making it difficult for the PWM signal to be lost. The voltage transformation module performs level conversion on the PWM signal, and the output module matches the levels of the input signal and the output signal of the PWM signal. At the same time, the voltage transformation module and the output module shorten the rising edge time and the falling edge time of the PWM signal, thereby reducing the waveform distortion degree of the PWM signal, improving the accuracy of light source signal transmission, and reducing the distortion rate of light source signal transmission;

[0018] 2. When the gate of the field-effect transistor in the voltage conversion module receives a high level, the current between the drain and the source of the field-effect transistor conducts. When the gate of the field-effect transistor receives a low level, the connection between the drain and the source of the field-effect transistor is cut off, enabling the field-effect transistor to perform level conversion on the signal, thereby adapting to the communication requirements between different devices and ensuring the accuracy and stability of signal conversion. Since the switching speed of the field-effect transistor is relatively fast, the rise time and fall time of the PWM signal are shortened, reducing the occurrence of signal distortion during transmission and improving the accuracy of PWN signal transmission. At the same time, the current-limiting resistor reduces the current flowing through the sixth field-effect transistor, reducing the situation where the field-effect transistor is burned out;

[0019] 3. After a high-level signal is input to the input-output circuit, the lower field-effect transistor conducts, the base voltage of the upper field-effect transistor decreases, and the upper field-effect transistor conducts. After a low-level signal is input to the input-output circuit, the lower field-effect transistor cuts off, the base voltage of the upper field-effect transistor increases, and the lower field-effect transistor cuts off. The lower field-effect transistor and the upper field-effect transistor form an amplifier, improving the anti-interference performance of the signal and achieving stable signal transmission. Description of the Drawings

[0020] Figure 1 It is the circuit diagram of a multi-channel pulse light source coding control board in an embodiment of the present application.

[0021] Figure 2 It is the circuit diagram of the acquisition module in an embodiment of the present application.

[0022] Figure 3 It is the circuit diagram of the voltage conversion module in an embodiment of the present application.

[0023] Figure 4 It is the circuit diagram of the output module in an embodiment of the present application. Detailed Embodiment

[0024] The following is a further detailed description of the present application in combination with the attached Figures 1-4 drawings.

[0025] An embodiment of the present application discloses a multi-channel pulse light source coding control board. Refer to Figure 1, including a main control circuit and a first input port S1, a second input port S2, a third input port S3, and a fourth input port S4. The main control circuit includes a main control board U3, a power supply circuit, a crystal oscillator circuit, and a programming circuit. The main control board U3 is an STM32F103C8T6 control chip, and the power supply circuit, the crystal oscillator circuit, and the programming circuit are all electrically connected to the main control board U3. The first input port S1, the second input port S2, the third input port S3, and the fourth input port S4 are PWM signal ports, and a collection module is commonly connected to the first input port S1, the second input port S2, the third input port S3, and the fourth input port S4. The collection module is used to obtain PWM signals. The collection module is connected in a common cathode mode. When a PWM signal appears at any one of the first input port S1, the second input port S2, the third input port S3, and the fourth input port S4, the collection module can collect the PWM signal, and the PWM signal is converted into address information through the collection module. Then the computer actively adjusts the light for each address information and stores and accesses the dimming data and the address information. A voltage conversion module is connected to the collection module. The voltage conversion module is used to convert the level of the PWM signal, and the output end of the voltage conversion module is connected to the input interface of the main control board U3. The internal circuit of the voltage conversion module adopts a dual-MOS tube common-gate mode to perform high-frequency signal level conversion on the PWM signal and optimize the transmission speed of the PWM signal. An output module is connected to the output interface of the main control board U3. The output module is used to output PWM signals to the host computer. When an operator adjusts the light source, the collection module collects the PWM signal of the light source brightness, and then the collection module outputs the PWM signal to the voltage conversion module. After the voltage conversion module performs level conversion on the high-frequency signal, it is sent to the host computer through the output module.

[0026] For facilitating the collection of PWM signals, referring to Figure 1 and Figure 2 , the collection module includes a first collection diode D20, a second collection diode D21, a third collection diode D22, and a fourth collection diode D23. The cathodes of the first collection diode D20, the second collection diode D21, the third collection diode D22, and the fourth collection diode D23 are commonly and electrically connected to the voltage conversion module. The anode of the first collection diode D20 is electrically connected to the first input port S1, the anode of the second collection diode D21 is electrically connected to the second input port S2, the anode of the third collection diode D22 is electrically connected to the third input port S3, and the anode of the fourth collection diode D23 is electrically connected to the fourth input port S4. Through the above circuit connection method, the collection module is connected in a common cathode mode, enabling multiple PWM signals to be combined and transmitted, reducing the situation of missed collection of PWM signals.

[0027] For performing level conversion on the PWM signal, referring to Figures 1 to 3, the voltage transformation module includes a first voltage transformation circuit, a second voltage transformation circuit, a third voltage transformation circuit, a fourth voltage transformation circuit, and a fifth voltage transformation circuit. The first voltage transformation circuit is electrically connected between the first input port S1 and the main control board U3, the second voltage transformation circuit is electrically connected between the second input port S2 and the main control board U3, the third voltage transformation circuit is electrically connected between the third input port S3 and the main control board U3, and the fourth voltage transformation circuit is electrically connected between the fourth input port S4 and the main control board U3. The fifth voltage transformation circuit is electrically connected between the acquisition module and the main control board U3. The cathodes of the first acquisition diode D20, the second acquisition diode D21, the third acquisition diode D22, and the fourth acquisition diode D23 are commonly electrically connected to the fifth voltage transformation circuit.

[0028] Reference Figures 1 to 3 , the fifth voltage transformation circuit includes a sixth MOS transistor Q6, a sixth current limiting resistor R6, and a fifteenth capacitor C15. The cathodes of the first acquisition diode D20, the second acquisition diode D21, the third acquisition diode D22, and the fourth acquisition diode D23 are commonly electrically connected to the drain of the sixth MOS transistor Q6. The gate of the sixth MOS transistor Q6 and one end of the fifteenth capacitor C15 are commonly pulled up to the signal DR terminal. The source of the sixth MOS transistor Q6 and one end of the sixth current limiting resistor R6 are commonly electrically connected to the pin 10 of the main control board. The other end of the sixth current limiting resistor R6 and the other end of the fifteenth capacitor C15 are commonly grounded.

[0029] Reference Figures 1 to 3 , the fourth voltage transformation circuit includes a fifth MOS transistor Q5, a fifth current limiting resistor R5, and a fourteenth capacitor C14. The fourth input port S4 is electrically connected to the drain of the fifth MOS transistor Q5. The gate of the fifth MOS transistor Q5 and one end of the fourteenth capacitor C14 are commonly pulled up to the signal DR terminal. The source of the fifth MOS transistor Q5 and one end of the fifth current limiting resistor R5 are commonly electrically connected to the pin 42 of the main control board. The other end of the fifth current limiting resistor R5 and the other end of the fourteenth capacitor C14 are commonly grounded.

[0030] Reference Figures 1 to 3 , the third voltage transformation circuit includes a fourth MOS transistor Q4, a fourth current limiting resistor R4, and a thirteenth capacitor C13. The third input port S3 is electrically connected to the drain of the fourth MOS transistor Q4. The gate of the fourth MOS transistor Q4 and one end of the thirteenth capacitor C13 are commonly pulled up to the signal DR terminal. The source of the fourth MOS transistor Q4 and one end of the fourth current limiting resistor R4 are commonly electrically connected to the pin 29 of the main control board U3. The other end of the fourth current limiting resistor R4 and the other end of the thirteenth capacitor C13 are commonly grounded.

[0031] Reference Figures 1 to 3, the second voltage transformation circuit includes a third MOS transistor Q3, a third current-limiting resistor R3, and a twelfth capacitor C12. The second input port S2 is electrically connected to the drain of the third MOS transistor Q3. One end of the gate of the third MOS transistor Q3 and the twelfth capacitor C12 is commonly pulled up to the signal DR terminal. The source of the third MOS transistor Q3 and one end of the third current-limiting resistor R3 are commonly electrically connected to pin 16 of the main control board U3. The other end of the third current-limiting resistor R3 and the other end of the twelfth capacitor C12 are commonly grounded.

[0032] Reference Figures 1 to 3 , the first voltage transformation circuit includes a first current-limiting resistor R1, a first MOS transistor Q1, a second MOS transistor Q2, a zener Schottky D7, a second current-limiting resistor R2, and an eleventh capacitor C11. One end of the first current-limiting resistor R1 is connected to the power supply 12V. The other end of the first current-limiting resistor R1 is electrically connected to the drain of the first MOS transistor Q1. The source of the first MOS transistor Q1 is electrically connected to the cathode of the zener Schottky D7. The first input port S1 is electrically connected to the drain of the second MOS transistor Q2. The source of the first MOS transistor Q1 and one end of the second current-limiting resistor R2 are commonly electrically connected to pin 11 of the main control board U3. The drain of the first MOS transistor Q1, the gate of the first MOS transistor Q1, the gate of the second MOS transistor Q2, and one end of the eleventh capacitor C11 are commonly pulled up to the signal DR terminal. The anode of the zener Schottky D7, the other end of the eleventh capacitor C11, and the other end of the second current-limiting resistor R2 are commonly grounded.

[0033] In order to stably output the PWM signal, reference Figure 1 and Figure 4 , the output module includes an output chip P3, a first output circuit, a second output circuit, a third output circuit, and a fourth output circuit. Pins 11, 12, 13, 14, and 15 of the output chip P3 are all grounded. Pin 9 and pin 5 of the output chip P3 are commonly electrically connected to the first output circuit. Pin 10 and pin 4 of the output chip are commonly electrically connected to the second output circuit. Pin 7 of the output chip is electrically connected to the third output circuit. Pin 18 of the output chip is electrically connected to the fourth output circuit. The first output circuit is electrically connected to pin 28 of the main control board U3. The second output circuit is electrically connected to pin 27 of the main control board U3. The third output circuit is electrically connected to pin 26 of the main control board U3. The fourth output circuit is electrically connected to pin 25 of the main control board U3.

[0034] Reference Figure 1 and Figure 4, the first output circuit includes a left resistor R8, a right resistor R9, a middle resistor R12, an upper resistor R14, a lower resistor R15, an upper MOS transistor Q7, and a lower MOS transistor Q9. One end of the left resistor R8 and one end of the right resistor R9 are both electrically connected to the power supply of 12V. The other end of the left resistor R8, one end of the middle resistor R12, and the gate of the upper MOS transistor Q7 are electrically connected. The other end of the right resistor R9 is electrically connected to the drain of the upper MOS transistor Q7. The source of the upper MOS transistor Q7 is connected to pins 9 and 5 of the output chip P3. The other end of the middle resistor R12 is electrically connected to the drain of the lower MOS transistor Q9. The source of the lower MOS transistor Q9 and one end of the lower resistor R15 are both grounded. The gate of the lower MOS transistor Q9, the other end of the lower resistor R15, and one end of the upper resistor R14 are electrically connected. The other end of the upper resistor R14 is electrically connected to pin 28 of the main control board U3.

[0035] Reference Figure 1 and Figure 4 , the second output circuit includes a left resistor R10, a right resistor R11, a middle resistor R13, an upper resistor R16, a lower resistor R17, an upper MOS transistor Q8, and a lower MOS transistor Q10. One end of the left resistor R10 and one end of the right resistor R11 are both electrically connected to the power supply of 12V. The other end of the left resistor R10, one end of the middle resistor R13, and the gate of the upper MOS transistor Q8 are electrically connected. The other end of the right resistor R11 is electrically connected to the drain of the upper MOS transistor Q8. The source of the upper MOS transistor Q8 is connected to pins 4 and 10 of the output chip P3. The other end of the middle resistor R13 is electrically connected to the drain of the lower MOS transistor Q10. The source of the lower MOS transistor Q10 and one end of the lower resistor R17 are both grounded. The gate of the lower MOS transistor Q10, the other end of the lower resistor R17, and one end of the upper resistor R16 are electrically connected. The other end of the upper resistor R16 is electrically connected to pin 27 of the main control board U3.

[0036] Reference Figure 1 and Figure 4 , the third output circuit includes an upper resistor R20, a left resistor R21, a right resistor R22, a middle resistor R30, a lower resistor R32, an upper MOS transistor Q11, and a lower MOS transistor Q13. One end of the left resistor R21 and one end of the right resistor R22 are both electrically connected to the power supply of 12V. The other end of the left resistor R21, one end of the middle resistor R30, and the gate of the upper MOS transistor Q11 are electrically connected. The other end of the right resistor R22 is electrically connected to the drain of the upper MOS transistor Q11. The source of the upper MOS transistor Q11 is connected to pin 7 of the output chip P3. The other end of the middle resistor R30 is electrically connected to the drain of the lower MOS transistor Q13. The source of the lower MOS transistor Q13 and one end of the lower resistor R32 are both grounded. The gate of the lower MOS transistor Q13, the other end of the lower resistor R32, and one end of the upper resistor R20 are electrically connected. The other end of the upper resistor R20 is electrically connected to pin 26 of the main control board.

[0037] Reference Figure 1 andFigure 4 , the fourth output circuit includes an upper resistor R23, a left resistor R24, a right resistor R25, a middle resistor R30, a lower resistor R33, an upper MOS transistor Q12, and a lower MOS transistor Q14. One end of the left resistor R24 and one end of the left resistor R25 are both electrically connected to the power supply of 12V. The other end of the left resistor R24, one end of the middle resistor R31, and the gate of the upper MOS transistor Q12 are electrically connected. The other end of the right resistor R25 is electrically connected to the drain of the upper MOS transistor Q12. The source of the upper MOS transistor Q12 is connected to pin 8 of the output chip. The other end of the middle resistor R31 is electrically connected to the drain of the lower MOS transistor Q14. The source of the lower MOS transistor R14 and one end of the lower resistor R33 are both grounded. The gate of the lower MOS transistor Q14, the other end of the lower resistor R33, and one end of the upper resistor R23 are electrically connected. The other end of the upper resistor R23 is electrically connected to pin 25 of the main control board U3.

[0038] The implementation principle of a multi-channel pulse light source coding control board according to an embodiment of the present application is as follows: The acquisition module collects the PWM signal for the operator to adjust the light source. The collected PWM signal is subjected to level conversion through the voltage conversion module. The PWM signal after level conversion is sent to the host computer through the output module. The acquisition module combines and transmits multiple PWM signals to the voltage conversion module, making it difficult for the PWM signal to be lost. When the gate of the field effect transistor in the voltage conversion module receives a high level, the current between the drain and the source of the field effect transistor conducts. When the gate of the effect transistor receives a low level, the drain and the source of the field effect transistor are cut off, enabling the field effect transistor to perform level conversion on the signal, thereby adapting to the communication requirements between different devices and ensuring the accuracy and stability of signal conversion. When a high-level signal is input into the output circuit, the lower field effect transistor conducts, the base voltage of the upper field effect transistor decreases, and the upper field effect transistor conducts. When a low-level signal is input into the output circuit, the lower field effect transistor is cut off, the base voltage of the upper field effect transistor increases, and the lower field effect transistor is cut off. The lower field effect transistor and the upper field effect transistor form an amplifier, improving the anti-interference performance of the signal and realizing the stable transmission of the signal. Since the switching speed of the field effect transistor is relatively fast, the rise time and fall time of the PWM signal are shortened, reducing the situation where the signal is prone to distortion during transmission, improving the accuracy of PWN signal transmission, thereby reducing the waveform distortion of the PWM signal and improving the stability of the light source signal transmission.

[0039] The above are all preferred embodiments of the present application, and do not limit the protection scope of the present application accordingly. Therefore, all equivalent changes made according to the structure, shape, and principle of the present application should be covered within the protection scope of the present application.

Claims

1. A multi-channel pulse light source coding control board, including a main control circuit, the main control circuit includes a main control board, and the main control board is an STM32F103C8T6 control chip, characterized in that: It further includes a first input port, a second input port, a third input port, and a fourth input port. The acquisition module is commonly connected to the first input port, the second input port, the third input port, and the fourth input port. The acquisition module is used to obtain the PWM signal. The voltage conversion module is connected to the acquisition module. The voltage conversion module is used to convert the PWM signal level. The output end of the voltage conversion module is connected to the input interface of the main control board. The output interface of the main control board is connected to the output module. The output module is used to output the PWM signal to the host computer.

2. The multi-channel pulse light source coding control board according to claim 1, wherein: The voltage conversion module includes a first voltage conversion circuit, a second voltage conversion circuit, a third voltage conversion circuit, a fourth voltage conversion circuit, and a fifth voltage conversion circuit. The first voltage conversion circuit is electrically connected between the first input port and the main control board. The second voltage conversion circuit is electrically connected between the second input port and the main control board. The third voltage conversion circuit is electrically connected between the third input port and the main control board. The fourth voltage conversion circuit is electrically connected between the fourth input port and the main control board. The fifth voltage conversion circuit is electrically connected between the acquisition module and the main control board.

3. The multiplexed pulse light source coding control board according to claim 2, wherein: The acquisition module includes a first acquisition diode, a second acquisition diode, a third acquisition diode, and a fourth acquisition diode. The anode of the first acquisition diode is electrically connected to the first input port. The anode of the second acquisition diode is electrically connected to the second input port. The anode of the third acquisition diode is electrically connected to the third input port. The anode of the fourth acquisition diode is electrically connected to the fourth input port. The cathodes of the first acquisition diode, the second acquisition diode, the third acquisition diode, and the fourth acquisition diode are commonly electrically connected to the fifth voltage conversion circuit.

4. A multiplexed pulse light source coding control board according to claim 3, characterized in that: The fifth voltage conversion circuit includes a sixth MOS transistor, a sixth current-limiting resistor, and a fifteenth capacitor. The cathodes of the first acquisition diode, the second acquisition diode, the third acquisition diode, and the fourth acquisition diode are commonly electrically connected to the drain of the sixth MOS transistor. The gate of the sixth MOS transistor and one end of the fifteenth capacitor are commonly pulled up to the signal DR terminal. The source of the sixth MOS transistor and one end of the sixth current-limiting resistor are commonly connected to the pin 10 of the main control board. The other end of the sixth current-limiting resistor and the other end of the fifteenth capacitor are commonly grounded.

5. A multiplexed pulse light source coding control board according to claim 2, characterized in that: The fourth voltage conversion circuit includes a fifth MOS transistor, a fifth current-limiting resistor, and a fourteenth capacitor. The fourth input port is electrically connected to the drain of the fifth MOS transistor. The gate of the fifth MOS transistor and one end of the fourteenth capacitor are commonly pulled up to the signal DR terminal. The source of the fifth MOS transistor and one end of the fifth current-limiting resistor are commonly connected to the pin 42 of the main control board. The other end of the fifth current-limiting resistor and the other end of the fourteenth capacitor are commonly grounded.

6. The multi-channel pulse light source encoding control board according to claim 2, wherein: The third voltage conversion circuit includes a fourth MOS transistor, a fourth current-limiting resistor, and a thirteenth capacitor. The third input port is electrically connected to the drain of the fourth MOS transistor. One end of the gate of the fourth MOS transistor and one end of the thirteenth capacitor are commonly pulled up to the signal DR terminal. The source of the fourth MOS transistor and one end of the fourth current-limiting resistor are commonly electrically connected to pin 29 of the main control board. The other end of the fourth current-limiting resistor and the other end of the thirteenth capacitor are commonly grounded.

7. A multi-channel pulse light source coding control board according to claim 2, characterized in that: The second voltage conversion circuit includes a third MOS transistor, a third current-limiting resistor, and a twelfth capacitor. The second input port is electrically connected to the drain of the third MOS transistor. One end of the gate of the third MOS transistor and one end of the twelfth capacitor are commonly pulled up to the signal DR terminal. The source of the third MOS transistor and one end of the third current-limiting resistor are commonly electrically connected to pin 16 of the main control board. The other end of the third current-limiting resistor and the other end of the twelfth capacitor are commonly grounded.

8. A multiplex pulse light source coding control board according to claim 2, characterized in that: The first voltage conversion circuit includes a first current-limiting resistor, a first MOS transistor, a second MOS transistor, a zener Schottky diode, a second current-limiting resistor, and an eleventh capacitor. One end of the first current-limiting resistor is connected to the power supply of 12V. The other end of the first current-limiting resistor is electrically connected to the drain of the first MOS transistor. The source of the first MOS transistor is electrically connected to the cathode of the zener Schottky diode. The first input port is electrically connected to the drain of the second MOS transistor. The source of the first MOS transistor and one end of the second current-limiting resistor are commonly electrically connected to pin 11 of the main control board. The drain of the first MOS transistor, the gate of the first MOS transistor, the gate of the second MOS transistor, and one end of the eleventh capacitor are commonly pulled up to the signal DR terminal. The anode of the zener Schottky diode, the other end of the eleventh capacitor, and the other end of the second current-limiting resistor are commonly grounded.

9. A multiplexed pulse light source coding control board according to claim 1, characterized in that: The output module includes an output chip and a plurality of output circuits. The output circuits are connected between the output chip and the main control board. Pins 11, 12, 13, 14, and 15 of the output chip are all grounded.

10. A multi-channel pulse light source coding control board according to claim 9, characterized in that: The output circuit includes a left resistor, a right resistor, an upper resistor, a middle resistor, a lower resistor, an upper MOS transistor, and a lower MOS transistor. One end of the left resistor and one end of the right resistor are both electrically connected to the power supply of 12V. The other end of the left resistor, one end of the middle resistor, and the gate of the upper MOS transistor are electrically connected. The other end of the right resistor is electrically connected to the drain of the upper MOS transistor. The source of the upper MOS transistor is connected to the output chip. The other end of the middle resistor is electrically connected to the drain of the lower MOS transistor. The source of the lower MOS transistor and one end of the lower resistor are both grounded. The gate of the lower MOS transistor, the other end of the lower resistor, and one end of the upper resistor are electrically connected. The other end of the upper resistor is electrically connected to the pin of the main control board.