Multi-interface memory card based on PUF encryption

By using PUF encryption technology in memory cards, the unique characteristics of physical devices are used to generate keys, which solves the problem that mainstream encryption algorithms are easily cracked, and achieves high security and data reliability of memory cards.

CN223193349UActive Publication Date: 2025-08-05RUNCORE HIGH TECH
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Patent Information

Application Number
CN202422548945.9
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-10-21
Publication Date
2025-08-05
Estimated Expiration
2034-10-21

AI Technical Summary

Technical Problem

The existing memory cards have low security, and mainstream encryption algorithms are easily cracked, resulting in the failure of the system security mechanism.

Method used

Using PUF encryption technology, the unique characteristics of physical devices are used to generate a unique key, and the encryption function of the memory card is realized through the PUF encryption chip.

Benefits of technology

It improves the security of the memory card, enhances the reliability and protection capabilities of data, and reduces the difficulty of implementation.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model belongs to the technical field of encryption storage, and provides a PUF (Physical Unclonable Function) encryption-based multi-interface memory card, which comprises a processor, a PCle exchanger, a field programmable gate array, an SFP + data interface, a PUF encryption chip, a DDR3 (Double Data Rate 3) memory card, a DDR4 memory card, a gigabit network card, a micro-control unit, a complex programmable logic device, a solid state disk, a plurality of memory daughter cards and a VPX connector, the gigabit network card is connected to the VPX connector; the micro-control unit is connected with the PUF encryption chip; the micro-control unit is also connected to the VPX connector and the complex programmable logic device; and the PUF encryption chip is used for realizing a storage encryption function. According to the utility model, high-speed data from various interfaces can be stored, and the security of the data is guaranteed by adopting a PUF encryption technology.
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Description

Technical Field

[0001] The utility model belongs to the technical field of encrypted storage, and in particular relates to a multi-interface memory card based on PUF encryption. Background Art

[0002] With the rapid development of the economy, the substantial improvement of people's living standards, and especially the rapid development of electronic technology, computers, smart phones, digital cameras, MP3 players, etc. have become one of the most commonly used household tools. At the same time, various memory cards have also become widely popular and diverse.

[0003] Currently, in the storage field, mainstream encryption methods such as SM2 / 3 / 4, ECC, AES, SHA256, MAC / HMAC, etc. are generally used for encryption processing.

[0004] Mainstream encryption methods rely on the security of their algorithms, and the effectiveness of encryption algorithms depends on the security of their design. Once the algorithm is cracked, the security of the entire system is threatened. Furthermore, correctly implementing encryption algorithms in mainstream algorithms requires highly specialized knowledge, and incorrect implementation can lead to security vulnerabilities.

[0005] Once these mainstream encryption keys are stolen, the entire security mechanism of the system will be invalidated, resulting in low security of the memory card in the prior art. Utility Model Content

[0006] The embodiment of the utility model provides a multi-interface memory card based on PUF encryption, which can store high-speed data from multiple interfaces and has PUF encryption technology to ensure data security.

[0007] The present invention provides a multi-interface memory card based on PUF encryption, including a processor, a PCIe switch, a field programmable gate array, an SFP+ data interface, a PUF encryption chip, a DDR3 memory card, a DDR4 memory card, a gigabit network card, a microcontroller unit, a complex programmable logic device, a solid-state drive, several memory daughter cards, and a VPX connector.

[0008] The processor is respectively connected to the gigabit network card, the DDR4 memory card, the solid-state drive, the plurality of storage daughter cards and the field programmable gate array for communication and is used to implement data storage and management;

[0009] Several of the memory daughter cards are electrically connected to the processor via the PCle switch; the DDR4 memory card is used to cache data; the solid-state drive and several of the memory daughter cards are respectively used to store data; the field programmable gate array is used to implement a multi-interface data conversion function, and the field programmable gate array is connected to the VPX connector; the field programmable gate array is also respectively connected to the SFP+ data interface and the DDR3 memory card;

[0010] The gigabit network card is connected to the VPX connector; the VPX connector is used to lead out signals from different interfaces; the complex programmable logic device is used to manage the power-on timing and reset timing of the processor; the microcontroller unit is connected to the PUF encryption chip; the microcontroller unit is also connected to the VPX connector and the complex programmable logic device; the PUF encryption chip is used to implement storage encryption function.

[0011] Furthermore, the model of the Gigabit network card is 1G Ethernet WX1860.

[0012] Furthermore, the model of the solid state drive is BGA PCle SSD 32GB.

[0013] Furthermore, the PCle switch is connected to the processor via one PCle×8 link, the PCle switch is connected to the storage daughter card via two PCle×4 links; and the processor is connected to the storage daughter card via two PCle×4 links.

[0014] Furthermore, the model of the PCle switch is PCle SF86361, which is used to expand the number of PCIe ports and LANE.

[0015] Furthermore, the processor and the field programmable gate array are communicated via one PCle 3.0×8 and two UARTs.

[0016] Furthermore, the model of the field programmable gate array is JFM7VX690T of Fudan Micro, and / or the model of the processor is Feiteng D2000.

[0017] Furthermore, the model of the micro control unit is GD32F450.

[0018] Furthermore, the model of the storage daughter card is 8TB PCle SSD.

[0019] Furthermore, the VXP connector is provided with a P0 interface, a P1 interface, a P2 interface, a P3 interface and a P4 interface.

[0020] The beneficial effects achieved by the utility model are as follows: the utility model provides a multi-interface memory card based on PUF encryption, wherein the processor is respectively connected to the gigabit network card, the DDR4 memory card, the solid-state drive, several memory daughter cards and the field programmable gate array for communication and data storage and management; the several memory daughter cards and the processor are also electrically connected via a PCle switch; the DDR4 memory card is used to cache data; the solid-state drive and several memory daughter cards are respectively used to store data; the field programmable gate array is used to realize the multi-interface data conversion function, and the field programmable gate array is connected to the VPX connector via 2-way GTX×4 and 8-way GTX; the field The programmable gate array (FPGA) transmits data at 10Gbps via the SFP+ data interface. The Gigabit network card (Gigabit NIC) is used to connect data from four Gigabit network interfaces to the VPX connector. The VPX connector is used to extract signals from different interfaces. The complex programmable logic device (CPLD) manages the processor's power-up and reset timing. The microcontroller unit (MCU) performs monitoring and management functions and transmits signals to the PUF encryption chip. The MCU also provides an IPMB bus connection to the VPX connector. The PUF encryption chip implements storage encryption. The D2000 processor stores high-speed data from multiple interfaces, and PUF encryption technology ensures data security. Furthermore, the VXP connector is compatible with high-speed interfaces such as Aurora, SRIO, 10G, and 1G, making it suitable for a wide range of applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 This is a module diagram of a multi-interface memory card based on PUF encryption provided by an embodiment of the present utility model;

[0022] Figure 2 yes Figure 1 Local magnification Figure 1 ;

[0023] Figure 3 yes Figure 1 Local magnification Figure 2 .

[0024] Among them, 100, memory card, 1, processor, 2, PCle switch, 3, field programmable gate array, 4, SFP+ data interface, 5, PUF encryption chip, 6, DDR3 memory card, 7, DDR4 memory card, 8, Gigabit network card, 9, micro control unit, 10, complex programmable logic device, 11, solid-state drive, 12, storage daughter card, 13, VPX connector. DETAILED DESCRIPTION

[0025] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0026] Among existing technologies, PUF encryption technology has been widely used in the networking and communications industries. However, in the storage sector, mainstream encryption methods such as SM2 / 3 / 4, ECC, AES, SHA256, and MAC / HMAC are generally used. However, if the keys of these mainstream encryption methods are stolen, the entire system security mechanism will be invalidated, resulting in low security of the memory card.

[0027] PUF (Physical Unclonable Function) encryption technology is a hardware-based security technology that leverages the unique characteristics of physical devices to generate keys or authentication information. PUF technology exploits the inevitable minor variations in physical devices during the manufacturing process, which give each device a unique signature, similar to a human fingerprint.

[0028] PUF takes advantage of the randomness generated during the manufacturing process, such as subtle inhomogeneities in circuits and material defects. These physical characteristics make each device unique.

[0029] PUF generates a unique output (response) through a series of inputs (challenges). This process is based on physical characteristics and is difficult to simulate through software. PUF can be used to generate encryption keys. Because each generated key is based on physical characteristics, it is difficult to copy or guess.

[0030] PUF's physical properties are stable. PUF utilizes the inherent characteristics of physical devices, which do not change over short periods of time. Furthermore, PUF technology is relatively simple to implement, reducing its difficulty.

[0031] Therefore, the utility model proposes a multi-interface memory card based on RUF encryption, which improves the reliability of encryption through RUF encryption technology.

[0032] In the memory card of the present invention, the processor is respectively connected to the gigabit network card, DDR4 memory card, solid-state hard drive, several memory daughter cards and field programmable gate array for communication and data storage and management; the several memory daughter cards and the processor are also electrically connected through a PCle switch; the DDR4 memory card is used to cache data; the solid-state hard drive and several memory daughter cards are respectively used to store data; the field programmable gate array is used to implement multi-interface data conversion function, and the field programmable gate array is connected to the VPX connector through 2-way GTX×4 and 8-way GTX; the field programmable gate array is connected to the VPX connector through the SFP+ data interface The 10Gbps data transmission port is implemented; the Gigabit network card is used to export data from four Gigabit network interfaces to the VPX connector; the VPX connector is used to extract signals from different interfaces; the complex programmable logic device is used to manage the processor's power-on and reset timing; the microcontroller unit is used for monitoring and management functions and transmits signals to the PUF encryption chip; the microcontroller unit also provides an IPMB bus connection to the VPX connector; the PUF encryption chip is used to implement storage encryption functions; the D2000 processor stores high-speed data from multiple interfaces, and PUF encryption technology ensures data security. Furthermore, the VXP connector is compatible with high-speed interfaces such as Aurora, SRIO, 10G, and 1G, making it suitable for a wide range of scenarios.

[0033] See also Figure 1-3 As shown, Figure 1 This is a module diagram of a multi-interface memory card based on PUF encryption provided by an embodiment of the present utility model; Figure 2 yes Figure 1 Local magnification Figure 1 ; Figure 3 yes Figure 1 Local magnification Figure 2 .

[0034] The utility model provides a multi-interface memory card 100 based on PUF encryption, including a processor 1, a PCIe switch 2, a field programmable gate array 3, an SFP+ data interface 4, a PUF encryption chip 5, a DDR3 memory card 6, a DDR4 memory card 7, a gigabit network card 8, a microcontroller unit 9, a complex programmable logic device 10, a solid-state drive 11, several memory daughter cards 12 and a VPX connector 13.

[0035] The processor 1 is respectively connected to the gigabit network card 8, the DDR4 memory card 7, the solid state drive 11, several storage daughter cards 12 and the field programmable gate array 3 for communication and is used to implement data storage and management.

[0036] Among them, processor 1 can be a Feiteng D2000 processor. The 8-core processor 1 is the core component and mainly completes data storage and management.

[0037] Among them, the DDR4 memory card 7 uses the NVME SSD controller of Starblaze Technology and the NAND FLASH particles of Yangtze Memory.

[0038] Several of the storage daughter cards 12 are also electrically connected to the processor 1 through the PCle switch 2; the DDR4 memory card 7 is used to implement data caching; the solid-state drive 11 and several of the storage daughter cards 12 are respectively used to implement data storage; the field programmable gate array 3 is used to implement multi-interface data conversion function, and the field programmable gate array 3 is connected to the VPX connector 13; the field programmable gate array 3 is also respectively connected to the SFP+ data interface 4 and the DDR3 memory card 6.

[0039] Specifically, the field programmable gate array 3 is connected to the VPX connector 13 through 2-way GTX×4 and 8-way GTX respectively; the field programmable gate array 3 realizes the data transmission function at a speed of 10 Gbps through the SFP+ data interface 4.

[0040] Specifically, the number of the storage daughter cards 12 may be multiple.

[0041] The SFP+ data interface 4 is an enhanced version of the SFP data interface, and specifically may be a 10G SFP+ data interface.

[0042] The gigabit network card 8 is connected to the VPX connector 13; the VPX connector 13 is used to lead out signals from different interfaces; the complex programmable logic device 10 is used to manage the power-on timing and reset timing of the processor 1; the microcontroller unit 9 is connected to the PUF encryption chip 5; the microcontroller unit 9 is also connected to the VPX connector 13 and the complex programmable logic device 10; the PUF encryption chip 5 is used to implement storage encryption function.

[0043] Specifically, the Gigabit network card 8 is used to realize the data export of 4-way Gigabit network interfaces and connect to the VPX connector 13; the micro control unit 9 is used to realize monitoring and management functions, and transmit signals to the PUF encryption chip 5; the micro control unit 9 is also used to provide an IPMB bus connected to the VPX connector 13; the PUF encryption chip 5 is used to realize storage encryption functions. The D2000 processor 1 is used to store high-speed data from multiple interfaces, and PUF encryption technology is used to ensure data security. At the same time, the VXP connector 13 can be used with universal high-speed interfaces Aurora, SRIO, 10G, and 1G in different scenarios, and has a wide range of applications. The memory card 100 of the utility model has a data storage function of not less than 4GB / S, and has the currently common high-speed interfaces SRIO, 10G, and 1G on the market to meet the interface applications of different scenarios.

[0044] More specifically, the model of the Gigabit network card 8 is 1G Ethernet WX1860. Specifically, the Gigabit network card 8 adopts the Gigabit network card WX1860 of Netcom Technology.

[0045] More specifically, the model of the solid state drive 11 is BGA PCle SSD 32GB.

[0046] More specifically, the PCle switch 2 is connected to the processor 1 via one PCle×8 link, and the PCle switch 2 is connected to the storage daughter card 12 via two PCle×4 links; the processor 1 is connected to the storage daughter card 12 via two PCle×4 links.

[0047] More specifically, the PCIe switch 2 is the SF86361 PCIe, which is used to expand the number of PCIe ports and lanes. The SF86361 PCIe expansion device expands the number of SSDs. PCIe switch 2 uses the SF86361 PCIe switch from Nanfei Micro.

[0048] More specifically, the processor 1 and the field programmable gate array 3 are communicated via one PCle 3.0×8 and two UARTs.

[0049] More specifically, the model of the field programmable gate array 3 is JFM7VX690T of Fudan Micro, and / or the model of the processor 1 is Feiteng D2000. JFM7VX690T has a rich set of peripheral expansion interfaces and can be used for data playback.

[0050] More specifically, the microcontroller unit 9 is GigaDevice's GD32F450. Specifically, the microcontroller unit 9 is an MCU, and the GD32F450 is connected to the VXP connector 13 via an IPMB interface, thereby providing two external IPMB interfaces for isolation. The communication rate supports a configurable 100Kbps / 400Kbps, and supports the IPMI 2.0 standard protocol. IPMI commands can be used to control the power on and off of the memory card and the upload and download of keys.

[0051] More specifically, the storage daughter card 12 is an 8TB PCle SSD, which includes four 2TB PCle 3.0×4 SSDs.

[0052] More specifically, the VXP connector 13 is provided with a P0 interface, a P1 interface, a P2 interface, a P3 interface, and a P4 interface.

[0053] More specifically, the complex programmable logic device 10 uses the CPLD GW1N-UV9U produced by Gaoyun Technology.

[0054] It should be noted that the terms "including" and "having" and any variations thereof in the specification, claims and drawings of the present invention are intended to cover non-exclusive inclusions. The terms "first", "second" and the like in the specification, claims or drawings of the present invention are used to distinguish different objects, rather than to describe a specific order. Reference to "embodiment" in this article means that the specific features, structures or characteristics described in conjunction with the embodiment may be included in at least one embodiment of the present invention. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0055] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A multi-interface memory card based on PUF encryption, characterized in that: Includes processors, PCle switches, field programmable gate arrays, SFP+ data interfaces, PUF encryption chips, DDR3 memory cards, DDR4 memory cards, gigabit network cards, microcontroller units, complex programmable logic devices, solid-state drives, several storage daughter cards, and VPX connectors; The processor is respectively connected to the gigabit network card, the DDR4 memory card, the solid-state drive, the plurality of storage daughter cards and the field programmable gate array for communication and is used to implement data storage and management; Several of the memory daughter cards are electrically connected to the processor via the PCle switch; the DDR4 memory card is used to cache data; the solid-state drive and several of the memory daughter cards are respectively used to store data; the field programmable gate array is used to implement a multi-interface data conversion function, and the field programmable gate array is connected to the VPX connector; the field programmable gate array is also respectively connected to the SFP+ data interface and the DDR3 memory card; The gigabit network card is connected to the VPX connector; the VPX connector is used to lead out signals from different interfaces; the complex programmable logic device is used to manage the power-on timing and reset timing of the processor; the microcontroller unit is connected to the PUF encryption chip; the microcontroller unit is also connected to the VPX connector and the complex programmable logic device; the PUF encryption chip is used to implement storage encryption function.

2. The multi-interface memory card based on PUF encryption according to claim 1, wherein: The model of the Gigabit network card is 1G Ethernet WX1860.

3. The multi-interface memory card based on PUF encryption according to claim 1, wherein: The model of the solid-state drive is BGA PCle SSD 32GB.

4. The multi-interface memory card based on PUF encryption according to claim 1, wherein: The PCle switch is connected to the processor via one PCle×8 channel, and the PCle switch is connected to the storage daughter card via two PCle×4 channels; the processor is connected to the storage daughter card via two PCle×4 channels.

5. The multi-interface memory card based on PUF encryption according to claim 1, wherein: The model of the PCle switch is PCle SF86361, which is used to expand the number of PCIe ports and LANE.

6. The multi-interface memory card based on PUF encryption according to claim 1, wherein: The processor and the field programmable gate array are connected to each other via one PCle 3.0×8 and two UARTs.

7. The multi-interface memory card based on PUF encryption according to claim 1, wherein: The model of the field programmable gate array is JFM7VX690T of Fudan Micro, and / or the model of the processor is Feiteng D2000.

8. The multi-interface memory card based on PUF encryption according to claim 1, wherein: The model of the microcontroller unit is GD32F450.

9. The multi-interface memory card based on PUF encryption according to claim 1, wherein: The model of the storage daughter card is 8TB PCle SSD.

10. The multi-interface memory card based on PUF encryption according to claim 1, wherein: The VPX connector is provided with a P0 interface, a P1 interface, a P2 interface, a P3 interface and a P4 interface.